Clock management

Precision Clock generators, clock aplifiers and recovery

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Name View Description Project information Buy possibility Documentation
CLK1PLL01A Ilustrative Picture

PLL clock generator

PLL clock generator with Texas Instruments chip CDCE913. Contains VCXO with external xtal and one internal PLL. It has three LVCMOS outputs with individual frequency dividers capable to generate ut to 230MHz clocks. The chip is programmable via I2C and configuration may be saved to internal EEPROM.

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CLKDIV01A Ilustrative Picture

Differential input Clock divider

Multiple division ratios can be selected by jumpers. Possible division ratios are: (÷1, ÷2, ÷4, ÷8) or (÷2, ÷4, ÷8, ÷16) every output is synchronous each other. The common enable (EN) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state.

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UST CLKDIV01A.cs.pdf
CLKGEN01A Ilustrative Picture

Low jitter clock generator

Single output I2C programmable clock generator.

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CLKGEN01A.pdf
CLKGEN01B Ilustrative Picture
Ilustrative Picture

Low jitter clock generator

Single output I2C programmable clock generator.

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UST CLKGEN01B.cs.pdf
CLKGEN01B.en.pdf
DG8SAQ_emulator.cs.pdf
CLKGEN02A Ilustrative Picture

Universal module for crystal oscillators

The module comprises a plurality of housings for mounting a variety of crystal oscillators.

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CLKGEN02A.cs.pdf
CLKHUB01A Ilustrative Picture

Low jitter clock distributor

Multi-output (SPI selectable) high speed clock distributor.

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CLKHUB01A.pdf
CLKHUB02A Ilustrative Picture
Ilustrative Picture

Low jitter clock distributor

high speed clock distributor with ten LVPECL outputs. Usable up to 3.5GHz

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UST CLKHUB02A.cs.pdf
RTC01A Ilustrative Picture

Real Time Clock Modules

Replaced RTC02A

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RTC02A Ilustrative Picture

Real Time Clock Modules

Real Time Clock controlled through I2C with battery backup. The accuracy of the order of 20 ppm.

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RTC02A.cs.pdf