1361 |
mija |
1 |
/* mija 2008 |
|
|
2 |
defines for LCD NOKIA5110 (instruction set) |
|
|
3 |
|
|
|
4 |
CPU ATMEGA16 |
|
|
5 |
fcpu = 1MHz |
|
|
6 |
|
|
|
7 |
!! define PIN,PORT,DDR for IOpin !! |
|
|
8 |
|
|
|
9 |
*/ |
|
|
10 |
|
|
|
11 |
#define LCD_WIDTH 84 |
|
|
12 |
#define LCD_HEIGHT 48 |
|
|
13 |
#define CHAR_WIDTH 6 |
|
|
14 |
|
|
|
15 |
// LCD SW |
|
|
16 |
#define nSCLK PA6 |
|
|
17 |
#define nSCLK_PORT PORTA |
|
|
18 |
#define nSCLK_DDR DDRA |
|
|
19 |
|
|
|
20 |
#define nSDIN PA5 |
|
|
21 |
#define nSDIN_PORT PORTA |
|
|
22 |
#define nSDIN_DDR DDRA |
|
|
23 |
|
|
|
24 |
#define nDC PA4 |
|
|
25 |
#define nDC_PORT PORTA |
|
|
26 |
#define nDC_DDR DDRA |
|
|
27 |
|
|
|
28 |
#define nCS PA3 |
|
|
29 |
#define nCS_PORT PORTA |
|
|
30 |
#define nCS_DDR DDRA |
|
|
31 |
|
|
|
32 |
#define nRESET PA2 |
|
|
33 |
#define nRESET_PORT PORTA |
|
|
34 |
#define nRESET_DDR DDRA |
|
|
35 |
|
|
|
36 |
//interni |
|
|
37 |
#define nSCLK_H nSCLK_PORT |= _BV(nSCLK) |
|
|
38 |
#define nSCLK_L nSCLK_PORT &= (~(_BV(nSCLK))) |
|
|
39 |
#define nSCLK_INIT nSCLK_DDR |= _BV(nSCLK) |
|
|
40 |
|
|
|
41 |
#define nSDIN_H nSDIN_PORT |= _BV(nSDIN) |
|
|
42 |
#define nSDIN_L nSDIN_PORT &= (~(_BV(nSDIN))) |
|
|
43 |
#define nSDIN_INIT nSDIN_DDR |= _BV(nSDIN) |
|
|
44 |
|
|
|
45 |
#define nDC_H nDC_PORT |= _BV(nDC) |
|
|
46 |
#define nDC_L nDC_PORT &= (~(_BV(nDC))) |
|
|
47 |
#define nDC_INIT nDC_DDR |= _BV(nDC) |
|
|
48 |
|
|
|
49 |
#define nCS_H nCS_PORT |= _BV(nCS) |
|
|
50 |
#define nCS_L nCS_PORT &= (~(_BV(nCS))) |
|
|
51 |
#define nCS_INIT nCS_DDR |= _BV(nCS) |
|
|
52 |
|
|
|
53 |
#define nRESET_H nRESET_PORT |= _BV(nRESET) |
|
|
54 |
#define nRESET_L nRESET_PORT &= (~(_BV(nRESET))) |
|
|
55 |
#define nRESET_INIT nRESET_DDR |= _BV(nRESET) |
|
|
56 |
|
|
|
57 |
|
|
|
58 |
// FUNCTION SET |
|
|
59 |
#define ACTIVE_CHIP 0x20 |
|
|
60 |
#define POWER_DOWN 0x24 |
|
|
61 |
#define H_ADDR 0x20 |
|
|
62 |
#define V_ADDR 0x22 |
|
|
63 |
#define BASIC_SET 0x20 |
|
|
64 |
#define EXTENDED_SET 0x21 |
|
|
65 |
|
|
|
66 |
// BASIC SET |
|
|
67 |
#define DISPLAY_BLANK 0x08 |
|
|
68 |
#define DISPLAY_NORMAL 0x0C |
|
|
69 |
#define DISPLAY_ALL_ON 0x09 |
|
|
70 |
#define DISPLAY_INV 0x0D |
|
|
71 |
|
|
|
72 |
#define Y_SET 0x40 // | Y2..Y0 |
|
|
73 |
#define X_SET 0x80 // | X6..X0 |
|
|
74 |
|
|
|
75 |
// EXTENDED SET |
|
|
76 |
#define TEMP_COEF 0x04 // | TC1|TC0 |
|
|
77 |
#define TEMP_COEF_0 0x04 |
|
|
78 |
#define TEMP_COEF_1 0x05 |
|
|
79 |
#define TEMP_COEF_2 0x06 |
|
|
80 |
#define TEMP_COEF_3 0x07 |
|
|
81 |
|
|
|
82 |
#define BIAS_0 0x10 |
|
|
83 |
#define BIAS_1 0x11 |
|
|
84 |
#define BIAS_2 0x12 |
|
|
85 |
#define BIAS_3 0x13 |
|
|
86 |
#define BIAS_4 0x14 |
|
|
87 |
#define BIAS_5 0x15 |
|
|
88 |
#define BIAS_6 0x16 |
|
|
89 |
#define BIAS_7 0x17 |
|
|
90 |
|
|
|
91 |
#define VOP 0x80 // | Vop6..Vop0 |