Rev Author Line No. Line
2018 kaklik 1  
2 **** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
3  
4 ** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]
5  
6  
7 **** CIRCUIT DESCRIPTION
8  
9  
10 ******************************************************************************
11  
12  
13  
14  
15 ** Creating circuit file "test.cir"
16 ** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
17  
18 *Libraries:
19 * Profile Libraries :
20 * Local Libraries :
21 * From [PSPICE NETLIST] section of C:\OrCAD\OrCAD_10.5_Demo\tools\PSpice\PSpice.ini file:
22 .lib "nom.lib"
23  
24 *Analysis directives:
25 .AC LIN 5000 10000 30000
26 .PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
27 .INC "..\SCHEMATIC1.net"
28  
29  
30  
31 **** INCLUDING SCHEMATIC1.net ****
32 * source RECEIVER
33 C_C1 0 N03478 15nF
34 V_V2 N03432 0 DC 0Vdc AC 0.001Vac
35 R_R1 0 N03490 100
36 E_U1 N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718
37 + N03634 1G
38  
39 R_R4 N03718 N03462 6.8k
40 R_R5 0 N03718 6.8k
41 C_C5 N03478 N03718 100nF
42 C_C2 N03518 N03510 1n
43 R_R6 N03774 N03782 20k
44 R_R7 0 N03774 100000k
45 V_V1 N03462 0 12Vdc
46 R_R2 N03634 N03510 100k
47 L_L1 N03462 N03478 4900uH
48 C_C3 N03634 N03510 100pF
49 X_TX1 N03518 0 N03782 N03774 SCHEMATIC1_TX1
50 J_J1 N03478 N03432 N03490 JbreakN
51 C_C4 N03622 N03634 4.7nF
52 R_R3 0 N03622 10k
53  
54 .subckt SCHEMATIC1_TX1 1 2 3 4
55 L1_TX1 1 2 1000
56 L2_TX1 3 4 1000
57 K_TX1 L1_TX1 L2_TX1 1 KRM8PL_3C8
58 .ends SCHEMATIC1_TX1
59  
60 **** RESUMING test.cir ****
61 .END
62  
63 **** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
64  
65 ** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]
66  
67  
68 **** Junction FET MODEL PARAMETERS
69  
70  
71 ******************************************************************************
72  
73  
74  
75  
76 JbreakN
77 NJF
78 VTO -2
79 BETA 100.000000E-06
80  
81  
82 **** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
83  
84 ** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]
85  
86  
87 **** Ferromagnetic Core MODEL PARAMETERS
88  
89  
90 ******************************************************************************
91  
92  
93  
94  
95 KRM8PL_3C8
96 LEVEL 2
97 AREA .63
98 PATH 3.84
99 MS 415.200000E+03
100 A 44.82
101 C .4112
102 K 25.74
103  
104  
105 **** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
106  
107 ** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]
108  
109  
110 **** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C
111  
112  
113 ******************************************************************************
114  
115  
116  
117 NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
118  
119  
120 (N03432) 0.0000 (N03462) 12.0000 (N03478) 12.0000 (N03490) .0385
121  
122 (N03510) 6.0000 (N03518) 0.0000 (N03622) 0.0000 (N03634) 6.0000
123  
124 (N03718) 6.0000 (N03774) 0.0000 (N03782) 0.0000
125  
126  
127  
128  
129 VOLTAGE SOURCE CURRENTS
130 NAME CURRENT
131  
132 V_V2 1.206E-11
133 V_V1 -1.267E-03
134  
135 TOTAL POWER DISSIPATION 1.52E-02 WATTS
136  
137  
138  
139 JOB CONCLUDED
140  
141 **** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
142  
143 ** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]
144  
145  
146 **** JOB STATISTICS SUMMARY
147  
148  
149 ******************************************************************************
150  
151  
152  
153 Total job time (using Solver 1) = .82
154