Rev Author Line No. Line
2018 kaklik 1  
2 **** 08/21/07 14:53:51 ************** PSpice Lite (Jan 2005) *****************
3  
4 ** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]
5  
6  
7 **** CIRCUIT DESCRIPTION
8  
9  
10 ******************************************************************************
11  
12  
13  
14  
15 ** Creating circuit file "test.cir"
16 ** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
17  
18 *Libraries:
19 * Profile Libraries :
20 * Local Libraries :
21 * From [PSPICE NETLIST] section of C:\OrCAD\OrCAD_10.5_Demo\tools\PSpice\PSpice.ini file:
22 .lib "nom.lib"
23  
24 *Analysis directives:
25 .AC LIN 7000 0 250000
26 -------------$
27 ERROR -- Invalid value
28 .PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
29 .INC "..\SCHEMATIC1.net"
30  
31  
32  
33 **** INCLUDING SCHEMATIC1.net ****
34 * source RECEIVER
35 C_C1 0 N03478 22nF
36 V_V2 N03432 0 DC 0Vdc AC 1Vac
37 R_R1 0 N03490 10
38 E_U1 N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718
39 + N03634 1G
40  
41 R_R4 N03718 N03462 4.7k
42 R_R5 0 N03718 4.7k
43 C_C5 N03478 N03718 100nF
44 C_C2 N03518 N03510 1n
45 R_R6 N03774 N03782 10k
46 R_R7 0 N03774 100000k
47 V_V1 N03462 0 12Vdc
48 R_R2 N03634 N03510 100k
49 L_L1 N03462 N03478 3mH
50 C_C3 N03634 N03510 1n
51 X_TX1 N03518 0 N03782 N03774 SCHEMATIC1_TX1
52 J_J1 N03478 N03432 N03490 JbreakN
53 C_C4 N03622 N03634 47nF
54 R_R3 0 N03622 10k
55  
56 .subckt SCHEMATIC1_TX1 1 2 3 4
57 L1_TX1 1 2 100
58 L2_TX1 3 4 100
59 K_TX1 L1_TX1 L2_TX1 1 KRM8PL_3C8
60 .ends SCHEMATIC1_TX1
61  
62 **** RESUMING test.cir ****
63 .END
64