Rev Author Line No. Line
1096 mija 1 /* mija 2008
2 demo for RFM01 - RX 868MHz
3  
4 CPU ATMEGA8
5 fcpu = 1MHz
6  
7 !! define PIN,PORT,DDR for IOpin !!
8  
9 tested with module RFM12B - TX,9600,Fdev 15kHz
10 */
11  
12 #include <avr/io.h>
13 #include <util/delay.h>
14 #include "RFM01.h"
15  
16 //************************************************************************
17  
18 #define SDI PB3
19 #define SDI_PORT PORTB
20 #define SDI_DDR DDRB
1295 kaklik 21  
1096 mija 22 #define SDO PB4 // input for mega
23 #define SDO_PORT PORTB
24 #define SDO_DDR DDRB
1295 kaklik 25 #define SDO_PIN PINB
1096 mija 26  
27 #define SCK PB5
28 #define SCK_PORT PORTB
29 #define SCK_DDR DDRB
30  
31 #define nIRQ PD2 // input for mega
32 #define nIRQ_PORT PORTD
33 #define nIRQ_DDR DDRD
34 #define nIRQ_PIN PIND
35  
36 #define nSEL PB2
37 #define nSEL_PORT PORTB
38 #define nSEL_DDR DDRB
39  
40 #define LED PD3
41 #define LED_PORT PORTD
42 #define LED_DDR DDRD
43  
44 // interni
45 #define SDI_H SDI_PORT |= _BV(SDI)
46 #define SDI_L SDI_PORT &= (~(_BV(SDI)))
47 #define SDI_INIT SDI_DDR |= _BV(SDI)
48  
49 #define FSK_H FSK_PORT |= _BV(FSK)
50 #define FSK_L FSK_PORT &= (~(_BV(FSK)))
51 #define FSK_INIT FSK_DDR |= _BV(FSK)
52  
53 #define SDO_INPUT (SDO_PIN & _BV(SDO))
54 #define SDO_INIT SDO_DDR &= (~(_BV(SDO)))
55  
56 #define SCK_H SCK_PORT |= _BV(SCK)
57 #define SCK_L SCK_PORT &= (~(_BV(SCK)))
58 #define SCK_INIT SCK_DDR |= _BV(SCK)
59  
60 #define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ))
61 #define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ)))
62  
63 #define nSEL_H nSEL_PORT |= _BV(nSEL)
64 #define nSEL_L nSEL_PORT &= (~(_BV(nSEL)))
65 #define nSEL_INIT nSEL_DDR |= _BV(nSEL)
66  
67 #define LED_H LED_PORT |= _BV(LED)
68 #define LED_L LED_PORT &= (~(_BV(LED)))
69 #define LED_INIT LED_DDR |= _BV(LED)
70  
71 #define START_FIFO RF_WRITE_CMD(CMD_FIFO|FIFO_8|FIFO_VDI_WORD|FIFO_FF|FIFO_FE)
72 #define STOP_FIFO RF_WRITE_CMD(CMD_FIFO)
73  
74 //************************************************************************
75  
76 uint8_t rx_buf[16];
77  
78 //************************************************************************
79  
80 void delay_ms(uint16_t time)
81 {
82 while(time--) _delay_ms(1);
83 }
84  
85 void IO_INIT(void)
86 {
87 SDI_INIT;
88 SDO_INIT;
89 SCK_INIT;
90 nIRQ_INIT;
91 nSEL_INIT;
92 FSK_INIT;
93 LED_INIT;
94 }
95  
96 void RF_INIT(void)
97 {
98 nSEL_H;
99 SDI_H;
100 SCK_L;
101 nIRQ_INPUT;
102 SDO_INPUT;
103 FSK_H;
104 }
105  
106 uint16_t RF_WRITE_CMD(uint16_t cmd)
107 {
108 uint8_t i;
109 uint16_t temp;
110  
111 SCK_L;
112 nSEL_L;
113 temp=0;
114 for (i=0;i<16;i++)
115 {
116 if (cmd & 0x8000) SDI_H;
117 else SDI_L;
118 SCK_H;
119 cmd <<= 1;
120 temp <<= 1;
121 if(SDO_INPUT) temp |= 0x0001;
122 SCK_L;
123 }
124 SCK_L;
125 nSEL_H;
126 return (temp);
127 }
128  
129 void RF_WRITE_DATA(uint8_t data)
130 {
131 while (nIRQ_INPUT);
132 RF_WRITE_CMD(0xB800 + data);
133 }
134  
135 uint8_t RF_READ_DATA(void)
136 {
137 uint8_t i,result;
138  
139 while (nIRQ_INPUT);
140 SCK_L;
141 nSEL_L;
142 SDI_L;
143 result=0;
144 for (i=0;i<24;i++)
145 {
146 result <<= 1;
147 if (SDO_INPUT) result |= 0x01;
148 SCK_H;
149 SCK_L;
150 }
151 nSEL_H;
152 return (result);
153 }
154  
155 void RS232_INIT(void)
156 {
157 //set baud rate 9600 8N1 for Fosc 1MHz
158 UBRRH = 0;
159 UBRRL = 12;
160 UCSRB = (1<<RXEN)|(1<<TXEN); //enable RX TX
161 UCSRC = (1<<URSEL) |(3<<UCSZ0); //8N1
162 UCSRA |= _BV(U2X);
163 }
164  
165 void put_rs232(char data)
166 {
167 // Wait for empty transmit buffer
168 while ( !( UCSRA & (1<<UDRE)) );
169 // Put data into buffer, sends the data
170 UDR = data;
171 }
172  
173 int main()
174 {
175 uint8_t i,ChkSum;
176 uint8_t LED_TRG;
177 uint8_t b;
178  
179 IO_INIT();
180 RS232_INIT();
181 RF_INIT();
182 delay_ms(100);
183 LED_L;
184 LED_TRG=0;
185  
186  
187  
188 RF_WRITE_CMD(CMD_SETTING |BAND_868 | C_12pF | BANDWIDTH_67 | SETTING_DC);
189 RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868);
190 RF_WRITE_CMD(CMD_RATE |RATE_9600);
191 RF_WRITE_CMD(CMD_FILTER |FILTER_AL | FILTER_S0 | DQD_4);
192 RF_WRITE_CMD(CMD_AFC |AFC_POWER_ON | AFC_RANG_8 | AFC_ST | AFC_OE | AFC_EN);
193 RF_WRITE_CMD(CMD_RX);
194 RF_WRITE_CMD(CMD_RX |VDI_CLOCK | LNA_GAIN_0 | DRSSI_103 | RX_EN);
195 RF_WRITE_CMD(CMD_FIFO);
196  
197 while (1)
198 {
199  
200 START_FIFO;
201 ChkSum = 0;
202 for (i=0;i<16;i++)
203 {
204 b = RF_READ_DATA();
205 rx_buf[i] = b;
206 ChkSum += b;
207 }
208 b = RF_READ_DATA();
209 RF_READ_DATA();
210 STOP_FIFO;
211  
212 for (i=0;i<16;i++)
213 {
214 put_rs232(rx_buf[i]);
215 delay_ms(2);
216 }
217 if (ChkSum == b)
218 {
219 LED_TRG = ~ LED_TRG;
220 put_rs232(' ');
221 put_rs232('o');
222 put_rs232('k');
223 }
224 else
225 {
226 put_rs232('\n');
227 delay_ms(2);
228 put_rs232('\r');
229 delay_ms(2);
230 put_rs232('e');
231 put_rs232('r');
232 put_rs232('r');
233 }
234 if (LED_TRG) LED_H;
235 else LED_L;
236 }
237 return 0;
238 }
239  
240  
241