| Rev | Author | Line No. | Line |
|---|---|---|---|
| 922 | kaklik | 1 | //////////////////////////////////////////////////////////////////////////// |
| 2 | // //// |
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| 3 | // DEFINICE REGISTRU PROCESORU PIC16F877 //// |
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| 4 | // //// |
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| 5 | //////////////////////////////////////////////////////////////////////////// |
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| 6 | // //// |
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| 7 | // PEFI S.ICZ a.s 2002 //// |
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| 8 | // //// |
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| 9 | // Verze 1.0 //// |
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| 10 | // //// |
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| 11 | //////////////////////////////////////////////////////////////////////////// |
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| 12 | |||
| 13 | |||
| 14 | |||
| 15 | // registry v bance 0 |
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| 16 | #define INDF 0x00 |
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| 17 | #define TMR0 0x01 |
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| 18 | #define PCL 0x02 |
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| 19 | #define STATUS 0x03 |
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| 20 | #define FSR 0x04 |
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| 21 | #define PORTA 0x05 |
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| 22 | #define PORTB 0x06 |
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| 23 | #define PORTC 0x07 |
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| 24 | #define PORTD 0x08 |
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| 25 | #define PORTE 0x09 |
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| 26 | #define PCLATH 0x0A |
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| 27 | #define INTCON 0x0B |
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| 28 | #define PIR1 0x0C |
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| 29 | #define PIR2 0x0D |
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| 30 | #define TMR1L 0x0E |
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| 31 | #define TMR1H 0x0F |
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| 32 | #define T1CON 0x10 |
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| 33 | #define TMR2 0x11 |
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| 34 | #define T2CON 0x12 |
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| 35 | #define SSPBUF 0x13 |
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| 36 | #define SSPCON 0x14 |
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| 37 | #define CCPR1L 0x15 |
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| 38 | #define CCPR1H 0x16 |
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| 39 | #define CCP1CON 0x17 |
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| 40 | #define RCSTA 0x18 |
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| 41 | #define TXREG 0x19 |
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| 42 | #define RCREG 0x1A |
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| 43 | #define CCPR2L 0x1B |
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| 44 | #define CCPR2H 0x1C |
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| 45 | #define CCP2CON 0x1D |
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| 46 | #define ADRESH 0x1E |
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| 47 | #define ADCON0 0x1F |
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| 48 | |||
| 49 | // registry v bance 1 |
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| 50 | #define OPTION 0x81 |
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| 51 | #define TRISA 0x85 |
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| 52 | #define TRISB 0x86 |
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| 53 | #define TRISC 0x87 |
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| 54 | #define TRISD 0x88 |
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| 55 | #define TRISE 0x89 |
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| 56 | #define PIE1 0x8C |
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| 57 | #define PIE2 0x8D |
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| 58 | #define PCON 0x8E |
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| 59 | #define SSPCON2 0x91 |
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| 60 | #define PR2 0x92 |
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| 61 | #define SSPADD 0x93 |
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| 62 | #define SSPSTAT 0x94 |
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| 63 | #define TXSTA 0x98 |
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| 64 | #define SPBRG 0x99 |
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| 65 | #define ADRESL 0x9E |
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| 66 | #define ADCON1 0x9F |
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| 67 | |||
| 68 | // registry v bance 2 |
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| 69 | #define EEDATA 0x10C |
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| 70 | #define EEADR 0x10D |
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| 71 | #define EEDATH 0x10E |
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| 72 | #define EEADRH 0x10F |
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| 73 | |||
| 74 | // registry v bance 3 |
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| 75 | #define EECON1 0x18C |
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| 76 | #define EECON2 0x18D |
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| 77 | |||
| 78 | // bity v registru STATUS |
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| 79 | #define _IRP 7 |
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| 80 | #define _RP1 6 |
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| 81 | #define _RP0 5 |
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| 82 | #define _NOT_TO 4 |
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| 83 | #define _NOT_PD 3 |
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| 84 | #define _Z 2 |
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| 85 | #define _DC 1 |
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| 86 | #define _C 0 |
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| 87 | |||
| 88 | // bity v registru INTCON |
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| 89 | #define _GIE 7 |
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| 90 | #define _PEIE 6 |
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| 91 | #define _T0IE 5 |
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| 92 | #define _INTE 4 |
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| 93 | #define _RBIE 3 |
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| 94 | #define _T0IF 2 |
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| 95 | #define _INTF 1 |
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| 96 | #define _RBIF 0 |
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| 97 | |||
| 98 | // bity v registru PIR1 |
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| 99 | #define _PSPIF 7 |
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| 100 | #define _ADIF 6 |
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| 101 | #define _RCIF 5 |
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| 102 | #define _TXIF 4 |
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| 103 | #define _SSPIF 3 |
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| 104 | #define _CCP1IF 2 |
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| 105 | #define _TMR2IF 1 |
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| 106 | #define _TMR1IF 0 |
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| 107 | |||
| 108 | // bity v registru PIR2 |
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| 109 | #define _EEIF 4 |
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| 110 | #define _BCLIF 3 |
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| 111 | #define _CCP2IF 0 |
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| 112 | |||
| 113 | // bity v registru T1CON |
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| 114 | #define _T1CKPS1 5 |
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| 115 | #define _T1CKPS0 4 |
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| 116 | #define _T1OSCEN 3 |
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| 117 | #define _NOT_T1SYNC 2 |
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| 118 | #define _T1SYNC 2 |
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| 119 | #define _TMR1CS 1 |
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| 120 | #define _TMR1ON 0 |
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| 121 | |||
| 122 | // bity v registru T2CON |
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| 123 | #define _TOUTPS3 6 |
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| 124 | #define _TOUTPS2 5 |
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| 125 | #define _TOUTPS1 4 |
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| 126 | #define _TOUTPS0 3 |
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| 127 | #define _TMR2ON 2 |
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| 128 | #define _T2CKPS1 1 |
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| 129 | #define _T2CKPS0 0 |
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| 130 | |||
| 131 | // bity v registru SSPCON |
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| 132 | #define _WCOL 7 |
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| 133 | #define _SSPOV 6 |
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| 134 | #define _SSPEN 5 |
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| 135 | #define _CKP 4 |
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| 136 | #define _SSPM3 3 |
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| 137 | #define _SSPM2 2 |
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| 138 | #define _SSPM1 1 |
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| 139 | #define _SSPM0 0 |
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| 140 | |||
| 141 | // bity v registru CCP1CON |
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| 142 | #define _CCP1X 5 |
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| 143 | #define _CCP1Y 4 |
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| 144 | #define _CCP1M3 3 |
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| 145 | #define _CCP1M2 2 |
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| 146 | #define _CCP1M1 1 |
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| 147 | #define _CCP1M0 0 |
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| 148 | |||
| 149 | // bity v registru RCSTA |
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| 150 | #define _SPEN 7 |
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| 151 | #define _RX9 6 |
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| 152 | #define _SREN 5 |
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| 153 | #define _CREN 4 |
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| 154 | #define _ADDEN 3 |
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| 155 | #define _FERR 2 |
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| 156 | #define _OERR 1 |
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| 157 | #define _RX9D 0 |
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| 158 | |||
| 159 | // bity registru CCP2CON |
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| 160 | #define _CCP2X 5 |
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| 161 | #define _CCP2Y 4 |
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| 162 | #define _CCP2M3 3 |
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| 163 | #define _CCP2M2 2 |
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| 164 | #define _CCP2M1 1 |
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| 165 | #define _CCP2M0 0 |
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| 166 | |||
| 167 | // bity v registru ADCON0 |
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| 168 | #define _ADCS1 7 |
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| 169 | #define _ADCS0 6 |
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| 170 | #define _CHS2 5 |
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| 171 | #define _CHS1 4 |
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| 172 | #define _CHS0 3 |
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| 173 | #define _GO 2 |
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| 174 | #define _NOT_DONE 2 |
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| 175 | #define _GO_DONE 2 |
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| 176 | #define _ADON 0 |
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| 177 | |||
| 178 | // bity v registru OPTION |
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| 179 | #define _NOT_RBPU 7 |
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| 180 | #define _INTEDG 6 |
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| 181 | #define _T0CS 5 |
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| 182 | #define _T0SE 4 |
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| 183 | #define _PSA 3 |
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| 184 | #define _PS2 2 |
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| 185 | #define _PS1 1 |
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| 186 | #define _PS0 0 |
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| 187 | |||
| 188 | // bity v registru TRISE |
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| 189 | #define _IBF 7 |
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| 190 | #define _OBF 6 |
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| 191 | #define _IBOV 5 |
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| 192 | #define _PSPMODE 4 |
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| 193 | #define _TRISE2 2 |
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| 194 | #define _TRISE1 1 |
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| 195 | #define _TRISE0 0 |
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| 196 | |||
| 197 | // bity v registru PIE1 |
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| 198 | #define _PSPIE 7 |
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| 199 | #define _ADIE 6 |
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| 200 | #define _RCIE 5 |
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| 201 | #define _TXIE 4 |
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| 202 | #define _SSPIE 3 |
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| 203 | #define _CCP1IE 2 |
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| 204 | #define _TMR2IE 1 |
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| 205 | #define _TMR1IE 0 |
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| 206 | |||
| 207 | // bity v registru PIE2 |
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| 208 | #define _EEIE 4 |
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| 209 | #define _BCLIE 3 |
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| 210 | #define _CCP2IE 0 |
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| 211 | |||
| 212 | // bity v registru PCON |
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| 213 | #define _NOT_POR 1 |
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| 214 | #define _NOT_BOR 0 |
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| 215 | |||
| 216 | // bity v registu |
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| 217 | #define _GCEN 7 |
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| 218 | #define _ACKSTAT 6 |
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| 219 | #define _ACKDT 5 |
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| 220 | #define _ACKEN 4 |
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| 221 | #define _RCEN 3 |
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| 222 | #define _PEN 2 |
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| 223 | #define _RSEN 1 |
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| 224 | #define _SEN 0 |
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| 225 | |||
| 226 | //bity v registru SSPSTAT |
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| 227 | #define _SMP 7 |
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| 228 | #define _CKE 6 |
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| 229 | #define _D 5 |
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| 230 | #define _I2C_DATA 5 |
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| 231 | #define _NOT_A 5 |
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| 232 | #define _NOT_ADDRESS 5 |
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| 233 | #define _D_A 5 |
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| 234 | #define _DATA_ADDRESS 5 |
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| 235 | #define _P 4 |
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| 236 | #define _I2C_STOP 4 |
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| 237 | #define _S 3 |
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| 238 | #define _I2C_START 3 |
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| 239 | #define _R 2 |
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| 240 | #define _I2C_READ 2 |
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| 241 | #define _NOT_W 2 |
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| 242 | #define _NOT_WRITE 2 |
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| 243 | #define _R_W 2 |
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| 244 | #define _READ_WRITE 2 |
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| 245 | #define _UA 1 |
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| 246 | #define _BF 0 |
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| 247 | |||
| 248 | // bity v registru TXSTA |
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| 249 | #define CSRC 7 |
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| 250 | #define TX9 6 |
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| 251 | #define TXEN 5 |
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| 252 | #define SYNC 4 |
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| 253 | #define BRGH 2 |
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| 254 | #define TRMT 2 |
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| 255 | #define TX9D 0 |
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| 256 | |||
| 257 | // bity v registru ADCON1 |
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| 258 | #define _ADFM 7 |
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| 259 | #define _PCFG3 3 |
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| 260 | #define _PCFG2 2 |
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| 261 | #define _PCFG1 2 |
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| 262 | #define _PCFG0 0 |
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| 263 | |||
| 264 | // bity v registru EECON1 |
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| 265 | #define _EEPGD 7 |
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| 266 | #define _WRERR 3 |
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| 267 | #define _WREN 2 |
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| 268 | #define _WR 1 |
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| 269 | #define _RD 0 |
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| 270 | |||
| 271 | // masky pro nastaveni orientace I/O pinu |
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| 272 | #define PIN0_IN 0x01 |
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| 273 | #define PIN1_IN 0x02 |
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| 274 | #define PIN2_IN 0x04 |
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| 275 | #define PIN3_IN 0x08 |
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| 276 | #define PIN4_IN 0x10 |
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| 277 | #define PIN5_IN 0x20 |
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| 278 | #define PIN6_IN 0x40 |
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| 279 | #define PIN7_IN 0x80 |
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| 280 | |||
| 281 | #define PIN0_OUT ~0x01 |
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| 282 | #define PIN1_OUT ~0x02 |
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| 283 | #define PIN2_OUT ~0x04 |
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| 284 | #define PIN3_OUT ~0x08 |
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| 285 | #define PIN4_OUT ~0x10 |
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| 286 | #define PIN5_OUT ~0x20 |
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| 287 | #define PIN6_OUT ~0x40 |
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| 288 | #define PIN7_OUT ~0x80 |