Rev Author Line No. Line
2971 jichapav 1 <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
2 <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
3  
4 <SchemaVersion>1.1</SchemaVersion>
5  
6 <Header>### uVision Project, (C) Keil Software</Header>
7  
8 <Targets>
9 <Target>
10 <TargetName>Demo</TargetName>
11 <ToolsetNumber>0x4</ToolsetNumber>
12 <ToolsetName>ARM-ADS</ToolsetName>
13 <TargetOption>
14 <TargetCommonOption>
15 <Device>STM32L152RB</Device>
16 <Vendor>STMicroelectronics</Vendor>
17 <Cpu>IRAM(0x20000000-0x20003FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
18 <FlashUtilSpec></FlashUtilSpec>
19 <StartupFile>"STARTUP\ST\STM32L1xx\startup_stm32l1xx_md.s" ("STM32L15xx Medium density Startup Code")</StartupFile>
20 <FlashDriverDll>ULP2CM3(-O207 -S8 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000)</FlashDriverDll>
21 <DeviceId>5248</DeviceId>
22 <RegisterFile>stm32l1xx.h</RegisterFile>
23 <MemoryEnv></MemoryEnv>
24 <Cmp></Cmp>
25 <Asm></Asm>
26 <Linker></Linker>
27 <OHString></OHString>
28 <InfinionOptionDll></InfinionOptionDll>
29 <SLE66CMisc></SLE66CMisc>
30 <SLE66AMisc></SLE66AMisc>
31 <SLE66LinkerMisc></SLE66LinkerMisc>
32 <SFDFile>C:\Program Files\Keil\ARM\SFD\ST\STM32L1xx\STM32L152xD.SFR</SFDFile>
33 <UseEnv>0</UseEnv>
34 <BinPath></BinPath>
35 <IncludePath></IncludePath>
36 <LibPath></LibPath>
37 <RegisterFilePath>ST\STM32L1xx\</RegisterFilePath>
38 <DBRegisterFilePath>ST\STM32L1xx\</DBRegisterFilePath>
39 <TargetStatus>
40 <Error>0</Error>
41 <ExitCodeStop>0</ExitCodeStop>
42 <ButtonStop>0</ButtonStop>
43 <NotGenerated>0</NotGenerated>
44 <InvalidFlash>1</InvalidFlash>
45 </TargetStatus>
46 <OutputDirectory>.\obj\</OutputDirectory>
47 <OutputName>ch</OutputName>
48 <CreateExecutable>1</CreateExecutable>
49 <CreateLib>0</CreateLib>
50 <CreateHexFile>1</CreateHexFile>
51 <DebugInformation>1</DebugInformation>
52 <BrowseInformation>1</BrowseInformation>
53 <ListingPath>.\lst\</ListingPath>
54 <HexFormatSelection>1</HexFormatSelection>
55 <Merge32K>0</Merge32K>
56 <CreateBatchFile>0</CreateBatchFile>
57 <BeforeCompile>
58 <RunUserProg1>0</RunUserProg1>
59 <RunUserProg2>0</RunUserProg2>
60 <UserProg1Name></UserProg1Name>
61 <UserProg2Name></UserProg2Name>
62 <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
63 <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
64 <nStopU1X>0</nStopU1X>
65 <nStopU2X>0</nStopU2X>
66 </BeforeCompile>
67 <BeforeMake>
68 <RunUserProg1>0</RunUserProg1>
69 <RunUserProg2>0</RunUserProg2>
70 <UserProg1Name></UserProg1Name>
71 <UserProg2Name></UserProg2Name>
72 <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
73 <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
74 </BeforeMake>
75 <AfterMake>
76 <RunUserProg1>0</RunUserProg1>
77 <RunUserProg2>0</RunUserProg2>
78 <UserProg1Name></UserProg1Name>
79 <UserProg2Name></UserProg2Name>
80 <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
81 <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
82 </AfterMake>
83 <SelectedForBatchBuild>0</SelectedForBatchBuild>
84 <SVCSIdString></SVCSIdString>
85 </TargetCommonOption>
86 <CommonProperty>
87 <UseCPPCompiler>0</UseCPPCompiler>
88 <RVCTCodeConst>0</RVCTCodeConst>
89 <RVCTZI>0</RVCTZI>
90 <RVCTOtherData>0</RVCTOtherData>
91 <ModuleSelection>0</ModuleSelection>
92 <IncludeInBuild>1</IncludeInBuild>
93 <AlwaysBuild>0</AlwaysBuild>
94 <GenerateAssemblyFile>0</GenerateAssemblyFile>
95 <AssembleAssemblyFile>0</AssembleAssemblyFile>
96 <PublicsOnly>0</PublicsOnly>
97 <StopOnExitCode>3</StopOnExitCode>
98 <CustomArgument></CustomArgument>
99 <IncludeLibraryModules></IncludeLibraryModules>
100 </CommonProperty>
101 <DllOption>
102 <SimDllName>SARMCM3.DLL</SimDllName>
103 <SimDllArguments></SimDllArguments>
104 <SimDlgDll>DCM.DLL</SimDlgDll>
105 <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
106 <TargetDllName>SARMCM3.DLL</TargetDllName>
107 <TargetDllArguments></TargetDllArguments>
108 <TargetDlgDll>TCM.DLL</TargetDlgDll>
109 <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
110 </DllOption>
111 <DebugOption>
112 <OPTHX>
113 <HexSelection>1</HexSelection>
114 <HexRangeLowAddress>0</HexRangeLowAddress>
115 <HexRangeHighAddress>0</HexRangeHighAddress>
116 <HexOffset>0</HexOffset>
117 <Oh166RecLen>16</Oh166RecLen>
118 </OPTHX>
119 <Simulator>
120 <UseSimulator>0</UseSimulator>
121 <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
122 <RunToMain>1</RunToMain>
123 <RestoreBreakpoints>1</RestoreBreakpoints>
124 <RestoreWatchpoints>1</RestoreWatchpoints>
125 <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
126 <RestoreFunctions>1</RestoreFunctions>
127 <RestoreToolbox>1</RestoreToolbox>
128 <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
129 </Simulator>
130 <Target>
131 <UseTarget>1</UseTarget>
132 <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
133 <RunToMain>0</RunToMain>
134 <RestoreBreakpoints>1</RestoreBreakpoints>
135 <RestoreWatchpoints>1</RestoreWatchpoints>
136 <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
137 <RestoreFunctions>0</RestoreFunctions>
138 <RestoreToolbox>1</RestoreToolbox>
139 <RestoreTracepoints>0</RestoreTracepoints>
140 </Target>
141 <RunDebugAfterBuild>0</RunDebugAfterBuild>
142 <TargetSelection>13</TargetSelection>
143 <SimDlls>
144 <CpuDll></CpuDll>
145 <CpuDllArguments></CpuDllArguments>
146 <PeripheralDll></PeripheralDll>
147 <PeripheralDllArguments></PeripheralDllArguments>
148 <InitializationFile></InitializationFile>
149 </SimDlls>
150 <TargetDlls>
151 <CpuDll></CpuDll>
152 <CpuDllArguments></CpuDllArguments>
153 <PeripheralDll></PeripheralDll>
154 <PeripheralDllArguments></PeripheralDllArguments>
155 <InitializationFile></InitializationFile>
156 <Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
157 </TargetDlls>
158 </DebugOption>
159 <Utilities>
160 <Flash1>
161 <UseTargetDll>1</UseTargetDll>
162 <UseExternalTool>0</UseExternalTool>
163 <RunIndependent>0</RunIndependent>
164 <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
165 <Capability>1</Capability>
166 <DriverSelection>4104</DriverSelection>
167 </Flash1>
168 <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
169 <Flash3>"" ()</Flash3>
170 <Flash4></Flash4>
171 </Utilities>
172 <TargetArmAds>
173 <ArmAdsMisc>
174 <GenerateListings>0</GenerateListings>
175 <asHll>1</asHll>
176 <asAsm>1</asAsm>
177 <asMacX>1</asMacX>
178 <asSyms>1</asSyms>
179 <asFals>1</asFals>
180 <asDbgD>1</asDbgD>
181 <asForm>1</asForm>
182 <ldLst>0</ldLst>
183 <ldmm>1</ldmm>
184 <ldXref>1</ldXref>
185 <BigEnd>0</BigEnd>
186 <AdsALst>1</AdsALst>
187 <AdsACrf>1</AdsACrf>
188 <AdsANop>0</AdsANop>
189 <AdsANot>0</AdsANot>
190 <AdsLLst>1</AdsLLst>
191 <AdsLmap>1</AdsLmap>
192 <AdsLcgr>1</AdsLcgr>
193 <AdsLsym>1</AdsLsym>
194 <AdsLszi>1</AdsLszi>
195 <AdsLtoi>1</AdsLtoi>
196 <AdsLsun>1</AdsLsun>
197 <AdsLven>1</AdsLven>
198 <AdsLsxf>1</AdsLsxf>
199 <RvctClst>0</RvctClst>
200 <GenPPlst>0</GenPPlst>
201 <AdsCpuType>"Cortex-M3"</AdsCpuType>
202 <RvctDeviceName></RvctDeviceName>
203 <mOS>0</mOS>
204 <uocRom>0</uocRom>
205 <uocRam>0</uocRam>
206 <hadIROM>1</hadIROM>
207 <hadIRAM>1</hadIRAM>
208 <hadXRAM>0</hadXRAM>
209 <uocXRam>0</uocXRam>
210 <RvdsVP>0</RvdsVP>
211 <hadIRAM2>0</hadIRAM2>
212 <hadIROM2>0</hadIROM2>
213 <StupSel>8</StupSel>
214 <useUlib>0</useUlib>
215 <EndSel>0</EndSel>
216 <uLtcg>0</uLtcg>
217 <RoSelD>3</RoSelD>
218 <RwSelD>3</RwSelD>
219 <CodeSel>0</CodeSel>
220 <OptFeed>0</OptFeed>
221 <NoZi1>0</NoZi1>
222 <NoZi2>0</NoZi2>
223 <NoZi3>0</NoZi3>
224 <NoZi4>0</NoZi4>
225 <NoZi5>0</NoZi5>
226 <Ro1Chk>0</Ro1Chk>
227 <Ro2Chk>0</Ro2Chk>
228 <Ro3Chk>0</Ro3Chk>
229 <Ir1Chk>1</Ir1Chk>
230 <Ir2Chk>0</Ir2Chk>
231 <Ra1Chk>0</Ra1Chk>
232 <Ra2Chk>0</Ra2Chk>
233 <Ra3Chk>0</Ra3Chk>
234 <Im1Chk>1</Im1Chk>
235 <Im2Chk>1</Im2Chk>
236 <OnChipMemories>
237 <Ocm1>
238 <Type>0</Type>
239 <StartAddress>0x0</StartAddress>
240 <Size>0x0</Size>
241 </Ocm1>
242 <Ocm2>
243 <Type>0</Type>
244 <StartAddress>0x0</StartAddress>
245 <Size>0x0</Size>
246 </Ocm2>
247 <Ocm3>
248 <Type>0</Type>
249 <StartAddress>0x0</StartAddress>
250 <Size>0x0</Size>
251 </Ocm3>
252 <Ocm4>
253 <Type>0</Type>
254 <StartAddress>0x0</StartAddress>
255 <Size>0x0</Size>
256 </Ocm4>
257 <Ocm5>
258 <Type>0</Type>
259 <StartAddress>0x0</StartAddress>
260 <Size>0x0</Size>
261 </Ocm5>
262 <Ocm6>
263 <Type>0</Type>
264 <StartAddress>0x0</StartAddress>
265 <Size>0x0</Size>
266 </Ocm6>
267 <IRAM>
268 <Type>0</Type>
269 <StartAddress>0x20000000</StartAddress>
270 <Size>0x4000</Size>
271 </IRAM>
272 <IROM>
273 <Type>1</Type>
274 <StartAddress>0x8000000</StartAddress>
275 <Size>0x20000</Size>
276 </IROM>
277 <XRAM>
278 <Type>0</Type>
279 <StartAddress>0x0</StartAddress>
280 <Size>0x0</Size>
281 </XRAM>
282 <OCR_RVCT1>
283 <Type>1</Type>
284 <StartAddress>0x0</StartAddress>
285 <Size>0x0</Size>
286 </OCR_RVCT1>
287 <OCR_RVCT2>
288 <Type>1</Type>
289 <StartAddress>0x0</StartAddress>
290 <Size>0x0</Size>
291 </OCR_RVCT2>
292 <OCR_RVCT3>
293 <Type>1</Type>
294 <StartAddress>0x0</StartAddress>
295 <Size>0x0</Size>
296 </OCR_RVCT3>
297 <OCR_RVCT4>
298 <Type>1</Type>
299 <StartAddress>0x8000000</StartAddress>
300 <Size>0x20000</Size>
301 </OCR_RVCT4>
302 <OCR_RVCT5>
303 <Type>1</Type>
304 <StartAddress>0x0</StartAddress>
305 <Size>0x0</Size>
306 </OCR_RVCT5>
307 <OCR_RVCT6>
308 <Type>0</Type>
309 <StartAddress>0x0</StartAddress>
310 <Size>0x0</Size>
311 </OCR_RVCT6>
312 <OCR_RVCT7>
313 <Type>0</Type>
314 <StartAddress>0x0</StartAddress>
315 <Size>0x0</Size>
316 </OCR_RVCT7>
317 <OCR_RVCT8>
318 <Type>0</Type>
319 <StartAddress>0x0</StartAddress>
320 <Size>0x0</Size>
321 </OCR_RVCT8>
322 <OCR_RVCT9>
323 <Type>0</Type>
324 <StartAddress>0x20000000</StartAddress>
325 <Size>0x4000</Size>
326 </OCR_RVCT9>
327 <OCR_RVCT10>
328 <Type>0</Type>
329 <StartAddress>0x20004000</StartAddress>
330 <Size>0x1</Size>
331 </OCR_RVCT10>
332 </OnChipMemories>
333 <RvctStartVector></RvctStartVector>
334 </ArmAdsMisc>
335 <Cads>
336 <interw>1</interw>
337 <Optim>4</Optim>
338 <oTime>1</oTime>
339 <SplitLS>0</SplitLS>
340 <OneElfS>0</OneElfS>
341 <Strict>0</Strict>
342 <EnumInt>0</EnumInt>
343 <PlainCh>0</PlainCh>
344 <Ropi>0</Ropi>
345 <Rwpi>0</Rwpi>
346 <wLevel>0</wLevel>
347 <uThumb>0</uThumb>
348 <uSurpInc>0</uSurpInc>
349 <VariousControls>
350 <MiscControls></MiscControls>
351 <Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
352 <Undefine></Undefine>
353 <IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\common\ARMCMx;..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\os\hal\platforms\STM32\SPIv1;..\..\..\os\hal\platforms\STM32\USARTv1;..\..\..\os\hal\platforms\STM32L1xx;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\test</IncludePath>
354 </VariousControls>
355 </Cads>
356 <Aads>
357 <interw>1</interw>
358 <Ropi>0</Ropi>
359 <Rwpi>0</Rwpi>
360 <thumb>0</thumb>
361 <SplitLS>0</SplitLS>
362 <SwStkChk>0</SwStkChk>
363 <NoWarn>0</NoWarn>
364 <uSurpInc>0</uSurpInc>
365 <VariousControls>
366 <MiscControls>--cpreproc</MiscControls>
367 <Define></Define>
368 <Undefine></Undefine>
369 <IncludePath>..\;..\..\..\boards\ST_STM32L_DISCOVERY;..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx</IncludePath>
370 </VariousControls>
371 </Aads>
372 <LDads>
373 <umfTarg>1</umfTarg>
374 <Ropi>0</Ropi>
375 <Rwpi>0</Rwpi>
376 <noStLib>0</noStLib>
377 <RepFail>1</RepFail>
378 <useFile>0</useFile>
379 <TextAddressRange>0x08000000</TextAddressRange>
380 <DataAddressRange>0x20000000</DataAddressRange>
381 <ScatterFile></ScatterFile>
382 <IncludeLibs></IncludeLibs>
383 <IncludeLibsPath></IncludeLibsPath>
384 <Misc></Misc>
385 <LinkerInputFile></LinkerInputFile>
386 <DisabledWarnings></DisabledWarnings>
387 </LDads>
388 </TargetArmAds>
389 </TargetOption>
390 <Groups>
391 <Group>
392 <GroupName>board</GroupName>
393 <Files>
394 <File>
395 <FileName>board.c</FileName>
396 <FileType>1</FileType>
397 <FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.c</FilePath>
398 </File>
399 <File>
400 <FileName>board.h</FileName>
401 <FileType>5</FileType>
402 <FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.h</FilePath>
403 </File>
404 </Files>
405 </Group>
406 <Group>
407 <GroupName>port</GroupName>
408 <Files>
409 <File>
410 <FileName>cstartup.s</FileName>
411 <FileType>2</FileType>
412 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\cstartup.s</FilePath>
413 </File>
414 <File>
415 <FileName>chcoreasm_v7m.s</FileName>
416 <FileType>2</FileType>
417 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s</FilePath>
418 </File>
419 <File>
420 <FileName>chcore.c</FileName>
421 <FileType>1</FileType>
422 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.c</FilePath>
423 </File>
424 <File>
425 <FileName>chcore_v7m.c</FileName>
426 <FileType>1</FileType>
427 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c</FilePath>
428 </File>
429 <File>
430 <FileName>chcore.h</FileName>
431 <FileType>5</FileType>
432 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.h</FilePath>
433 </File>
434 <File>
435 <FileName>chcore_v7m.h</FileName>
436 <FileType>5</FileType>
437 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.h</FilePath>
438 </File>
439 <File>
440 <FileName>chtypes.h</FileName>
441 <FileType>5</FileType>
442 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chtypes.h</FilePath>
443 </File>
444 <File>
445 <FileName>cmparams.h</FileName>
446 <FileType>5</FileType>
447 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx\cmparams.h</FilePath>
448 </File>
449 <File>
450 <FileName>vectors.s</FileName>
451 <FileType>2</FileType>
452 <FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32L1xx\vectors.s</FilePath>
453 </File>
454 <File>
455 <FileName>nvic.c</FileName>
456 <FileType>1</FileType>
457 <FilePath>..\..\..\os\ports\common\ARMCMx\nvic.c</FilePath>
458 </File>
459 <File>
460 <FileName>nvic.h</FileName>
461 <FileType>5</FileType>
462 <FilePath>..\..\..\os\ports\common\ARMCMx\nvic.h</FilePath>
463 </File>
464 </Files>
465 </Group>
466 <Group>
467 <GroupName>kernel</GroupName>
468 <Files>
469 <File>
470 <FileName>chcond.c</FileName>
471 <FileType>1</FileType>
472 <FilePath>..\..\..\os\kernel\src\chcond.c</FilePath>
473 </File>
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475 <FileName>chdebug.c</FileName>
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480 <FileName>chdynamic.c</FileName>
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482 <FilePath>..\..\..\os\kernel\src\chdynamic.c</FilePath>
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485 <FileName>chevents.c</FileName>
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490 <FileName>chheap.c</FileName>
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500 <FileName>chmboxes.c</FileName>
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502 <FilePath>..\..\..\os\kernel\src\chmboxes.c</FilePath>
503 </File>
504 <File>
505 <FileName>chmemcore.c</FileName>
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507 <FilePath>..\..\..\os\kernel\src\chmemcore.c</FilePath>
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509 <File>
510 <FileName>chmempools.c</FileName>
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512 <FilePath>..\..\..\os\kernel\src\chmempools.c</FilePath>
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514 <File>
515 <FileName>chmsg.c</FileName>
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517 <FilePath>..\..\..\os\kernel\src\chmsg.c</FilePath>
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558 </File>
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563 </File>
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573 </File>
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575 <FileName>chdebug.h</FileName>
576 <FileType>5</FileType>
577 <FilePath>..\..\..\os\kernel\include\chdebug.h</FilePath>
578 </File>
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580 <FileName>chdynamic.h</FileName>
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582 <FilePath>..\..\..\os\kernel\include\chdynamic.h</FilePath>
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585 <FileName>chevents.h</FileName>
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593 </File>
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595 <FileName>chheap.h</FileName>
596 <FileType>5</FileType>
597 <FilePath>..\..\..\os\kernel\include\chheap.h</FilePath>
598 </File>
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600 <FileName>chinline.h</FileName>
601 <FileType>5</FileType>
602 <FilePath>..\..\..\os\kernel\include\chinline.h</FilePath>
603 </File>
604 <File>
605 <FileName>chioch.h</FileName>
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870 </Group>
871 </Groups>
872 </Target>
873 </Targets>
874  
875 </Project>