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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio |
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Licensed under the Apache License, Version 2.0 (the "License"); |
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you may not use this file except in compliance with the License. |
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You may obtain a copy of the License at |
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http://www.apache.org/licenses/LICENSE-2.0 |
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Unless required by applicable law or agreed to in writing, software |
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distributed under the License is distributed on an "AS IS" BASIS, |
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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See the License for the specific language governing permissions and |
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limitations under the License. |
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*/ |
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/* |
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* STM32L1xx drivers configuration. |
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* The following settings override the default settings present in |
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* the various device driver implementation headers. |
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* Note that the settings for each driver only have effect if the whole |
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* driver is enabled in halconf.h. |
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* |
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* IRQ priorities: |
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* 15...0 Lowest...Highest. |
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* |
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* DMA priorities: |
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* 0...3 Lowest...Highest. |
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*/ |
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#define STM32L1xx_MCUCONF |
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/* |
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* HAL driver system settings. |
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*/ |
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#define STM32_NO_INIT FALSE |
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#define STM32_HSI_ENABLED TRUE |
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#define STM32_LSI_ENABLED TRUE |
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#define STM32_HSE_ENABLED FALSE |
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#define STM32_LSE_ENABLED TRUE |
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#define STM32_ADC_CLOCK_ENABLED FALSE |
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#define STM32_USB_CLOCK_ENABLED FALSE |
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#define STM32_MSIRANGE STM32_MSIRANGE_2M |
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#define STM32_SW STM32_SW_PLL |
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#define STM32_PLLSRC STM32_PLLSRC_HSI |
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#define STM32_PLLMUL_VALUE 6 |
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#define STM32_PLLDIV_VALUE 3 |
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#define STM32_HPRE STM32_HPRE_DIV1 |
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#define STM32_PPRE1 STM32_PPRE1_DIV1 |
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#define STM32_PPRE2 STM32_PPRE2_DIV1 |
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#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK |
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#define STM32_MCOPRE STM32_MCOPRE_DIV1 |
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#define STM32_RTCSEL STM32_RTCSEL_LSE |
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#define STM32_RTCPRE STM32_RTCPRE_DIV2 |
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#define STM32_VOS STM32_VOS_1P8 |
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#define STM32_PVD_ENABLE FALSE |
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#define STM32_PLS STM32_PLS_LEV0 |
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/* |
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* ADC driver system settings. |
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*/ |
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#define STM32_ADC_USE_ADC1 FALSE |
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#define STM32_ADC_ADC1_DMA_PRIORITY 2 |
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#define STM32_ADC_IRQ_PRIORITY 6 |
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#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 |
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/* |
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* EXT driver system settings. |
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*/ |
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#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 |
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#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 |
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/* |
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* GPT driver system settings. |
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*/ |
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#define STM32_GPT_USE_TIM2 TRUE |
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#define STM32_GPT_USE_TIM3 FALSE |
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#define STM32_GPT_USE_TIM4 FALSE |
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#define STM32_GPT_TIM2_IRQ_PRIORITY 7 |
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#define STM32_GPT_TIM3_IRQ_PRIORITY 7 |
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#define STM32_GPT_TIM4_IRQ_PRIORITY 7 |
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/* |
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* I2C driver system settings. |
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*/ |
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#define STM32_I2C_USE_I2C1 FALSE |
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#define STM32_I2C_USE_I2C2 FALSE |
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#define STM32_I2C_I2C1_IRQ_PRIORITY 5 |
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#define STM32_I2C_I2C2_IRQ_PRIORITY 5 |
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#define STM32_I2C_I2C1_DMA_PRIORITY 3 |
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#define STM32_I2C_I2C2_DMA_PRIORITY 3 |
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#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() |
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#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() |
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/* |
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* ICU driver system settings. |
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*/ |
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#define STM32_ICU_USE_TIM2 FALSE |
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#define STM32_ICU_USE_TIM3 FALSE |
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#define STM32_ICU_USE_TIM4 FALSE |
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7 |
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7 |
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7 |
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/* |
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* PWM driver system settings. |
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*/ |
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#define STM32_PWM_USE_TIM2 FALSE |
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#define STM32_PWM_USE_TIM3 FALSE |
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#define STM32_PWM_USE_TIM4 FALSE |
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7 |
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7 |
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7 |
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/* |
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* SERIAL driver system settings. |
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*/ |
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#define STM32_SERIAL_USE_USART1 TRUE |
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#define STM32_SERIAL_USE_USART2 TRUE |
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#define STM32_SERIAL_USE_USART3 FALSE |
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#define STM32_SERIAL_USART1_PRIORITY 12 |
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#define STM32_SERIAL_USART2_PRIORITY 12 |
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#define STM32_SERIAL_USART3_PRIORITY 12 |
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/* |
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* SPI driver system settings. |
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*/ |
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#define STM32_SPI_USE_SPI1 FALSE |
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#define STM32_SPI_USE_SPI2 FALSE |
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#define STM32_SPI_SPI1_DMA_PRIORITY 1 |
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#define STM32_SPI_SPI2_DMA_PRIORITY 1 |
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10 |
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10 |
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#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() |
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/* |
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* UART driver system settings. |
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*/ |
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#define STM32_UART_USE_USART1 FALSE |
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#define STM32_UART_USE_USART2 FALSE |
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#define STM32_UART_USE_USART3 FALSE |
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#define STM32_UART_USART1_IRQ_PRIORITY 12 |
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#define STM32_UART_USART2_IRQ_PRIORITY 12 |
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#define STM32_UART_USART3_IRQ_PRIORITY 12 |
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#define STM32_UART_USART1_DMA_PRIORITY 0 |
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#define STM32_UART_USART2_DMA_PRIORITY 0 |
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#define STM32_UART_USART3_DMA_PRIORITY 0 |
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#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() |
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/* |
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* USB driver system settings. |
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*/ |
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#define STM32_USB_USE_USB1 FALSE |
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#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE |
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#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 |
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#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 |