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kakl |
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/********************************************* |
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* |
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* draft version v 0.1, experimental |
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* |
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* code based on the code of "benedikt k." |
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* this was an avr project from the site: http://www.mikrocontroller.net/topic/65984#541030 |
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* |
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* |
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* code should be matched with RF01 |
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* |
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* up to now no transmission between the RF12 modules and Jeelabs.com RF12 lib |
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* |
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* this code has worked: transmitting using atmega168 and atmega328 in combination with RF01s and RF02s |
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* |
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* arduino 18 |
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* |
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* five march, contrechoc.com, june 2010 , october 2010 |
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* |
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* |
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*********************************************/ |
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#include <avr/io.h> |
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#include <avr/interrupt.h> |
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#include <avr/pgmspace.h> |
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#include <avr/eeprom.h> |
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#include <stdlib.h> |
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#include "rf01.h" |
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#define F_CPU 16000000UL |
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#include <util/delay.h> |
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#define RF_PORT PORTB |
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#define RF_DDR DDRB |
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#define RF_PIN PINB |
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#define SDI 5 // RF01 SDI, arduino 13 cannot be changed |
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#define SCK 4 // RF01 SCK, arduino 12 cannot be changed |
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#define CS 3 // RF01 nSEL, arduino 11 cannot be changed |
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#define SDO 2 // RF01 SDO, arduino 10 cannot be changed |
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//----------------- // RF01 niRQ, arduino 02 cannot be changed |
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//------------------// RF01 nFFS: 1-10k Pullup too Vcc |
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#ifndef cbi |
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#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) |
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#endif |
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#ifndef sbi |
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#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) |
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#endif |
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// maximum receive buffer |
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#define RF_MAX 32 |
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unsigned char rf01_buf[RF_MAX]; // recv buf |
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#include <util/delay.h> |
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void rf01_receive(){ |
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kakl |
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rf01_rxdata(rf01_data, 23); //!!!32 |
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kakl |
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} |
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kakl |
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static unsigned char sdrssi, sgain; |
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kakl |
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kakl |
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void rf01_prepAll() |
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{ |
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RF_PORT=(1<<CS); |
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RF_DDR=(1<<SDI)|(1<<SCK)|(1<<CS); |
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for (unsigned char i=0; i<11; i++) _delay_ms(10); // wait until POR done |
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// rf01_trans(0xC2E0); // AVR CLK: 10MHz |
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// rf01_trans(0xC42B); // Data Filter: internal |
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// rf01_trans(0xC6F7); // AFC settings: autotuning: -10kHz...+7,5kHz |
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// rf01_trans(0xE000); // disable wakeuptimer |
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// rf01_trans(0xCC00); // disable low duty cycle |
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// rf01_trans(0x8978); // band 433MHz, enable crystal + 12pF, 200kHz bandwidth |
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rf01_trans(0x0000); |
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// rf01_trans(0x898A); // band 433MHz, 134kHz bandwidth |
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rf01_trans(0x8000|0x1000|0x70|0x02); //band |
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rf01_trans(0xA640); //434MHz |
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rf01_trans(0xC823); //!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! 9600 Bd |
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rf01_trans(0xC69B); |
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rf01_trans(0xC42A); |
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rf01_trans(0xC240); //* |
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rf01_trans(0xC080); //* |
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rf01_trans(0xCE88); // FIFO mode |
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rf01_trans(0xCE8B); //* |
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rf01_trans(0xC081); //* |
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kakl |
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} |
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void rf01_trans(unsigned short wert) |
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{ unsigned char i; |
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cbi(RF_PORT, CS); |
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for (i=0; i<16; i++) |
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{ if (wert&32768) |
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sbi(RF_PORT, SDI); |
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else |
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cbi(RF_PORT, SDI); |
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sbi(RF_PORT, SCK); |
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wert<<=1; |
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_delay_us(0.2); |
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cbi(RF_PORT, SCK); |
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} |
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sbi(RF_PORT, CS); |
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} |
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void rf01_rxdata(unsigned char *data, unsigned char number) |
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{ unsigned char i,j,c; |
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kakl |
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//!!! |
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// sgain=2; //2,4 -6dB LNA gain, DRSSI threshold: -79dBm |
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// sdrssi=4; |
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//!!! rf01_trans(0xC0C1|((sgain&3)<<4)|((sdrssi&7)<<1)); // RX on |
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kakl |
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rf01_trans(0xCE89); // set FIFO mode |
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rf01_trans(0xCE8B); // enable FIFO |
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cbi(RF_PORT, SDI); |
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kakl |
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asm("nop"); |
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asm("nop"); |
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asm("nop"); |
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kakl |
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for (i=0; i<number; i++) |
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{ cbi(RF_PORT, CS); |
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kakl |
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asm("nop"); |
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asm("nop"); |
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asm("nop"); |
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kakl |
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while (!(RF_PIN&(1<<SDO))); // wait until data in FIFO |
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for (j=0; j<16; j++) // read and discard status register |
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kakl |
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{ |
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sbi(RF_PORT, SCK); |
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kakl |
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asm("nop"); |
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kakl |
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asm("nop"); |
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asm("nop"); |
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kakl |
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cbi(RF_PORT, SCK); |
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kakl |
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asm("nop"); |
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asm("nop"); |
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asm("nop"); |
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kakl |
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} |
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c=0; |
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for (j=0; j<8; j++) |
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{ c<<=1; |
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if (RF_PIN&(1<<SDO)) |
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c|=1; |
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sbi(RF_PORT, SCK); |
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kakl |
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asm("nop"); |
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asm("nop"); |
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asm("nop"); |
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//!!! _delay_us(0.2); |
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kakl |
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cbi(RF_PORT, SCK); |
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kakl |
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asm("nop"); |
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asm("nop"); |
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asm("nop"); |
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kakl |
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} |
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*data++=c; |
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sbi(RF_PORT, CS); |
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kakl |
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asm("nop"); |
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asm("nop"); |
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asm("nop"); |
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kakl |
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} |
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kakl |
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//!!! rf01_trans(0xC0C0|((sgain&3)<<4)|((sdrssi&7)<<1)); // RX off |
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kakl |
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} |