Rev Author Line No. Line
1177 mija 1 /* mija 2008
2 defines for module RFM01 - RX 868MHz
3 */
4  
5 #define CMD_SETTING 0x8000 // b1, b0, eb, et, ex, x3..x0, i2..i0, dc
6 #define CMD_FREQUENCY 0xA000 // f11..f0 860+F*0.005 MHz 36..3903
7 #define CMD_RATE 0xC800 // cs, r6..r0 BR=10M/29/(R+1)/1+cs*7)
8 #define CMD_RX 0xC000 // d1, d0, g1, g0, r2..r0, en
9 #define CMD_FILTER 0xC420 // al, ml, s1, s0, f2..f0
10 #define CMD_FIFO 0xCE00 // f3..f0, s1, s0, ff, fe
11 #define CMD_AFC 0xC600 // a1, a0, rl1, rl0, st, fi, oe, en
12 #define CMD_WAKE_UP 0xE000 // r4..r0, m7..m0 T=M*2^R [ms]
13 #define CMD_DUTY 0xCC00 // d6..d0 D.C.= (D*2+1)/M*100%
14 #define CMD_BATTERY 0xC200 // d2..d0, t4..t0
15 #define CMD_STATUS 0x0000 // for read status
16  
17 // CMD_SETTING
18 #define BAND_315 0x0000
19 #define BAND_433 0x800
20 #define BAND_868 0x1000
21 #define BADN_915 0x1800
22 #define SETTING_EB 0x400 // enable low battery detect
23 #define SETTING_ET 0x200 // enable wake-up timer
24 #define SETTING_EX 0x100 // enable crystal oscilator
25 #define C_8_5pF 0x00
26 #define C_9pF 0x10
27 #define C_9_5pF 0x20
28 #define C_10pF 0x30
29 #define C_10_5pF 0x40
30 #define C_11pF 0x50
31 #define C_11_5pF 0x60
32 #define C_12pF 0x70
33 #define C_12_5pF 0x80
34 #define C_13pF 0x90
35 #define C_13_5pF 0xA0
36 #define C_14pF 0xB0
37 #define C_14_5pF 0xC0
38 #define C_15pF 0xD0
39 #define C_15_5pF 0xE0
40 #define C_16pF 0xF0
41 #define BANDWIDTH_400 0x02 // baseband bandwidth[kHz]
42 #define BANDWIDTH_340 0x04
43 #define BANDWIDTH_270 0x06
44 #define BANDWIDTH_200 0x08
45 #define BANDWIDTH_134 0x0A
46 #define BANDWIDTH_67 0x0C
47 #define SETTING_DC 0x01 // disable siglanl of CLK pin
48  
49 // CMD_FREQUENCY
50 #define FREQUENCY_867 0x578
51 #define FREQUENCY_868 0x640
52 #define FREQUENCY_869 0x708
53  
54 // CMD_RATE
55 #define RATE_1200 0x123
56 #define RATE_2400 0x8F
57 #define RATE_4800 0x47
58 #define RATE_CS_4800 0x108
59 #define RATE_9600 0x23
60 #define RATE_19200 0x11
61 #define RATE_38400 0x8
62 #define RATE_57600 0x5
63 #define RATE_115200 0x2
64  
65 // CMD_RX
66 #define VDI_RSSI 0x00 // VDI response time
67 #define VDI_DQD 0x40
68 #define VDI_CLOCK 0x80
69 #define VDI_ALWAYS_ON 0xC0
70 #define LNA_GAIN_0 0x00 // LNA_GAIN
71 #define LNA_GAIN_6 0x10 // -6dBm
72 #define LNA_GAIN_14 0x20 // -14dBm
73 #define LNA_GAIN_20 0x30 // -20dBm
74 #define DRSSI_103 0x00 // RSSI= DRSSI + LNA_GAIN -103dBm
75 #define DRSSI_97 0x02 // -97dBm
76 #define DRSSI_91 0x04 // -91dBm
77 #define DRSSI_85 0x06 // -85dBm
78 #define DRSSI_79 0x08 // -79dBm
79 #define DRSSI_73 0x0A // -73dBm
80 #define DRSSI_67 0x0C // -67dBm
81 #define DRSSI_61 0x0E // -61dBm
82 #define RX_EN 0x01 // enablel receiver
83  
84 // CMD_FILTER
85 #define FILTER_AL 0x80 // enable clock recovery atuo-lock
86 #define FILTER_ML 0x40 // enable clock recovery fast mode
87 #define FILTER_S0 0x08 // enable digital filter
88 #define DQD_7 0x7
89 #define DQD_6 0x6
90 #define DQD_5 0x5
91 #define DQD_4 0x4
92 #define DQD_3 0x3
93 #define DQD_2 0x2
94 #define DQD_1 0x1
95 #define DQD_0 0x0
96  
97 // CMD_FIFO
98 #define FIFO_16 0x00 // FIFO level
99 #define FIFO_15 0xF0
100 #define FIFO_14 0xE0
101 #define FIFO_13 0xD0
102 #define FIFO_12 0xC0
103 #define FIFO_11 0xB0
104 #define FIFO_10 0xA0
105 #define FIFO_9 0x90
106 #define FIFO_8 0x80
107 #define FIFO_7 0x70
108 #define FIFO_6 0x60
109 #define FIFO_5 0x50
110 #define FIFO_4 0x40
111 #define FIFO_3 0x30
112 #define FIFO_2 0x20
113 #define FIFO_1 0x10
114 #define FIFO_VDI 0x00 // FIFO start VDI
115 #define FIFO_SYNC_WORD 0x04 //
116 #define FIFO_VDI_WORD 0x08 //
117 #define FIFO_ALWAYS 0x0C //
118 #define FIFO_FF 0x02 // enable FIFO fill
119 #define FIFO_FE 0x01 // enable FIFO function
120  
121 // CMD_AFC
122 #define AFC_MCU 0x00 // AFC auto_mode by MCU
123 #define AFC_POWER_ON 0x40 // AFC at poweron
124 #define AFC_OFFSET 0x80 // AFC keep offset when VDI hi
125 #define AFC_VDI 0xC0 // AFC keeps independently from VDI
126 #define AFC_NORESTR 0x00 // range limit no restriction
127 #define AFC_RANG_16 0x10 // range limit +15/-16
128 #define AFC_RANG_8 0x20 // range limit +7/-8
129 #define AFC_RANG_4 0x30 // range limit +3/-4
130 #define AFC_ST 0x08 // store offset into outpur register
131 #define AFC_FI 0x04 // enable AFC hi accuracy mode
132 #define AFC_OE 0x02 // enable AFC output register
133 #define AFC_EN 0x01 // enable AFC function
134  
135