Rev Author Line No. Line
3328 povik 1 ;******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
2 ;* File Name : startup_stm32f10x_cl.s
3 ;* Author : MCD Application Team
4 ;* Version : V3.1.2
5 ;* Date : 09/28/2009
6 ;* Description : STM32F10x Connectivity line devices vector table for RVMDK
7 ;* toolchain.
8 ;* This module performs:
9 ;* - Set the initial SP
10 ;* - Set the initial PC == Reset_Handler
11 ;* - Set the vector table entries with the exceptions ISR address
12 ;* - Branches to __main in the C library (which eventually
13 ;* calls main()).
14 ;* After Reset the CortexM3 processor is in Thread mode,
15 ;* priority is Privileged, and the Stack is set to Main.
16 ;* <<< Use Configuration Wizard in Context Menu >>>
17 ;*******************************************************************************
18 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
19 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
20 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
21 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
22 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
23 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
24 ;*******************************************************************************
25  
26 ; Amount of memory (in bytes) allocated for Stack
27 ; Tailor this value to your application needs
28 ; <h> Stack Configuration
29 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
30 ; </h>
31  
32 Stack_Size EQU 0x00000400
33  
34 AREA STACK, NOINIT, READWRITE, ALIGN=3
35 Stack_Mem SPACE Stack_Size
36 __initial_sp
37  
38  
39 ; <h> Heap Configuration
40 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
41 ; </h>
42  
43 Heap_Size EQU 0x00000200
44  
45 AREA HEAP, NOINIT, READWRITE, ALIGN=3
46 __heap_base
47 Heap_Mem SPACE Heap_Size
48 __heap_limit
49  
50 PRESERVE8
51 THUMB
52  
53  
54 ; Vector Table Mapped to Address 0 at Reset
55 AREA RESET, DATA, READONLY
56 EXPORT __Vectors
57 EXPORT __Vectors_End
58 EXPORT __Vectors_Size
59  
60 __Vectors DCD __initial_sp ; Top of Stack
61 DCD Reset_Handler ; Reset Handler
62 DCD NMI_Handler ; NMI Handler
63 DCD HardFault_Handler ; Hard Fault Handler
64 DCD MemManage_Handler ; MPU Fault Handler
65 DCD BusFault_Handler ; Bus Fault Handler
66 DCD UsageFault_Handler ; Usage Fault Handler
67 DCD 0 ; Reserved
68 DCD 0 ; Reserved
69 DCD 0 ; Reserved
70 DCD 0 ; Reserved
71 DCD SVC_Handler ; SVCall Handler
72 DCD DebugMon_Handler ; Debug Monitor Handler
73 DCD 0 ; Reserved
74 DCD PendSV_Handler ; PendSV Handler
75 DCD SysTick_Handler ; SysTick Handler
76  
77 ; External Interrupts
78 DCD WWDG_IRQHandler ; Window Watchdog
79 DCD PVD_IRQHandler ; PVD through EXTI Line detect
80 DCD TAMPER_IRQHandler ; Tamper
81 DCD RTC_IRQHandler ; RTC
82 DCD FLASH_IRQHandler ; Flash
83 DCD RCC_IRQHandler ; RCC
84 DCD EXTI0_IRQHandler ; EXTI Line 0
85 DCD EXTI1_IRQHandler ; EXTI Line 1
86 DCD EXTI2_IRQHandler ; EXTI Line 2
87 DCD EXTI3_IRQHandler ; EXTI Line 3
88 DCD EXTI4_IRQHandler ; EXTI Line 4
89 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
90 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
91 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
92 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
93 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
94 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
95 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
96 DCD ADC1_2_IRQHandler ; ADC1 and ADC2
97 DCD CAN1_TX_IRQHandler ; CAN1 TX
98 DCD CAN1_RX0_IRQHandler ; CAN1 RX0
99 DCD CAN1_RX1_IRQHandler ; CAN1 RX1
100 DCD CAN1_SCE_IRQHandler ; CAN1 SCE
101 DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
102 DCD TIM1_BRK_IRQHandler ; TIM1 Break
103 DCD TIM1_UP_IRQHandler ; TIM1 Update
104 DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
105 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
106 DCD TIM2_IRQHandler ; TIM2
107 DCD TIM3_IRQHandler ; TIM3
108 DCD TIM4_IRQHandler ; TIM4
109 DCD I2C1_EV_IRQHandler ; I2C1 Event
110 DCD I2C1_ER_IRQHandler ; I2C1 Error
111 DCD I2C2_EV_IRQHandler ; I2C2 Event
112 DCD I2C2_ER_IRQHandler ; I2C1 Error
113 DCD SPI1_IRQHandler ; SPI1
114 DCD SPI2_IRQHandler ; SPI2
115 DCD USART1_IRQHandler ; USART1
116 DCD USART2_IRQHandler ; USART2
117 DCD USART3_IRQHandler ; USART3
118 DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
119 DCD RTCAlarm_IRQHandler ; RTC alarm through EXTI line
120 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
121 DCD 0 ; Reserved
122 DCD 0 ; Reserved
123 DCD 0 ; Reserved
124 DCD 0 ; Reserved
125 DCD 0 ; Reserved
126 DCD 0 ; Reserved
127 DCD 0 ; Reserved
128 DCD TIM5_IRQHandler ; TIM5
129 DCD SPI3_IRQHandler ; SPI3
130 DCD UART4_IRQHandler ; UART4
131 DCD UART5_IRQHandler ; UART5
132 DCD TIM6_IRQHandler ; TIM6
133 DCD TIM7_IRQHandler ; TIM7
134 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
135 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
136 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
137 DCD DMA2_Channel4_IRQHandler ; DMA2 Channel4
138 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
139 DCD ETH_IRQHandler ; Ethernet
140 DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
141 DCD CAN2_TX_IRQHandler ; CAN2 TX
142 DCD CAN2_RX0_IRQHandler ; CAN2 RX0
143 DCD CAN2_RX1_IRQHandler ; CAN2 RX1
144 DCD CAN2_SCE_IRQHandler ; CAN2 SCE
145 DCD OTG_FS_IRQHandler ; USB OTG FS
146 __Vectors_End
147  
148 __Vectors_Size EQU __Vectors_End - __Vectors
149  
150 AREA |.text|, CODE, READONLY
151  
152 ; Reset handler routine
153 Reset_Handler PROC
154 EXPORT Reset_Handler [WEAK]
155 IMPORT __main
156 LDR R0, =__main
157 BX R0
158 ENDP
159  
160 ; Dummy Exception Handlers (infinite loops which can be modified)
161  
162 NMI_Handler PROC
163 EXPORT NMI_Handler [WEAK]
164 B .
165 ENDP
166 HardFault_Handler\
167 PROC
168 EXPORT HardFault_Handler [WEAK]
169 B .
170 ENDP
171 MemManage_Handler\
172 PROC
173 EXPORT MemManage_Handler [WEAK]
174 B .
175 ENDP
176 BusFault_Handler\
177 PROC
178 EXPORT BusFault_Handler [WEAK]
179 B .
180 ENDP
181 UsageFault_Handler\
182 PROC
183 EXPORT UsageFault_Handler [WEAK]
184 B .
185 ENDP
186 SVC_Handler PROC
187 EXPORT SVC_Handler [WEAK]
188 B .
189 ENDP
190 DebugMon_Handler\
191 PROC
192 EXPORT DebugMon_Handler [WEAK]
193 B .
194 ENDP
195 PendSV_Handler PROC
196 EXPORT PendSV_Handler [WEAK]
197 B .
198 ENDP
199 SysTick_Handler PROC
200 EXPORT SysTick_Handler [WEAK]
201 B .
202 ENDP
203  
204 Default_Handler PROC
205  
206 EXPORT WWDG_IRQHandler [WEAK]
207 EXPORT PVD_IRQHandler [WEAK]
208 EXPORT TAMPER_IRQHandler [WEAK]
209 EXPORT RTC_IRQHandler [WEAK]
210 EXPORT FLASH_IRQHandler [WEAK]
211 EXPORT RCC_IRQHandler [WEAK]
212 EXPORT EXTI0_IRQHandler [WEAK]
213 EXPORT EXTI1_IRQHandler [WEAK]
214 EXPORT EXTI2_IRQHandler [WEAK]
215 EXPORT EXTI3_IRQHandler [WEAK]
216 EXPORT EXTI4_IRQHandler [WEAK]
217 EXPORT DMA1_Channel1_IRQHandler [WEAK]
218 EXPORT DMA1_Channel2_IRQHandler [WEAK]
219 EXPORT DMA1_Channel3_IRQHandler [WEAK]
220 EXPORT DMA1_Channel4_IRQHandler [WEAK]
221 EXPORT DMA1_Channel5_IRQHandler [WEAK]
222 EXPORT DMA1_Channel6_IRQHandler [WEAK]
223 EXPORT DMA1_Channel7_IRQHandler [WEAK]
224 EXPORT ADC1_2_IRQHandler [WEAK]
225 EXPORT CAN1_TX_IRQHandler [WEAK]
226 EXPORT CAN1_RX0_IRQHandler [WEAK]
227 EXPORT CAN1_RX1_IRQHandler [WEAK]
228 EXPORT CAN1_SCE_IRQHandler [WEAK]
229 EXPORT EXTI9_5_IRQHandler [WEAK]
230 EXPORT TIM1_BRK_IRQHandler [WEAK]
231 EXPORT TIM1_UP_IRQHandler [WEAK]
232 EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
233 EXPORT TIM1_CC_IRQHandler [WEAK]
234 EXPORT TIM2_IRQHandler [WEAK]
235 EXPORT TIM3_IRQHandler [WEAK]
236 EXPORT TIM4_IRQHandler [WEAK]
237 EXPORT I2C1_EV_IRQHandler [WEAK]
238 EXPORT I2C1_ER_IRQHandler [WEAK]
239 EXPORT I2C2_EV_IRQHandler [WEAK]
240 EXPORT I2C2_ER_IRQHandler [WEAK]
241 EXPORT SPI1_IRQHandler [WEAK]
242 EXPORT SPI2_IRQHandler [WEAK]
243 EXPORT USART1_IRQHandler [WEAK]
244 EXPORT USART2_IRQHandler [WEAK]
245 EXPORT USART3_IRQHandler [WEAK]
246 EXPORT EXTI15_10_IRQHandler [WEAK]
247 EXPORT RTCAlarm_IRQHandler [WEAK]
248 EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
249 EXPORT TIM5_IRQHandler [WEAK]
250 EXPORT SPI3_IRQHandler [WEAK]
251 EXPORT UART4_IRQHandler [WEAK]
252 EXPORT UART5_IRQHandler [WEAK]
253 EXPORT TIM6_IRQHandler [WEAK]
254 EXPORT TIM7_IRQHandler [WEAK]
255 EXPORT DMA2_Channel1_IRQHandler [WEAK]
256 EXPORT DMA2_Channel2_IRQHandler [WEAK]
257 EXPORT DMA2_Channel3_IRQHandler [WEAK]
258 EXPORT DMA2_Channel4_IRQHandler [WEAK]
259 EXPORT DMA2_Channel5_IRQHandler [WEAK]
260 EXPORT ETH_IRQHandler [WEAK]
261 EXPORT ETH_WKUP_IRQHandler [WEAK]
262 EXPORT CAN2_TX_IRQHandler [WEAK]
263 EXPORT CAN2_RX0_IRQHandler [WEAK]
264 EXPORT CAN2_RX1_IRQHandler [WEAK]
265 EXPORT CAN2_SCE_IRQHandler [WEAK]
266 EXPORT OTG_FS_IRQHandler [WEAK]
267  
268 WWDG_IRQHandler
269 PVD_IRQHandler
270 TAMPER_IRQHandler
271 RTC_IRQHandler
272 FLASH_IRQHandler
273 RCC_IRQHandler
274 EXTI0_IRQHandler
275 EXTI1_IRQHandler
276 EXTI2_IRQHandler
277 EXTI3_IRQHandler
278 EXTI4_IRQHandler
279 DMA1_Channel1_IRQHandler
280 DMA1_Channel2_IRQHandler
281 DMA1_Channel3_IRQHandler
282 DMA1_Channel4_IRQHandler
283 DMA1_Channel5_IRQHandler
284 DMA1_Channel6_IRQHandler
285 DMA1_Channel7_IRQHandler
286 ADC1_2_IRQHandler
287 CAN1_TX_IRQHandler
288 CAN1_RX0_IRQHandler
289 CAN1_RX1_IRQHandler
290 CAN1_SCE_IRQHandler
291 EXTI9_5_IRQHandler
292 TIM1_BRK_IRQHandler
293 TIM1_UP_IRQHandler
294 TIM1_TRG_COM_IRQHandler
295 TIM1_CC_IRQHandler
296 TIM2_IRQHandler
297 TIM3_IRQHandler
298 TIM4_IRQHandler
299 I2C1_EV_IRQHandler
300 I2C1_ER_IRQHandler
301 I2C2_EV_IRQHandler
302 I2C2_ER_IRQHandler
303 SPI1_IRQHandler
304 SPI2_IRQHandler
305 USART1_IRQHandler
306 USART2_IRQHandler
307 USART3_IRQHandler
308 EXTI15_10_IRQHandler
309 RTCAlarm_IRQHandler
310 OTG_FS_WKUP_IRQHandler
311 TIM5_IRQHandler
312 SPI3_IRQHandler
313 UART4_IRQHandler
314 UART5_IRQHandler
315 TIM6_IRQHandler
316 TIM7_IRQHandler
317 DMA2_Channel1_IRQHandler
318 DMA2_Channel2_IRQHandler
319 DMA2_Channel3_IRQHandler
320 DMA2_Channel4_IRQHandler
321 DMA2_Channel5_IRQHandler
322 ETH_IRQHandler
323 ETH_WKUP_IRQHandler
324 CAN2_TX_IRQHandler
325 CAN2_RX0_IRQHandler
326 CAN2_RX1_IRQHandler
327 CAN2_SCE_IRQHandler
328 OTG_FS_IRQHandler
329  
330 B .
331  
332 ENDP
333  
334 ALIGN
335  
336 ;*******************************************************************************
337 ; User Stack and Heap initialization
338 ;*******************************************************************************
339 IF :DEF:__MICROLIB
340  
341 EXPORT __initial_sp
342 EXPORT __heap_base
343 EXPORT __heap_limit
344  
345 ELSE
346  
347 IMPORT __use_two_region_memory
348 EXPORT __user_initial_stackheap
349  
350 __user_initial_stackheap
351  
352 LDR R0, = Heap_Mem
353 LDR R1, =(Stack_Mem + Stack_Size)
354 LDR R2, = (Heap_Mem + Heap_Size)
355 LDR R3, = Stack_Mem
356 BX LR
357  
358 ALIGN
359  
360 ENDIF
361  
362 END
363  
364 ;******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE*****