Rev Author Line No. Line
3328 povik 1 /**
2 ******************************************************************************
3 * @file startup_stm32f10x_ld.s
4 * @author MCD Application Team
5 * @version V3.1.2
6 * @date 09/28/2009
7 * @brief STM32F10x Low Density Devices vector table for RIDE7 toolchain.
8 * This module performs:
9 * - Set the initial SP
10 * - Set the initial PC == Reset_Handler,
11 * - Set the vector table entries with the exceptions ISR address.
12 * - Branches to main in the C library (which eventually
13 * calls main()).
14 * After Reset the Cortex-M3 processor is in Thread mode,
15 * priority is Privileged, and the Stack is set to Main.
16 ******************************************************************************
17 * @copy
18 *
19 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
20 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
21 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
22 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
23 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
24 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
25 *
26 * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
27 */
28  
29 .syntax unified
30 .cpu cortex-m3
31 .fpu softvfp
32 .thumb
33  
34 .global g_pfnVectors
35 .global Default_Handler
36  
37 /* start address for the initialization values of the .data section.
38 defined in linker script */
39 .word _sidata
40 /* start address for the .data section. defined in linker script */
41 .word _sdata
42 /* end address for the .data section. defined in linker script */
43 .word _edata
44 /* start address for the .bss section. defined in linker script */
45 .word _sbss
46 /* end address for the .bss section. defined in linker script */
47 .word _ebss
48  
49 .equ BootRAM, 0xF108F85F
50 /**
51 * @brief This is the code that gets called when the processor first
52 * starts execution following a reset event. Only the absolutely
53 * necessary set is performed, after which the application
54 * supplied main() routine is called.
55 * @param None
56 * @retval : None
57 */
58  
59 .section .text.Reset_Handler
60 .weak Reset_Handler
61 .type Reset_Handler, %function
62 Reset_Handler:
63  
64 /* Copy the data segment initializers from flash to SRAM */
65 movs r1, #0
66 b LoopCopyDataInit
67  
68 CopyDataInit:
69 ldr r3, =_sidata
70 ldr r3, [r3, r1]
71 str r3, [r0, r1]
72 adds r1, r1, #4
73  
74 LoopCopyDataInit:
75 ldr r0, =_sdata
76 ldr r3, =_edata
77 adds r2, r0, r1
78 cmp r2, r3
79 bcc CopyDataInit
80 ldr r2, =_sbss
81 b LoopFillZerobss
82 /* Zero fill the bss segment. */
83 FillZerobss:
84 movs r3, #0
85 str r3, [r2], #4
86  
87 LoopFillZerobss:
88 ldr r3, = _ebss
89 cmp r2, r3
90 bcc FillZerobss
91 /* Call the application's entry point.*/
92 bl main
93 bx lr
94 .size Reset_Handler, .-Reset_Handler
95  
96 /**
97 * @brief This is the code that gets called when the processor receives an
98 * unexpected interrupt. This simply enters an infinite loop, preserving
99 * the system state for examination by a debugger.
100 *
101 * @param None
102 * @retval : None
103 */
104 .section .text.Default_Handler,"ax",%progbits
105 Default_Handler:
106 Infinite_Loop:
107 b Infinite_Loop
108 .size Default_Handler, .-Default_Handler
109 /******************************************************************************
110 *
111 * The minimal vector table for a Cortex M3. Note that the proper constructs
112 * must be placed on this to ensure that it ends up at physical address
113 * 0x0000.0000.
114 *
115 ******************************************************************************/
116 .section .isr_vector,"a",%progbits
117 .type g_pfnVectors, %object
118 .size g_pfnVectors, .-g_pfnVectors
119  
120  
121 g_pfnVectors:
122 .word _estack
123 .word Reset_Handler
124 .word NMI_Handler
125 .word HardFault_Handler
126 .word MemManage_Handler
127 .word BusFault_Handler
128 .word UsageFault_Handler
129 .word 0
130 .word 0
131 .word 0
132 .word 0
133 .word SVC_Handler
134 .word DebugMon_Handler
135 .word 0
136 .word PendSV_Handler
137 .word SysTick_Handler
138 .word WWDG_IRQHandler
139 .word PVD_IRQHandler
140 .word TAMPER_IRQHandler
141 .word RTC_IRQHandler
142 .word FLASH_IRQHandler
143 .word RCC_IRQHandler
144 .word EXTI0_IRQHandler
145 .word EXTI1_IRQHandler
146 .word EXTI2_IRQHandler
147 .word EXTI3_IRQHandler
148 .word EXTI4_IRQHandler
149 .word DMA1_Channel1_IRQHandler
150 .word DMA1_Channel2_IRQHandler
151 .word DMA1_Channel3_IRQHandler
152 .word DMA1_Channel4_IRQHandler
153 .word DMA1_Channel5_IRQHandler
154 .word DMA1_Channel6_IRQHandler
155 .word DMA1_Channel7_IRQHandler
156 .word ADC1_2_IRQHandler
157 .word USB_HP_CAN1_TX_IRQHandler
158 .word USB_LP_CAN1_RX0_IRQHandler
159 .word CAN1_RX1_IRQHandler
160 .word CAN1_SCE_IRQHandler
161 .word EXTI9_5_IRQHandler
162 .word TIM1_BRK_IRQHandler
163 .word TIM1_UP_IRQHandler
164 .word TIM1_TRG_COM_IRQHandler
165 .word TIM1_CC_IRQHandler
166 .word TIM2_IRQHandler
167 .word TIM3_IRQHandler
168  
169 .word I2C1_EV_IRQHandler
170 .word I2C1_ER_IRQHandler
171  
172  
173 .word SPI1_IRQHandler
174  
175 .word USART1_IRQHandler
176 .word USART2_IRQHandler
177  
178 .word EXTI15_10_IRQHandler
179 .word RTCAlarm_IRQHandler
180 .word USBWakeUp_IRQHandler
181 .word 0
182 .word 0
183 .word 0
184 .word 0
185 .word 0
186 .word 0
187 .word 0
188 .word BootRAM /* @0x108. This is for boot in RAM mode for
189 STM32F10x Low Density devices.*/
190  
191 /*******************************************************************************
192 *
193 * Provide weak aliases for each Exception handler to the Default_Handler.
194 * As they are weak aliases, any function with the same name will override
195 * this definition.
196 *
197 *******************************************************************************/
198  
199 .weak NMI_Handler
200 .thumb_set NMI_Handler,Default_Handler
201  
202 .weak HardFault_Handler
203 .thumb_set HardFault_Handler,Default_Handler
204  
205 .weak MemManage_Handler
206 .thumb_set MemManage_Handler,Default_Handler
207  
208 .weak BusFault_Handler
209 .thumb_set BusFault_Handler,Default_Handler
210  
211 .weak UsageFault_Handler
212 .thumb_set UsageFault_Handler,Default_Handler
213  
214 .weak SVC_Handler
215 .thumb_set SVC_Handler,Default_Handler
216  
217 .weak DebugMon_Handler
218 .thumb_set DebugMon_Handler,Default_Handler
219  
220 .weak PendSV_Handler
221 .thumb_set PendSV_Handler,Default_Handler
222  
223 .weak SysTick_Handler
224 .thumb_set SysTick_Handler,Default_Handler
225  
226 .weak WWDG_IRQHandler
227 .thumb_set WWDG_IRQHandler,Default_Handler
228  
229 .weak PVD_IRQHandler
230 .thumb_set PVD_IRQHandler,Default_Handler
231  
232 .weak TAMPER_IRQHandler
233 .thumb_set TAMPER_IRQHandler,Default_Handler
234  
235 .weak RTC_IRQHandler
236 .thumb_set RTC_IRQHandler,Default_Handler
237  
238 .weak FLASH_IRQHandler
239 .thumb_set FLASH_IRQHandler,Default_Handler
240  
241 .weak RCC_IRQHandler
242 .thumb_set RCC_IRQHandler,Default_Handler
243  
244 .weak EXTI0_IRQHandler
245 .thumb_set EXTI0_IRQHandler,Default_Handler
246  
247 .weak EXTI1_IRQHandler
248 .thumb_set EXTI1_IRQHandler,Default_Handler
249  
250 .weak EXTI2_IRQHandler
251 .thumb_set EXTI2_IRQHandler,Default_Handler
252  
253 .weak EXTI3_IRQHandler
254 .thumb_set EXTI3_IRQHandler,Default_Handler
255  
256 .weak EXTI4_IRQHandler
257 .thumb_set EXTI4_IRQHandler,Default_Handler
258  
259 .weak DMA1_Channel1_IRQHandler
260 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
261  
262 .weak DMA1_Channel2_IRQHandler
263 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
264  
265 .weak DMA1_Channel3_IRQHandler
266 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
267  
268 .weak DMA1_Channel4_IRQHandler
269 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
270  
271 .weak DMA1_Channel5_IRQHandler
272 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
273  
274 .weak DMA1_Channel6_IRQHandler
275 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
276  
277 .weak DMA1_Channel7_IRQHandler
278 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
279  
280 .weak ADC1_2_IRQHandler
281 .thumb_set ADC1_2_IRQHandler,Default_Handler
282  
283 .weak USB_HP_CAN1_TX_IRQHandler
284 .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
285  
286 .weak USB_LP_CAN1_RX0_IRQHandler
287 .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
288  
289 .weak CAN1_RX1_IRQHandler
290 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
291  
292 .weak CAN1_SCE_IRQHandler
293 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
294  
295 .weak EXTI9_5_IRQHandler
296 .thumb_set EXTI9_5_IRQHandler,Default_Handler
297  
298 .weak TIM1_BRK_IRQHandler
299 .thumb_set TIM1_BRK_IRQHandler,Default_Handler
300  
301 .weak TIM1_UP_IRQHandler
302 .thumb_set TIM1_UP_IRQHandler,Default_Handler
303  
304 .weak TIM1_TRG_COM_IRQHandler
305 .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
306  
307 .weak TIM1_CC_IRQHandler
308 .thumb_set TIM1_CC_IRQHandler,Default_Handler
309  
310 .weak TIM2_IRQHandler
311 .thumb_set TIM2_IRQHandler,Default_Handler
312  
313 .weak TIM3_IRQHandler
314 .thumb_set TIM3_IRQHandler,Default_Handler
315  
316 .weak I2C1_EV_IRQHandler
317 .thumb_set I2C1_EV_IRQHandler,Default_Handler
318  
319 .weak I2C1_ER_IRQHandler
320 .thumb_set I2C1_ER_IRQHandler,Default_Handler
321  
322 .weak SPI1_IRQHandler
323 .thumb_set SPI1_IRQHandler,Default_Handler
324  
325 .weak USART1_IRQHandler
326 .thumb_set USART1_IRQHandler,Default_Handler
327  
328 .weak USART2_IRQHandler
329 .thumb_set USART2_IRQHandler,Default_Handler
330  
331 .weak EXTI15_10_IRQHandler
332 .thumb_set EXTI15_10_IRQHandler,Default_Handler
333  
334 .weak RTCAlarm_IRQHandler
335 .thumb_set RTCAlarm_IRQHandler,Default_Handler
336  
337 .weak USBWakeUp_IRQHandler
338 .thumb_set USBWakeUp_IRQHandler,Default_Handler
339