Rev Author Line No. Line
3328 povik 1 /**
2 ******************************************************************************
3 * @file stm32f10x_i2c.h
4 * @author MCD Application Team
5 * @version V3.1.0
6 * @date 06/19/2009
7 * @brief This file contains all the functions prototypes for the I2C firmware
8 * library.
9 ******************************************************************************
10 * @copy
11 *
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 *
19 * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
20 */
21  
22 /* Define to prevent recursive inclusion -------------------------------------*/
23 #ifndef __STM32F10x_I2C_H
24 #define __STM32F10x_I2C_H
25  
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29  
30 /* Includes ------------------------------------------------------------------*/
31 #include "stm32f10x.h"
32  
33 /** @addtogroup STM32F10x_StdPeriph_Driver
34 * @{
35 */
36  
37 /** @addtogroup I2C
38 * @{
39 */
40  
41 /** @defgroup I2C_Exported_Types
42 * @{
43 */
44  
45 /**
46 * @brief I2C Init structure definition
47 */
48  
49 typedef struct
50 {
51 uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
52 This parameter must be set to a value lower than 400kHz */
53  
54 uint16_t I2C_Mode; /*!< Specifies the I2C mode.
55 This parameter can be a value of @ref I2C_mode */
56  
57 uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
58 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
59  
60 uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
61 This parameter can be a 7-bit or 10-bit address. */
62  
63 uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
64 This parameter can be a value of @ref I2C_acknowledgement */
65  
66 uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
67 This parameter can be a value of @ref I2C_acknowledged_address */
68 }I2C_InitTypeDef;
69  
70 /**
71 * @}
72 */
73  
74  
75 /** @defgroup I2C_Exported_Constants
76 * @{
77 */
78  
79 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
80 ((PERIPH) == I2C2))
81 /** @defgroup I2C_mode
82 * @{
83 */
84  
85 #define I2C_Mode_I2C ((uint16_t)0x0000)
86 #define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
87 #define I2C_Mode_SMBusHost ((uint16_t)0x000A)
88 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
89 ((MODE) == I2C_Mode_SMBusDevice) || \
90 ((MODE) == I2C_Mode_SMBusHost))
91 /**
92 * @}
93 */
94  
95 /** @defgroup I2C_duty_cycle_in_fast_mode
96 * @{
97 */
98  
99 #define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
100 #define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
101 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
102 ((CYCLE) == I2C_DutyCycle_2))
103 /**
104 * @}
105 */
106  
107 /** @defgroup I2C_acknowledgement
108 * @{
109 */
110  
111 #define I2C_Ack_Enable ((uint16_t)0x0400)
112 #define I2C_Ack_Disable ((uint16_t)0x0000)
113 #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
114 ((STATE) == I2C_Ack_Disable))
115 /**
116 * @}
117 */
118  
119 /** @defgroup I2C_transfer_direction
120 * @{
121 */
122  
123 #define I2C_Direction_Transmitter ((uint8_t)0x00)
124 #define I2C_Direction_Receiver ((uint8_t)0x01)
125 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
126 ((DIRECTION) == I2C_Direction_Receiver))
127 /**
128 * @}
129 */
130  
131 /** @defgroup I2C_acknowledged_address
132 * @{
133 */
134  
135 #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
136 #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
137 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
138 ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
139 /**
140 * @}
141 */
142  
143 /** @defgroup I2C_registers
144 * @{
145 */
146  
147 #define I2C_Register_CR1 ((uint8_t)0x00)
148 #define I2C_Register_CR2 ((uint8_t)0x04)
149 #define I2C_Register_OAR1 ((uint8_t)0x08)
150 #define I2C_Register_OAR2 ((uint8_t)0x0C)
151 #define I2C_Register_DR ((uint8_t)0x10)
152 #define I2C_Register_SR1 ((uint8_t)0x14)
153 #define I2C_Register_SR2 ((uint8_t)0x18)
154 #define I2C_Register_CCR ((uint8_t)0x1C)
155 #define I2C_Register_TRISE ((uint8_t)0x20)
156 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
157 ((REGISTER) == I2C_Register_CR2) || \
158 ((REGISTER) == I2C_Register_OAR1) || \
159 ((REGISTER) == I2C_Register_OAR2) || \
160 ((REGISTER) == I2C_Register_DR) || \
161 ((REGISTER) == I2C_Register_SR1) || \
162 ((REGISTER) == I2C_Register_SR2) || \
163 ((REGISTER) == I2C_Register_CCR) || \
164 ((REGISTER) == I2C_Register_TRISE))
165 /**
166 * @}
167 */
168  
169 /** @defgroup I2C_SMBus_alert_pin_level
170 * @{
171 */
172  
173 #define I2C_SMBusAlert_Low ((uint16_t)0x2000)
174 #define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
175 #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
176 ((ALERT) == I2C_SMBusAlert_High))
177 /**
178 * @}
179 */
180  
181 /** @defgroup I2C_PEC_position
182 * @{
183 */
184  
185 #define I2C_PECPosition_Next ((uint16_t)0x0800)
186 #define I2C_PECPosition_Current ((uint16_t)0xF7FF)
187 #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
188 ((POSITION) == I2C_PECPosition_Current))
189 /**
190 * @}
191 */
192  
193 /** @defgroup I2C_interrupts_definition
194 * @{
195 */
196  
197 #define I2C_IT_BUF ((uint16_t)0x0400)
198 #define I2C_IT_EVT ((uint16_t)0x0200)
199 #define I2C_IT_ERR ((uint16_t)0x0100)
200 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
201 /**
202 * @}
203 */
204  
205 /** @defgroup I2C_interrupts_definition
206 * @{
207 */
208  
209 #define I2C_IT_SMBALERT ((uint32_t)0x01008000)
210 #define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
211 #define I2C_IT_PECERR ((uint32_t)0x01001000)
212 #define I2C_IT_OVR ((uint32_t)0x01000800)
213 #define I2C_IT_AF ((uint32_t)0x01000400)
214 #define I2C_IT_ARLO ((uint32_t)0x01000200)
215 #define I2C_IT_BERR ((uint32_t)0x01000100)
216 #define I2C_IT_TXE ((uint32_t)0x06000080)
217 #define I2C_IT_RXNE ((uint32_t)0x06000040)
218 #define I2C_IT_STOPF ((uint32_t)0x02000010)
219 #define I2C_IT_ADD10 ((uint32_t)0x02000008)
220 #define I2C_IT_BTF ((uint32_t)0x02000004)
221 #define I2C_IT_ADDR ((uint32_t)0x02000002)
222 #define I2C_IT_SB ((uint32_t)0x02000001)
223  
224 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
225  
226 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
227 ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
228 ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
229 ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
230 ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
231 ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
232 ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
233 /**
234 * @}
235 */
236  
237 /** @defgroup I2C_flags_definition
238 * @{
239 */
240  
241 /**
242 * @brief SR2 register flags
243 */
244  
245 #define I2C_FLAG_DUALF ((uint32_t)0x00800000)
246 #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
247 #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
248 #define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
249 #define I2C_FLAG_TRA ((uint32_t)0x00040000)
250 #define I2C_FLAG_BUSY ((uint32_t)0x00020000)
251 #define I2C_FLAG_MSL ((uint32_t)0x00010000)
252  
253 /**
254 * @brief SR1 register flags
255 */
256  
257 #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
258 #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
259 #define I2C_FLAG_PECERR ((uint32_t)0x10001000)
260 #define I2C_FLAG_OVR ((uint32_t)0x10000800)
261 #define I2C_FLAG_AF ((uint32_t)0x10000400)
262 #define I2C_FLAG_ARLO ((uint32_t)0x10000200)
263 #define I2C_FLAG_BERR ((uint32_t)0x10000100)
264 #define I2C_FLAG_TXE ((uint32_t)0x10000080)
265 #define I2C_FLAG_RXNE ((uint32_t)0x10000040)
266 #define I2C_FLAG_STOPF ((uint32_t)0x10000010)
267 #define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
268 #define I2C_FLAG_BTF ((uint32_t)0x10000004)
269 #define I2C_FLAG_ADDR ((uint32_t)0x10000002)
270 #define I2C_FLAG_SB ((uint32_t)0x10000001)
271  
272 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
273  
274 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
275 ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
276 ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
277 ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
278 ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
279 ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
280 ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
281 ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
282 ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
283 ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
284 ((FLAG) == I2C_FLAG_SB))
285 /**
286 * @}
287 */
288  
289 /** @defgroup I2C_Events
290 * @{
291 */
292  
293 /**
294 * @brief EV1
295 */
296  
297 #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
298 #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
299 #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
300 #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
301 #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
302  
303 /**
304 * @brief EV2
305 */
306  
307 #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
308  
309 /**
310 * @brief EV3
311 */
312  
313 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
314  
315 /**
316 * @brief EV4
317 */
318  
319 #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
320  
321 /**
322 * @brief EV5
323 */
324  
325 #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
326  
327 /**
328 * @brief EV6
329 */
330  
331 #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
332 #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
333  
334 /**
335 * @brief EV7
336 */
337  
338 #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
339  
340 /**
341 * @brief EV8
342 */
343  
344 #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
345  
346 /**
347 * @brief EV8_2
348 */
349  
350 #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
351  
352 /**
353 * @brief EV9
354 */
355  
356 #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
357  
358 /**
359 * @brief EV3_2
360 */
361  
362 #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
363  
364 #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
365 ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
366 ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
367 ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
368 ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
369 ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
370 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
371 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
372 ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
373 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
374 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
375 ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
376 ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
377 ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
378 ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
379 ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
380 ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
381 ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
382 ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
383 ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
384 /**
385 * @}
386 */
387  
388 /** @defgroup I2C_own_address1
389 * @{
390 */
391  
392 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
393 /**
394 * @}
395 */
396  
397 /** @defgroup I2C_clock_speed
398 * @{
399 */
400  
401 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
402 /**
403 * @}
404 */
405  
406 /**
407 * @}
408 */
409  
410 /** @defgroup I2C_Exported_Macros
411 * @{
412 */
413  
414 /**
415 * @}
416 */
417  
418 /** @defgroup I2C_Exported_Functions
419 * @{
420 */
421  
422 void I2C_DeInit(I2C_TypeDef* I2Cx);
423 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
424 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
425 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
426 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
427 void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
428 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
429 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
430 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
431 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
432 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
433 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
434 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
435 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
436 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
437 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
438 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
439 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
440 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
441 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
442 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
443 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
444 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
445 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
446 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
447 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
448 uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
449 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
450 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
451 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
452 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
453 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
454  
455 #ifdef __cplusplus
456 }
457 #endif
458  
459 #endif /*__STM32F10x_I2C_H */
460 /**
461 * @}
462 */
463  
464 /**
465 * @}
466 */
467  
468 /**
469 * @}
470 */
471  
472 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/