Rev Author Line No. Line
3328 povik 1 /**
2 ******************************************************************************
3 * @file stm32f10x_spi.h
4 * @author MCD Application Team
5 * @version V3.1.0
6 * @date 06/19/2009
7 * @brief This file contains all the functions prototypes for the SPI firmware
8 * library.
9 ******************************************************************************
10 * @copy
11 *
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 *
19 * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
20 */
21  
22 /* Define to prevent recursive inclusion -------------------------------------*/
23 #ifndef __STM32F10x_SPI_H
24 #define __STM32F10x_SPI_H
25  
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29  
30 /* Includes ------------------------------------------------------------------*/
31 #include "stm32f10x.h"
32  
33 /** @addtogroup STM32F10x_StdPeriph_Driver
34 * @{
35 */
36  
37 /** @addtogroup SPI
38 * @{
39 */
40  
41 /** @defgroup SPI_Exported_Types
42 * @{
43 */
44  
45 /**
46 * @brief SPI Init structure definition
47 */
48  
49 typedef struct
50 {
51 uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
52 This parameter can be any combination of @ref SPI_data_direction */
53  
54 uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
55 This parameter can be any combination of @ref SPI_mode */
56  
57 uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
58 This parameter can be any combination of @ref SPI_data_size */
59  
60 uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
61 This parameter can be any combination of @ref SPI_Clock_Polarity */
62  
63 uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
64 This parameter can be any combination of @ref SPI_Clock_Phase */
65  
66 uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
67 hardware (NSS pin) or by software using the SSI bit.
68 This parameter can be any combination of @ref SPI_Slave_Select_management */
69  
70 uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
71 used to configure the transmit and receive SCK clock.
72 This parameter can be any combination of @ref SPI_BaudRate_Prescaler.
73 @note The communication clock is derived from the master
74 clock. The slave clock does not need to be set. */
75  
76 uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
77 This parameter can be any combination of @ref SPI_MSB_LSB_transmission */
78  
79 uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
80 }SPI_InitTypeDef;
81  
82 /**
83 * @brief I2S Init structure definition
84 */
85  
86 typedef struct
87 {
88  
89 uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
90 This parameter can be any combination of @ref I2S_Mode */
91  
92 uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
93 This parameter can be any combination of @ref I2S_Standard */
94  
95 uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
96 This parameter can be any combination of @ref I2S_Data_Format */
97  
98 uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
99 This parameter can be any combination of @ref I2S_MCLK_Output */
100  
101 uint16_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
102 This parameter can be any combination of @ref I2S_Audio_Frequency */
103  
104 uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
105 This parameter can be any combination of @ref I2S_Clock_Polarity */
106 }I2S_InitTypeDef;
107  
108 /**
109 * @}
110 */
111  
112 /** @defgroup SPI_Exported_Constants
113 * @{
114 */
115  
116 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
117 ((PERIPH) == SPI2) || \
118 ((PERIPH) == SPI3))
119  
120 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
121 ((PERIPH) == SPI3))
122  
123 /** @defgroup SPI_data_direction
124 * @{
125 */
126  
127 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
128 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
129 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
130 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
131 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
132 ((MODE) == SPI_Direction_2Lines_RxOnly) || \
133 ((MODE) == SPI_Direction_1Line_Rx) || \
134 ((MODE) == SPI_Direction_1Line_Tx))
135 /**
136 * @}
137 */
138  
139 /** @defgroup SPI_mode
140 * @{
141 */
142  
143 #define SPI_Mode_Master ((uint16_t)0x0104)
144 #define SPI_Mode_Slave ((uint16_t)0x0000)
145 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
146 ((MODE) == SPI_Mode_Slave))
147 /**
148 * @}
149 */
150  
151 /** @defgroup SPI_data_size
152 * @{
153 */
154  
155 #define SPI_DataSize_16b ((uint16_t)0x0800)
156 #define SPI_DataSize_8b ((uint16_t)0x0000)
157 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
158 ((DATASIZE) == SPI_DataSize_8b))
159 /**
160 * @}
161 */
162  
163 /** @defgroup SPI_Clock_Polarity
164 * @{
165 */
166  
167 #define SPI_CPOL_Low ((uint16_t)0x0000)
168 #define SPI_CPOL_High ((uint16_t)0x0002)
169 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
170 ((CPOL) == SPI_CPOL_High))
171 /**
172 * @}
173 */
174  
175 /** @defgroup SPI_Clock_Phase
176 * @{
177 */
178  
179 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
180 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
181 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
182 ((CPHA) == SPI_CPHA_2Edge))
183 /**
184 * @}
185 */
186  
187 /** @defgroup SPI_Slave_Select_management
188 * @{
189 */
190  
191 #define SPI_NSS_Soft ((uint16_t)0x0200)
192 #define SPI_NSS_Hard ((uint16_t)0x0000)
193 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
194 ((NSS) == SPI_NSS_Hard))
195 /**
196 * @}
197 */
198  
199 /** @defgroup SPI_BaudRate_Prescaler
200 * @{
201 */
202  
203 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
204 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
205 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
206 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
207 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
208 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
209 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
210 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
211 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
212 ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
213 ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
214 ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
215 ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
216 ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
217 ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
218 ((PRESCALER) == SPI_BaudRatePrescaler_256))
219 /**
220 * @}
221 */
222  
223 /** @defgroup SPI_MSB_LSB_transmission
224 * @{
225 */
226  
227 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
228 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
229 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
230 ((BIT) == SPI_FirstBit_LSB))
231 /**
232 * @}
233 */
234  
235 /** @defgroup I2S_Mode
236 * @{
237 */
238  
239 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
240 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
241 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
242 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
243 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
244 ((MODE) == I2S_Mode_SlaveRx) || \
245 ((MODE) == I2S_Mode_MasterTx) || \
246 ((MODE) == I2S_Mode_MasterRx) )
247 /**
248 * @}
249 */
250  
251 /** @defgroup I2S_Standard
252 * @{
253 */
254  
255 #define I2S_Standard_Phillips ((uint16_t)0x0000)
256 #define I2S_Standard_MSB ((uint16_t)0x0010)
257 #define I2S_Standard_LSB ((uint16_t)0x0020)
258 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
259 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
260 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
261 ((STANDARD) == I2S_Standard_MSB) || \
262 ((STANDARD) == I2S_Standard_LSB) || \
263 ((STANDARD) == I2S_Standard_PCMShort) || \
264 ((STANDARD) == I2S_Standard_PCMLong))
265 /**
266 * @}
267 */
268  
269 /** @defgroup I2S_Data_Format
270 * @{
271 */
272  
273 #define I2S_DataFormat_16b ((uint16_t)0x0000)
274 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
275 #define I2S_DataFormat_24b ((uint16_t)0x0003)
276 #define I2S_DataFormat_32b ((uint16_t)0x0005)
277 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
278 ((FORMAT) == I2S_DataFormat_16bextended) || \
279 ((FORMAT) == I2S_DataFormat_24b) || \
280 ((FORMAT) == I2S_DataFormat_32b))
281 /**
282 * @}
283 */
284  
285 /** @defgroup I2S_MCLK_Output
286 * @{
287 */
288  
289 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
290 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
291 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
292 ((OUTPUT) == I2S_MCLKOutput_Disable))
293 /**
294 * @}
295 */
296  
297 /** @defgroup I2S_Audio_Frequency
298 * @{
299 */
300  
301 #define I2S_AudioFreq_96k ((uint16_t)96000)
302 #define I2S_AudioFreq_48k ((uint16_t)48000)
303 #define I2S_AudioFreq_44k ((uint16_t)44100)
304 #define I2S_AudioFreq_32k ((uint16_t)32000)
305 #define I2S_AudioFreq_22k ((uint16_t)22050)
306 #define I2S_AudioFreq_16k ((uint16_t)16000)
307 #define I2S_AudioFreq_11k ((uint16_t)11025)
308 #define I2S_AudioFreq_8k ((uint16_t)8000)
309 #define I2S_AudioFreq_Default ((uint16_t)2)
310 #define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_96k) || \
311 ((FREQ) == I2S_AudioFreq_48k) || \
312 ((FREQ) == I2S_AudioFreq_44k) || \
313 ((FREQ) == I2S_AudioFreq_32k) || \
314 ((FREQ) == I2S_AudioFreq_22k) || \
315 ((FREQ) == I2S_AudioFreq_16k) || \
316 ((FREQ) == I2S_AudioFreq_11k) || \
317 ((FREQ) == I2S_AudioFreq_8k) || \
318 ((FREQ) == I2S_AudioFreq_Default))
319 /**
320 * @}
321 */
322  
323 /** @defgroup I2S_Clock_Polarity
324 * @{
325 */
326  
327 #define I2S_CPOL_Low ((uint16_t)0x0000)
328 #define I2S_CPOL_High ((uint16_t)0x0008)
329 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
330 ((CPOL) == I2S_CPOL_High))
331 /**
332 * @}
333 */
334  
335 /** @defgroup SPI_I2S_DMA_transfer_requests
336 * @{
337 */
338  
339 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
340 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
341 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
342 /**
343 * @}
344 */
345  
346 /** @defgroup SPI_NSS_internal_software_mangement
347 * @{
348 */
349  
350 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
351 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
352 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
353 ((INTERNAL) == SPI_NSSInternalSoft_Reset))
354 /**
355 * @}
356 */
357  
358 /** @defgroup SPI_CRC_Transmit_Receive
359 * @{
360 */
361  
362 #define SPI_CRC_Tx ((uint8_t)0x00)
363 #define SPI_CRC_Rx ((uint8_t)0x01)
364 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
365 /**
366 * @}
367 */
368  
369 /** @defgroup SPI_direction_transmit_receive
370 * @{
371 */
372  
373 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
374 #define SPI_Direction_Tx ((uint16_t)0x4000)
375 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
376 ((DIRECTION) == SPI_Direction_Tx))
377 /**
378 * @}
379 */
380  
381 /** @defgroup SPI_I2S_interrupts_definition
382 * @{
383 */
384  
385 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
386 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
387 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
388 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
389 ((IT) == SPI_I2S_IT_RXNE) || \
390 ((IT) == SPI_I2S_IT_ERR))
391 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
392 #define SPI_IT_MODF ((uint8_t)0x55)
393 #define SPI_IT_CRCERR ((uint8_t)0x54)
394 #define I2S_IT_UDR ((uint8_t)0x53)
395 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
396 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
397 ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
398 ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
399 /**
400 * @}
401 */
402  
403 /** @defgroup SPI_I2S_flags_definition
404 * @{
405 */
406  
407 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
408 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
409 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
410 #define I2S_FLAG_UDR ((uint16_t)0x0008)
411 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
412 #define SPI_FLAG_MODF ((uint16_t)0x0020)
413 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
414 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
415 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
416 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
417 ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
418 ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
419 ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
420 /**
421 * @}
422 */
423  
424 /** @defgroup SPI_CRC_polynomial
425 * @{
426 */
427  
428 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
429 /**
430 * @}
431 */
432  
433 /**
434 * @}
435 */
436  
437 /** @defgroup SPI_Exported_Macros
438 * @{
439 */
440  
441 /**
442 * @}
443 */
444  
445 /** @defgroup SPI_Exported_Functions
446 * @{
447 */
448  
449 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
450 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
451 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
452 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
453 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
454 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
455 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
456 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
457 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
458 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
459 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
460 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
461 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
462 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
463 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
464 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
465 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
466 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
467 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
468 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
469 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
470 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
471 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
472  
473 #ifdef __cplusplus
474 }
475 #endif
476  
477 #endif /*__STM32F10x_SPI_H */
478 /**
479 * @}
480 */
481  
482 /**
483 * @}
484 */
485  
486 /**
487 * @}
488 */
489  
490 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/