Rev Author Line No. Line
3328 povik 1 /**
2 ******************************************************************************
3 * @file stm32f10x_dac.c
4 * @author MCD Application Team
5 * @version V3.1.0
6 * @date 06/19/2009
7 * @brief This file provides all the DAC firmware functions.
8 ******************************************************************************
9 * @copy
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
19 */
20  
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_dac.h"
23 #include "stm32f10x_rcc.h"
24  
25 /** @addtogroup STM32F10x_StdPeriph_Driver
26 * @{
27 */
28  
29 /** @defgroup DAC
30 * @brief DAC driver modules
31 * @{
32 */
33  
34 /** @defgroup DAC_Private_TypesDefinitions
35 * @{
36 */
37  
38 /**
39 * @}
40 */
41  
42 /** @defgroup DAC_Private_Defines
43 * @{
44 */
45  
46 /* DAC EN mask */
47 #define CR_EN_Set ((uint32_t)0x00000001)
48  
49 /* DAC DMAEN mask */
50 #define CR_DMAEN_Set ((uint32_t)0x00001000)
51  
52 /* CR register Mask */
53 #define CR_CLEAR_Mask ((uint32_t)0x00000FFE)
54  
55 /* DAC SWTRIG mask */
56 #define SWTRIGR_SWTRIG_Set ((uint32_t)0x00000001)
57  
58 /* DAC Dual Channels SWTRIG masks */
59 #define DUAL_SWTRIG_Set ((uint32_t)0x00000003)
60 #define DUAL_SWTRIG_Reset ((uint32_t)0xFFFFFFFC)
61  
62 /* DHR registers offsets */
63 #define DHR12R1_Offset ((uint32_t)0x00000008)
64 #define DHR12R2_Offset ((uint32_t)0x00000014)
65 #define DHR12RD_Offset ((uint32_t)0x00000020)
66  
67 /* DOR register offset */
68 #define DOR_Offset ((uint32_t)0x0000002C)
69 /**
70 * @}
71 */
72  
73 /** @defgroup DAC_Private_Macros
74 * @{
75 */
76  
77 /**
78 * @}
79 */
80  
81 /** @defgroup DAC_Private_Variables
82 * @{
83 */
84  
85 /**
86 * @}
87 */
88  
89 /** @defgroup DAC_Private_FunctionPrototypes
90 * @{
91 */
92  
93 /**
94 * @}
95 */
96  
97 /** @defgroup DAC_Private_Functions
98 * @{
99 */
100  
101 /**
102 * @brief Deinitializes the DAC peripheral registers to their default reset values.
103 * @param None
104 * @retval None
105 */
106 void DAC_DeInit(void)
107 {
108 /* Enable DAC reset state */
109 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
110 /* Release DAC from reset state */
111 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
112 }
113  
114 /**
115 * @brief Initializes the DAC peripheral according to the specified
116 * parameters in the DAC_InitStruct.
117 * @param DAC_Channel: the selected DAC channel.
118 * This parameter can be one of the following values:
119 * @arg DAC_Channel_1: DAC Channel1 selected
120 * @arg DAC_Channel_2: DAC Channel2 selected
121 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
122 * contains the configuration information for the specified DAC channel.
123 * @retval None
124 */
125 void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
126 {
127 uint32_t tmpreg1 = 0, tmpreg2 = 0;
128 /* Check the DAC parameters */
129 assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
130 assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
131 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
132 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
133 /*---------------------------- DAC CR Configuration --------------------------*/
134 /* Get the DAC CR value */
135 tmpreg1 = DAC->CR;
136 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
137 tmpreg1 &= ~(CR_CLEAR_Mask << DAC_Channel);
138 /* Configure for the selected DAC channel: buffer output, trigger, wave genration,
139 mask/amplitude for wave genration */
140 /* Set TSELx and TENx bits according to DAC_Trigger value */
141 /* Set WAVEx bits according to DAC_WaveGeneration value */
142 /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
143 /* Set BOFFx bit according to DAC_OutputBuffer value */
144 tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
145 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
146 /* Calculate CR register value depending on DAC_Channel */
147 tmpreg1 |= tmpreg2 << DAC_Channel;
148 /* Write to DAC CR */
149 DAC->CR = tmpreg1;
150 }
151  
152 /**
153 * @brief Fills each DAC_InitStruct member with its default value.
154 * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will
155 * be initialized.
156 * @retval None
157 */
158 void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
159 {
160 /*--------------- Reset DAC init structure parameters values -----------------*/
161 /* Initialize the DAC_Trigger member */
162 DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
163 /* Initialize the DAC_WaveGeneration member */
164 DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
165 /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
166 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
167 /* Initialize the DAC_OutputBuffer member */
168 DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
169 }
170  
171 /**
172 * @brief Enables or disables the specified DAC channel.
173 * @param DAC_Channel: the selected DAC channel.
174 * This parameter can be one of the following values:
175 * @arg DAC_Channel_1: DAC Channel1 selected
176 * @arg DAC_Channel_2: DAC Channel2 selected
177 * @param NewState: new state of the DAC channel.
178 * This parameter can be: ENABLE or DISABLE.
179 * @retval None
180 */
181 void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
182 {
183 /* Check the parameters */
184 assert_param(IS_DAC_CHANNEL(DAC_Channel));
185 assert_param(IS_FUNCTIONAL_STATE(NewState));
186 if (NewState != DISABLE)
187 {
188 /* Enable the selected DAC channel */
189 DAC->CR |= CR_EN_Set << DAC_Channel;
190 }
191 else
192 {
193 /* Disable the selected DAC channel */
194 DAC->CR &= ~(CR_EN_Set << DAC_Channel);
195 }
196 }
197  
198 /**
199 * @brief Enables or disables the specified DAC channel DMA request.
200 * @param DAC_Channel: the selected DAC channel.
201 * This parameter can be one of the following values:
202 * @arg DAC_Channel_1: DAC Channel1 selected
203 * @arg DAC_Channel_2: DAC Channel2 selected
204 * @param NewState: new state of the selected DAC channel DMA request.
205 * This parameter can be: ENABLE or DISABLE.
206 * @retval None
207 */
208 void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
209 {
210 /* Check the parameters */
211 assert_param(IS_DAC_CHANNEL(DAC_Channel));
212 assert_param(IS_FUNCTIONAL_STATE(NewState));
213 if (NewState != DISABLE)
214 {
215 /* Enable the selected DAC channel DMA request */
216 DAC->CR |= CR_DMAEN_Set << DAC_Channel;
217 }
218 else
219 {
220 /* Disable the selected DAC channel DMA request */
221 DAC->CR &= ~(CR_DMAEN_Set << DAC_Channel);
222 }
223 }
224  
225 /**
226 * @brief Enables or disables the selected DAC channel software trigger.
227 * @param DAC_Channel: the selected DAC channel.
228 * This parameter can be one of the following values:
229 * @arg DAC_Channel_1: DAC Channel1 selected
230 * @arg DAC_Channel_2: DAC Channel2 selected
231 * @param NewState: new state of the selected DAC channel software trigger.
232 * This parameter can be: ENABLE or DISABLE.
233 * @retval None
234 */
235 void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
236 {
237 /* Check the parameters */
238 assert_param(IS_DAC_CHANNEL(DAC_Channel));
239 assert_param(IS_FUNCTIONAL_STATE(NewState));
240 if (NewState != DISABLE)
241 {
242 /* Enable software trigger for the selected DAC channel */
243 DAC->SWTRIGR |= SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4);
244 }
245 else
246 {
247 /* Disable software trigger for the selected DAC channel */
248 DAC->SWTRIGR &= ~(SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4));
249 }
250 }
251  
252 /**
253 * @brief Enables or disables simultaneously the two DAC channels software
254 * triggers.
255 * @param NewState: new state of the DAC channels software triggers.
256 * This parameter can be: ENABLE or DISABLE.
257 * @retval None
258 */
259 void DAC_DualSoftwareTriggerCmd(FunctionalState NewState)
260 {
261 /* Check the parameters */
262 assert_param(IS_FUNCTIONAL_STATE(NewState));
263 if (NewState != DISABLE)
264 {
265 /* Enable software trigger for both DAC channels */
266 DAC->SWTRIGR |= DUAL_SWTRIG_Set ;
267 }
268 else
269 {
270 /* Disable software trigger for both DAC channels */
271 DAC->SWTRIGR &= DUAL_SWTRIG_Reset;
272 }
273 }
274  
275 /**
276 * @brief Enables or disables the selected DAC channel wave generation.
277 * @param DAC_Channel: the selected DAC channel.
278 * This parameter can be one of the following values:
279 * @arg DAC_Channel_1: DAC Channel1 selected
280 * @arg DAC_Channel_2: DAC Channel2 selected
281 * @param DAC_Wave: Specifies the wave type to enable or disable.
282 * This parameter can be one of the following values:
283 * @arg DAC_Wave_Noise: noise wave generation
284 * @arg DAC_Wave_Triangle: triangle wave generation
285 * @param NewState: new state of the selected DAC channel wave generation.
286 * This parameter can be: ENABLE or DISABLE.
287 * @retval None
288 */
289 void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
290 {
291 /* Check the parameters */
292 assert_param(IS_DAC_CHANNEL(DAC_Channel));
293 assert_param(IS_DAC_WAVE(DAC_Wave));
294 assert_param(IS_FUNCTIONAL_STATE(NewState));
295 if (NewState != DISABLE)
296 {
297 /* Enable the selected wave generation for the selected DAC channel */
298 DAC->CR |= DAC_Wave << DAC_Channel;
299 }
300 else
301 {
302 /* Disable the selected wave generation for the selected DAC channel */
303 DAC->CR &= ~(DAC_Wave << DAC_Channel);
304 }
305 }
306  
307 /**
308 * @brief Set the specified data holding register value for DAC channel1.
309 * @param DAC_Align: Specifies the data alignement for DAC channel1.
310 * This parameter can be one of the following values:
311 * @arg DAC_Align_8b_R: 8bit right data alignement selected
312 * @arg DAC_Align_12b_L: 12bit left data alignement selected
313 * @arg DAC_Align_12b_R: 12bit right data alignement selected
314 * @param Data : Data to be loaded in the selected data holding register.
315 * @retval None
316 */
317 void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
318 {
319 __IO uint32_t tmp = 0;
320  
321 /* Check the parameters */
322 assert_param(IS_DAC_ALIGN(DAC_Align));
323 assert_param(IS_DAC_DATA(Data));
324  
325 tmp = (uint32_t)DAC_BASE;
326 tmp += DHR12R1_Offset + DAC_Align;
327  
328 /* Set the DAC channel1 selected data holding register */
329 *(__IO uint32_t *) tmp = Data;
330 }
331  
332 /**
333 * @brief Set the specified data holding register value for DAC channel2.
334 * @param DAC_Align: Specifies the data alignement for DAC channel2.
335 * This parameter can be one of the following values:
336 * @arg DAC_Align_8b_R: 8bit right data alignement selected
337 * @arg DAC_Align_12b_L: 12bit left data alignement selected
338 * @arg DAC_Align_12b_R: 12bit right data alignement selected
339 * @param Data : Data to be loaded in the selected data holding register.
340 * @retval None
341 */
342 void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data)
343 {
344 __IO uint32_t tmp = 0;
345  
346 /* Check the parameters */
347 assert_param(IS_DAC_ALIGN(DAC_Align));
348 assert_param(IS_DAC_DATA(Data));
349  
350 tmp = (uint32_t)DAC_BASE;
351 tmp += DHR12R2_Offset + DAC_Align;
352  
353 /* Set the DAC channel2 selected data holding register */
354 *(__IO uint32_t *)tmp = Data;
355 }
356  
357 /**
358 * @brief Set the specified data holding register value for dual channel
359 * DAC.
360 * @param DAC_Align: Specifies the data alignement for dual channel DAC.
361 * This parameter can be one of the following values:
362 * @arg DAC_Align_8b_R: 8bit right data alignement selected
363 * @arg DAC_Align_12b_L: 12bit left data alignement selected
364 * @arg DAC_Align_12b_R: 12bit right data alignement selected
365 * @param Data2: Data for DAC Channel2 to be loaded in the selected data
366 * holding register.
367 * @param Data1: Data for DAC Channel1 to be loaded in the selected data
368 * holding register.
369 * @retval None
370 */
371 void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
372 {
373 uint32_t data = 0, tmp = 0;
374  
375 /* Check the parameters */
376 assert_param(IS_DAC_ALIGN(DAC_Align));
377 assert_param(IS_DAC_DATA(Data1));
378 assert_param(IS_DAC_DATA(Data2));
379  
380 /* Calculate and set dual DAC data holding register value */
381 if (DAC_Align == DAC_Align_8b_R)
382 {
383 data = ((uint32_t)Data2 << 8) | Data1;
384 }
385 else
386 {
387 data = ((uint32_t)Data2 << 16) | Data1;
388 }
389  
390 tmp = (uint32_t)DAC_BASE;
391 tmp += DHR12RD_Offset + DAC_Align;
392  
393 /* Set the dual DAC selected data holding register */
394 *(__IO uint32_t *)tmp = data;
395 }
396  
397 /**
398 * @brief Returns the last data output value of the selected DAC cahnnel.
399 * @param DAC_Channel: the selected DAC channel.
400 * This parameter can be one of the following values:
401 * @arg DAC_Channel_1: DAC Channel1 selected
402 * @arg DAC_Channel_2: DAC Channel2 selected
403 * @retval The selected DAC channel data output value.
404 */
405 uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
406 {
407 __IO uint32_t tmp = 0;
408  
409 /* Check the parameters */
410 assert_param(IS_DAC_CHANNEL(DAC_Channel));
411  
412 tmp = (uint32_t) DAC_BASE ;
413 tmp += DOR_Offset + ((uint32_t)DAC_Channel >> 2);
414  
415 /* Returns the DAC channel data output register value */
416 return (uint16_t) (*(__IO uint32_t*) tmp);
417 }
418  
419 /**
420 * @}
421 */
422  
423 /**
424 * @}
425 */
426  
427 /**
428 * @}
429 */
430  
431 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/