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EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) |
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Copyright (R) National Semiconductor Corporation 1990,1991 |
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Document file for GAL4.EQN |
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Device: 16V8 |
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$LABELS 20 nc D7 D6 D5 D4 D3 D2 D1 D0 GND nc CLOCK DATA RES nc nc VCCON VPPON |
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DQ VCC |
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Pin Label Type |
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--- ----- ---- |
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2 D7 com input |
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3 D6 com input |
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4 D5 com input |
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5 D4 com input |
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6 D3 com input |
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7 D2 com input |
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8 D1 com input |
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9 D0 com input |
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10 GND ground pin |
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12 CLOCK pos,trst,com output |
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13 DATA pos,trst,com feedback |
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14 RES pos,trst,com output |
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17 VCCON pos,trst,com output |
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18 VPPON pos,trst,com output |
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19 DQ pos,trst,com output |
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20 VCC power pin |
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) |
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Copyright (R) National Semiconductor Corporation 1990,1991 |
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Device Utilization: |
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No of dedicated inputs used : 8/10 (80.0%) |
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No of dedicated outputs used : 2/2 (100.0%) |
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No of feedbacks used as dedicated outputs : 3/6 (50.0%) |
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No of feedbacks used : 1/6 (16.7%) |
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------------------------------------------ |
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Pin Label Terms Usage |
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------------------------------------------ |
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19 DQ 2/8 (25.0%) |
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18 VPPON 2/8 (25.0%) |
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17 VCCON 2/8 (25.0%) |
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14 RES 2/8 (25.0%) |
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13 DATA 3/8 (37.5%) |
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12 CLOCK 3/8 (37.5%) |
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------------------------------------------ |
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Total 12/64 (18.8%) |
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------------------------------------------ |
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) |
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Copyright (R) National Semiconductor Corporation 1990,1991 |
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Chip diagram (DIP) |
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._____ _____. |
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| \__/ | |
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| 1 20 | VCC |
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D7 | 2 19 | DQ |
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D6 | 3 18 | VPPON |
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D5 | 4 17 | VCCON |
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D4 | 5 16 | |
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D3 | 6 15 | |
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D2 | 7 14 | RES |
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D1 | 8 13 | DATA |
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D0 | 9 12 | CLOCK |
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GND | 10 11 | |
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|______________| |