Rev Author Line No. Line
1757 kakl 1  
2 //struct {
1758 kakl 3 unsigned int8 firenum=TDC_FIRENUM_0;
4 unsigned int8 div_fire=TDC_DIV_FIRE_2;
5 unsigned int8 calresnum=TDC_CALPERIODS_2;
6 unsigned int8 clkhsdiv=TDC_CLKHSDIV_1;
7 unsigned int8 start_clkhs=TDC_CLKHS_ON;
8 unsigned int1 portnum=TDC_TPORTNUM_4;
9 unsigned int1 Tcycle=TDC_TCYCLE_SHORT;
10 unsigned int1 fakenum=TDC_TFAKENUM_2;
11 unsigned int1 selclkT=TDC_TSELCLK_128HS;
12 unsigned int1 calibrate=TDC_CALIBRATE_EN;
13 unsigned int1 disautocal=TDC_AUTOCAL_EN;
14 unsigned int1 MRange=TDC_MRANGE2;
15 unsigned int1 neg_stop2=TDC_NEG_STOP2;
16 unsigned int1 neg_stop1=TDC_NEG_STOP1;
17 unsigned int1 neg_start=TDC_NEG_START;
1757 kakl 18 //}reg0;
19  
20 //struct {
1758 kakl 21 unsigned int hit2=TDC_MRANGE1_HIT2_NOAC;
22 unsigned int hit1=TDC_MRANGE1_HIT1_NOAC;
23 unsigned int1 fast_init=TDC_FAST_INIT_DIS;
24 unsigned int hitin2=TDC_HITIN2_0;
25 unsigned int hitin1=TDC_HITIN1_0;
1757 kakl 26 //}reg1;
27  
28 //struct {
1758 kakl 29 unsigned int en_int=TDC_INT_ALU;
30 unsigned int1 rfedge2=TDC_CH2EDGE_RIS;
31 unsigned int1 rfedge1=TDC_CH1EDGE_RIS;
32 unsigned int32 delval1=0;
1757 kakl 33 //}reg2;
34  
35 //struct {
1758 kakl 36 unsigned int1 en_err_val=TDC_ERRVAL_DIS;
37 unsigned int tim0_mr2=TDC_TIM0MR2_16384CLKHS;
38 unsigned int32 delval2=0;
1757 kakl 39 //}reg3;
40  
1758 kakl 41 //reg4
42 unsigned int32 delval3=0;
43  
44 //reg5
45 unsigned int conf_fire=0;
46 unsigned int1 en_startnoise=TDC_STARTNOISE_DIS;
47 unsigned int1 dis_phasenoise=TDC_PHASENOISE_DIS;
48 unsigned int repeat_fire=TDC_REPEAT_FIRE_0;
1775 kaklik 49 unsigned int16 phase_fire=0;
1758 kakl 50  
1757 kakl 51 //}TDC_registers;
52  
53  
1980 kaklik 54 /*
55 1 0 0 0 0 ADR2 ADR1 ADR0 Write into address ADR
56 1 0 1 1 0 ADR2 ADR1 ADR0 Read from address ADR
57  
58  
59  
60  
61  
62  
63 */
64  
1744 kakl 65 void TDC_init()
66 {
1745 kakl 67 output_low(TDC_ENABLE);
1759 kakl 68 spi_xfer(TDC_stream,0x70,8);
1745 kakl 69 output_high(TDC_ENABLE);
1744 kakl 70 }
71  
72 void TDC_reset()
73 {
1745 kakl 74 output_low(TDC_ENABLE);
1759 kakl 75 spi_xfer(TDC_stream,0x50,8);
1745 kakl 76 output_high(TDC_ENABLE);
2163 kaklik 77  
78 //reset registers settings to default
79  
80 firenum=TDC_FIRENUM_0;
81 div_fire=TDC_DIV_FIRE_2;
82 calresnum=TDC_CALPERIODS_2;
83 clkhsdiv=TDC_CLKHSDIV_1;
84 start_clkhs=TDC_CLKHS_ON;
85 portnum=TDC_TPORTNUM_4;
86 Tcycle=TDC_TCYCLE_SHORT;
87 fakenum=TDC_TFAKENUM_2;
88 selclkT=TDC_TSELCLK_128HS;
89 calibrate=TDC_CALIBRATE_EN;
90 disautocal=TDC_AUTOCAL_EN;
91 MRange=TDC_MRANGE2;
92 neg_stop2=TDC_NEG_STOP2;
93 neg_stop1=TDC_NEG_STOP1;
94 neg_start=TDC_NEG_START;
95 hit2=TDC_MRANGE1_HIT2_NOAC;
96 hit1=TDC_MRANGE1_HIT1_NOAC;
97 fast_init=TDC_FAST_INIT_DIS;
98 hitin2=TDC_HITIN2_0;
99 hitin1=TDC_HITIN1_0;
100 en_int=TDC_INT_ALU;
101 rfedge2=TDC_CH2EDGE_RIS;
102 rfedge1=TDC_CH1EDGE_RIS;
103 en_err_val=TDC_ERRVAL_DIS;
104 tim0_mr2=TDC_TIM0MR2_16384CLKHS;
105 delval1=0;
106 delval2=0;
107 delval3=0;
108 conf_fire=0;
109 en_startnoise=TDC_STARTNOISE_DIS;
110 dis_phasenoise=TDC_PHASENOISE_DIS;
111 repeat_fire=TDC_REPEAT_FIRE_0;
112 phase_fire=0;
1744 kakl 113 }
114  
115 void TDC_start_cycle()
116 {
1745 kakl 117 output_low(TDC_ENABLE);
1759 kakl 118 spi_xfer(TDC_stream,0x01,8);
1745 kakl 119 output_high(TDC_ENABLE);
1744 kakl 120 }
121  
122 void TDC_start_temp()
123 {
1745 kakl 124 output_low(TDC_ENABLE);
1759 kakl 125 spi_xfer(TDC_stream,0x02,8);
1745 kakl 126 output_high(TDC_ENABLE);
1744 kakl 127 }
128  
129 void TDC_start_cal_resonator()
130 {
1745 kakl 131 output_low(TDC_ENABLE);
1759 kakl 132 spi_xfer(TDC_stream,0x03,8);
1745 kakl 133 output_high(TDC_ENABLE);
1744 kakl 134 }
135  
136 void TDC_start_cal()
137 {
1745 kakl 138 output_low(TDC_ENABLE);
1759 kakl 139 spi_xfer(TDC_stream,0x04,8);
1745 kakl 140 output_high(TDC_ENABLE);
1744 kakl 141 }
142  
143 unsigned int32 TDC_get_measurement(int num)
144 {
2163 kaklik 145 unsigned int32 ret=0;
1745 kakl 146  
147 output_low(TDC_ENABLE);
1967 kaklik 148 spi_xfer(TDC_stream,0xB0 + num - 1, 8);
1745 kakl 149 ret=spi_xfer(TDC_stream,0,32);
150 output_high(TDC_ENABLE);
151 return ret;
1744 kakl 152 }
153  
2181 kaklik 154 unsigned int16 TDC_get_status() // reads status register
1744 kakl 155 {
1745 kakl 156 unsigned int16 ret;
157  
158 output_low(TDC_ENABLE);
159 spi_xfer(TDC_stream,0xB4,8);
160 ret=spi_xfer(TDC_stream,0,16);
161 output_high(TDC_ENABLE);
162 return ret;
1744 kakl 163 }
164  
165 unsigned int8 TDC_get_reg1()
166 {
1745 kakl 167 unsigned int8 ret;
168  
169 output_low(TDC_ENABLE);
170 spi_xfer(TDC_stream,0xB5,8);
171 ret=spi_xfer(TDC_stream,0,8);
172 output_high(TDC_ENABLE);
173 return ret;
1744 kakl 174 }
175  
1965 kaklik 176 void TDC_update_reg1() // updates reg1 only
177 {
178 output_low(TDC_ENABLE);
179 spi_xfer(TDC_stream,0x81,8);
180 spi_xfer(TDC_stream,hit2,4);
181 spi_xfer(TDC_stream,hit1,4);
182 spi_xfer(TDC_stream,fast_init,1);
183 spi_xfer(TDC_stream,1,1);
184 spi_xfer(TDC_stream,hitin2,3);
185 spi_xfer(TDC_stream,hitin1,3);
186 spi_xfer(TDC_stream,0,8);
187 output_high(TDC_ENABLE);
188 }
189  
1757 kakl 190 void TDC_update_registers()
1744 kakl 191 {
1758 kakl 192 //update reg0
1745 kakl 193 output_low(TDC_ENABLE);
1758 kakl 194 spi_xfer(TDC_stream,0x80,8);
195 spi_xfer(TDC_stream,firenum,4);
196 spi_xfer(TDC_stream,div_fire,4);
197 spi_xfer(TDC_stream,calresnum,2);
198 spi_xfer(TDC_stream,clkhsdiv,2);
199 spi_xfer(TDC_stream,start_clkhs,2);
200 spi_xfer(TDC_stream,portnum,1);
201 spi_xfer(TDC_stream,Tcycle,1);
202 spi_xfer(TDC_stream,fakenum,1);
203 spi_xfer(TDC_stream,selclkT,1);
204 spi_xfer(TDC_stream,calibrate,1);
205 spi_xfer(TDC_stream,disautocal,1);
206 spi_xfer(TDC_stream,MRange,1);
207 spi_xfer(TDC_stream,neg_stop2,1);
208 spi_xfer(TDC_stream,neg_stop1,1);
209 spi_xfer(TDC_stream,neg_start,1);
210 output_high(TDC_ENABLE);
211  
1965 kaklik 212 TDC_update_reg1(); // update reg1
1744 kakl 213  
1758 kakl 214 // update reg2
215 output_low(TDC_ENABLE);
216 spi_xfer(TDC_stream,0x82);
217 spi_xfer(TDC_stream,en_int,3);
218 spi_xfer(TDC_stream,rfedge2,1);
219 spi_xfer(TDC_stream,rfedge1,1);
220 spi_xfer(TDC_stream,delval1,19);
1745 kakl 221 output_high(TDC_ENABLE);
1744 kakl 222  
1758 kakl 223 // update reg3
1745 kakl 224 output_low(TDC_ENABLE);
1758 kakl 225 spi_xfer(TDC_stream,0x83);
226 spi_xfer(TDC_stream,0,2);
227 spi_xfer(TDC_stream,en_err_val,1);
228 spi_xfer(TDC_stream,tim0_mr2,2);
229 spi_xfer(TDC_stream,delval2,19);
1745 kakl 230 output_high(TDC_ENABLE);
1744 kakl 231  
1758 kakl 232 // update reg4
1745 kakl 233 output_low(TDC_ENABLE);
1758 kakl 234 spi_xfer(TDC_stream,0x84);
235 spi_xfer(TDC_stream,0b00100,5);
236 spi_xfer(TDC_stream,delval3,19);
1745 kakl 237 output_high(TDC_ENABLE);
1744 kakl 238  
1758 kakl 239 // update reg5
1745 kakl 240 output_low(TDC_ENABLE);
1758 kakl 241 spi_xfer(TDC_stream,0x85);
242 spi_xfer(TDC_stream,conf_fire,3);
243 spi_xfer(TDC_stream,en_startnoise,1);
244 spi_xfer(TDC_stream,dis_phasenoise,1);
245 spi_xfer(TDC_stream,repeat_fire,3);
246 spi_xfer(TDC_stream,phase_fire,16);
247 output_high(TDC_ENABLE);
1744 kakl 248 }
1757 kakl 249  
2163 kaklik 250 float TDC_mrange2_get_time(unsigned int shot) // read start to stop time distance of desired shot
1965 kaklik 251 {
1966 kaklik 252 unsigned int32 measurement;
253 float time;
254  
2163 kaklik 255 switch (shot) // determine which shot is desired to compute
1966 kaklik 256 {
257 case 1:
1965 kaklik 258 hit2=TDC_MRANGE2_HIT2_1CH1;
259 break;
260  
1966 kaklik 261 case 2:
1965 kaklik 262 hit2=TDC_MRANGE2_HIT2_2CH1;
263 break;
264  
1966 kaklik 265 case 3:
1965 kaklik 266 hit2=TDC_MRANGE2_HIT2_3CH1;
267 break;
1966 kaklik 268 }
2163 kaklik 269 TDC_update_reg1(); // tell ALU which shot period must be computed
1966 kaklik 270  
271 Delay_ms(50); // wait to computing of result
272  
273 measurement=TDC_get_measurement(7&TDC_get_status()); // read computed value on pointer result register address
274  
275  
2163 kaklik 276 switch (clkhsdiv) // calibrate measurement data to microseconds from known register setting
1966 kaklik 277 {
278 case TDC_CLKHSDIV_1:
279 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS;
280 break;
281  
282 case TDC_CLKHSDIV_2:
283 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 2.0;
284 break;
285  
286 case TDC_CLKHSDIV_4:
287 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 4.0;
288 break;
289 case TDC_CLKHSDIV_8:
290 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 8.0;
291 break;
292 }
293 return time;
1965 kaklik 294 }
1980 kaklik 295  
296 float TDC_mrange1_get_time(unsigned int channel1, unsigned int shot1, unsigned int channel2, unsigned int shot2)
297 {
298 unsigned int32 measurement;
299 float time;
300  
2181 kaklik 301 Delay_ms(10); // wait to computing of result
302  
1980 kaklik 303 switch (shot1)
304 {
305 case 0:
306 hit1=TDC_MRANGE1_HIT1_START;
307 break;
308 case 1:
309 if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_1CH1; else hit1=TDC_MRANGE1_HIT1_1CH2;
310 break;
311  
312 case 2:
313 if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_2CH1; else hit1=TDC_MRANGE1_HIT1_2CH2;
314 break;
315  
316 case 3:
317 if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_3CH1; else hit1=TDC_MRANGE1_HIT1_3CH2;
318 break;
319  
320 case 4:
321 if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_4CH1; else hit1=TDC_MRANGE1_HIT1_4CH2;
322 break;
323 }
324  
325 switch (shot2)
326 {
327 case 0:
328 hit2=TDC_MRANGE1_HIT2_START;
329 break;
330  
331 case 1:
332 if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_1CH1; else hit2=TDC_MRANGE1_HIT2_1CH2;
333 break;
334  
335 case 2:
336 if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_2CH1; else hit2=TDC_MRANGE1_HIT2_2CH2;
337 break;
338  
339 case 3:
340 if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_3CH1; else hit2=TDC_MRANGE1_HIT2_3CH2;
341 break;
342  
343 case 4:
344 if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_4CH1; else hit2=TDC_MRANGE1_HIT2_4CH2;
345 break;
346 }
2184 kaklik 347  
1980 kaklik 348 TDC_update_reg1(); // tell to ALU which shot period must be computed
349  
350 Delay_ms(50); // wait to computing of result
351  
352 measurement=TDC_get_measurement(7&TDC_get_status()); // read computed value on pointer result register address
353  
2185 kaklik 354 // printf("%Lu\r\n", (7&TDC_get_status()));
355 // printf("%Lu\r\n", measurement);
1980 kaklik 356  
357 switch (clkhsdiv)
358 {
359 case TDC_CLKHSDIV_1:
2181 kaklik 360 time=(measurement/65536.0)* 1.0e6/TDC_CLKHS;
1980 kaklik 361 break;
362  
363 case TDC_CLKHSDIV_2:
364 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 2.0;
365 break;
366  
367 case TDC_CLKHSDIV_4:
368 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 4.0;
369 break;
370 case TDC_CLKHSDIV_8:
371 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 8.0;
372 break;
373 }
374 return time;
375 }