1757 |
kakl |
1 |
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2 |
//struct { |
1758 |
kakl |
3 |
unsigned int8 firenum=TDC_FIRENUM_0; |
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4 |
unsigned int8 div_fire=TDC_DIV_FIRE_2; |
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5 |
unsigned int8 calresnum=TDC_CALPERIODS_2; |
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6 |
unsigned int8 clkhsdiv=TDC_CLKHSDIV_1; |
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7 |
unsigned int8 start_clkhs=TDC_CLKHS_ON; |
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8 |
unsigned int1 portnum=TDC_TPORTNUM_4; |
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9 |
unsigned int1 Tcycle=TDC_TCYCLE_SHORT; |
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10 |
unsigned int1 fakenum=TDC_TFAKENUM_2; |
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11 |
unsigned int1 selclkT=TDC_TSELCLK_128HS; |
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12 |
unsigned int1 calibrate=TDC_CALIBRATE_EN; |
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13 |
unsigned int1 disautocal=TDC_AUTOCAL_EN; |
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14 |
unsigned int1 MRange=TDC_MRANGE2; |
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15 |
unsigned int1 neg_stop2=TDC_NEG_STOP2; |
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16 |
unsigned int1 neg_stop1=TDC_NEG_STOP1; |
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17 |
unsigned int1 neg_start=TDC_NEG_START; |
1757 |
kakl |
18 |
//}reg0; |
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19 |
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20 |
//struct { |
1758 |
kakl |
21 |
unsigned int hit2=TDC_MRANGE1_HIT2_NOAC; |
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22 |
unsigned int hit1=TDC_MRANGE1_HIT1_NOAC; |
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23 |
unsigned int1 fast_init=TDC_FAST_INIT_DIS; |
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24 |
unsigned int hitin2=TDC_HITIN2_0; |
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25 |
unsigned int hitin1=TDC_HITIN1_0; |
1757 |
kakl |
26 |
//}reg1; |
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27 |
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28 |
//struct { |
1758 |
kakl |
29 |
unsigned int en_int=TDC_INT_ALU; |
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30 |
unsigned int1 rfedge2=TDC_CH2EDGE_RIS; |
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31 |
unsigned int1 rfedge1=TDC_CH1EDGE_RIS; |
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32 |
unsigned int32 delval1=0; |
1757 |
kakl |
33 |
//}reg2; |
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34 |
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35 |
//struct { |
1758 |
kakl |
36 |
unsigned int1 en_err_val=TDC_ERRVAL_DIS; |
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37 |
unsigned int tim0_mr2=TDC_TIM0MR2_16384CLKHS; |
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38 |
unsigned int32 delval2=0; |
1757 |
kakl |
39 |
//}reg3; |
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40 |
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1758 |
kakl |
41 |
//reg4 |
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42 |
unsigned int32 delval3=0; |
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43 |
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44 |
//reg5 |
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45 |
unsigned int conf_fire=0; |
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46 |
unsigned int1 en_startnoise=TDC_STARTNOISE_DIS; |
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47 |
unsigned int1 dis_phasenoise=TDC_PHASENOISE_DIS; |
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48 |
unsigned int repeat_fire=TDC_REPEAT_FIRE_0; |
1775 |
kaklik |
49 |
unsigned int16 phase_fire=0; |
1758 |
kakl |
50 |
|
1757 |
kakl |
51 |
//}TDC_registers; |
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52 |
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53 |
|
1980 |
kaklik |
54 |
/* |
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55 |
1 0 0 0 0 ADR2 ADR1 ADR0 Write into address ADR |
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56 |
1 0 1 1 0 ADR2 ADR1 ADR0 Read from address ADR |
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57 |
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58 |
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59 |
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60 |
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61 |
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62 |
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63 |
*/ |
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64 |
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1744 |
kakl |
65 |
void TDC_init() |
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66 |
{ |
1745 |
kakl |
67 |
output_low(TDC_ENABLE); |
1759 |
kakl |
68 |
spi_xfer(TDC_stream,0x70,8); |
1745 |
kakl |
69 |
output_high(TDC_ENABLE); |
1744 |
kakl |
70 |
} |
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71 |
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72 |
void TDC_reset() |
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73 |
{ |
1745 |
kakl |
74 |
output_low(TDC_ENABLE); |
1759 |
kakl |
75 |
spi_xfer(TDC_stream,0x50,8); |
1745 |
kakl |
76 |
output_high(TDC_ENABLE); |
2163 |
kaklik |
77 |
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|
78 |
//reset registers settings to default |
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79 |
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80 |
firenum=TDC_FIRENUM_0; |
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81 |
div_fire=TDC_DIV_FIRE_2; |
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82 |
calresnum=TDC_CALPERIODS_2; |
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83 |
clkhsdiv=TDC_CLKHSDIV_1; |
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84 |
start_clkhs=TDC_CLKHS_ON; |
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85 |
portnum=TDC_TPORTNUM_4; |
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86 |
Tcycle=TDC_TCYCLE_SHORT; |
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87 |
fakenum=TDC_TFAKENUM_2; |
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88 |
selclkT=TDC_TSELCLK_128HS; |
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89 |
calibrate=TDC_CALIBRATE_EN; |
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90 |
disautocal=TDC_AUTOCAL_EN; |
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91 |
MRange=TDC_MRANGE2; |
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92 |
neg_stop2=TDC_NEG_STOP2; |
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93 |
neg_stop1=TDC_NEG_STOP1; |
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94 |
neg_start=TDC_NEG_START; |
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95 |
hit2=TDC_MRANGE1_HIT2_NOAC; |
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96 |
hit1=TDC_MRANGE1_HIT1_NOAC; |
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97 |
fast_init=TDC_FAST_INIT_DIS; |
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98 |
hitin2=TDC_HITIN2_0; |
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99 |
hitin1=TDC_HITIN1_0; |
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100 |
en_int=TDC_INT_ALU; |
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101 |
rfedge2=TDC_CH2EDGE_RIS; |
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102 |
rfedge1=TDC_CH1EDGE_RIS; |
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103 |
en_err_val=TDC_ERRVAL_DIS; |
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104 |
tim0_mr2=TDC_TIM0MR2_16384CLKHS; |
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105 |
delval1=0; |
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106 |
delval2=0; |
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107 |
delval3=0; |
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108 |
conf_fire=0; |
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109 |
en_startnoise=TDC_STARTNOISE_DIS; |
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110 |
dis_phasenoise=TDC_PHASENOISE_DIS; |
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111 |
repeat_fire=TDC_REPEAT_FIRE_0; |
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112 |
phase_fire=0; |
1744 |
kakl |
113 |
} |
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114 |
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115 |
void TDC_start_cycle() |
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116 |
{ |
1745 |
kakl |
117 |
output_low(TDC_ENABLE); |
1759 |
kakl |
118 |
spi_xfer(TDC_stream,0x01,8); |
1745 |
kakl |
119 |
output_high(TDC_ENABLE); |
1744 |
kakl |
120 |
} |
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121 |
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122 |
void TDC_start_temp() |
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123 |
{ |
1745 |
kakl |
124 |
output_low(TDC_ENABLE); |
1759 |
kakl |
125 |
spi_xfer(TDC_stream,0x02,8); |
1745 |
kakl |
126 |
output_high(TDC_ENABLE); |
1744 |
kakl |
127 |
} |
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128 |
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|
129 |
void TDC_start_cal_resonator() |
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130 |
{ |
1745 |
kakl |
131 |
output_low(TDC_ENABLE); |
1759 |
kakl |
132 |
spi_xfer(TDC_stream,0x03,8); |
1745 |
kakl |
133 |
output_high(TDC_ENABLE); |
1744 |
kakl |
134 |
} |
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135 |
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136 |
void TDC_start_cal() |
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137 |
{ |
1745 |
kakl |
138 |
output_low(TDC_ENABLE); |
1759 |
kakl |
139 |
spi_xfer(TDC_stream,0x04,8); |
1745 |
kakl |
140 |
output_high(TDC_ENABLE); |
1744 |
kakl |
141 |
} |
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142 |
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|
143 |
unsigned int32 TDC_get_measurement(int num) |
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144 |
{ |
2163 |
kaklik |
145 |
unsigned int32 ret=0; |
1745 |
kakl |
146 |
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147 |
output_low(TDC_ENABLE); |
1967 |
kaklik |
148 |
spi_xfer(TDC_stream,0xB0 + num - 1, 8); |
1745 |
kakl |
149 |
ret=spi_xfer(TDC_stream,0,32); |
|
|
150 |
output_high(TDC_ENABLE); |
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|
151 |
return ret; |
1744 |
kakl |
152 |
} |
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153 |
|
2181 |
kaklik |
154 |
unsigned int16 TDC_get_status() // reads status register |
1744 |
kakl |
155 |
{ |
1745 |
kakl |
156 |
unsigned int16 ret; |
|
|
157 |
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|
158 |
output_low(TDC_ENABLE); |
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|
159 |
spi_xfer(TDC_stream,0xB4,8); |
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|
160 |
ret=spi_xfer(TDC_stream,0,16); |
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|
161 |
output_high(TDC_ENABLE); |
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162 |
return ret; |
1744 |
kakl |
163 |
} |
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164 |
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|
165 |
unsigned int8 TDC_get_reg1() |
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|
166 |
{ |
1745 |
kakl |
167 |
unsigned int8 ret; |
|
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168 |
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|
169 |
output_low(TDC_ENABLE); |
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170 |
spi_xfer(TDC_stream,0xB5,8); |
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171 |
ret=spi_xfer(TDC_stream,0,8); |
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|
172 |
output_high(TDC_ENABLE); |
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173 |
return ret; |
1744 |
kakl |
174 |
} |
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|
175 |
|
1965 |
kaklik |
176 |
void TDC_update_reg1() // updates reg1 only |
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|
177 |
{ |
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|
178 |
output_low(TDC_ENABLE); |
|
|
179 |
spi_xfer(TDC_stream,0x81,8); |
|
|
180 |
spi_xfer(TDC_stream,hit2,4); |
|
|
181 |
spi_xfer(TDC_stream,hit1,4); |
|
|
182 |
spi_xfer(TDC_stream,fast_init,1); |
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|
183 |
spi_xfer(TDC_stream,1,1); |
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|
184 |
spi_xfer(TDC_stream,hitin2,3); |
|
|
185 |
spi_xfer(TDC_stream,hitin1,3); |
|
|
186 |
spi_xfer(TDC_stream,0,8); |
|
|
187 |
output_high(TDC_ENABLE); |
|
|
188 |
} |
|
|
189 |
|
1757 |
kakl |
190 |
void TDC_update_registers() |
1744 |
kakl |
191 |
{ |
1758 |
kakl |
192 |
//update reg0 |
1745 |
kakl |
193 |
output_low(TDC_ENABLE); |
1758 |
kakl |
194 |
spi_xfer(TDC_stream,0x80,8); |
|
|
195 |
spi_xfer(TDC_stream,firenum,4); |
|
|
196 |
spi_xfer(TDC_stream,div_fire,4); |
|
|
197 |
spi_xfer(TDC_stream,calresnum,2); |
|
|
198 |
spi_xfer(TDC_stream,clkhsdiv,2); |
|
|
199 |
spi_xfer(TDC_stream,start_clkhs,2); |
|
|
200 |
spi_xfer(TDC_stream,portnum,1); |
|
|
201 |
spi_xfer(TDC_stream,Tcycle,1); |
|
|
202 |
spi_xfer(TDC_stream,fakenum,1); |
|
|
203 |
spi_xfer(TDC_stream,selclkT,1); |
|
|
204 |
spi_xfer(TDC_stream,calibrate,1); |
|
|
205 |
spi_xfer(TDC_stream,disautocal,1); |
|
|
206 |
spi_xfer(TDC_stream,MRange,1); |
|
|
207 |
spi_xfer(TDC_stream,neg_stop2,1); |
|
|
208 |
spi_xfer(TDC_stream,neg_stop1,1); |
|
|
209 |
spi_xfer(TDC_stream,neg_start,1); |
|
|
210 |
output_high(TDC_ENABLE); |
|
|
211 |
|
1965 |
kaklik |
212 |
TDC_update_reg1(); // update reg1 |
1744 |
kakl |
213 |
|
1758 |
kakl |
214 |
// update reg2 |
|
|
215 |
output_low(TDC_ENABLE); |
|
|
216 |
spi_xfer(TDC_stream,0x82); |
|
|
217 |
spi_xfer(TDC_stream,en_int,3); |
|
|
218 |
spi_xfer(TDC_stream,rfedge2,1); |
|
|
219 |
spi_xfer(TDC_stream,rfedge1,1); |
|
|
220 |
spi_xfer(TDC_stream,delval1,19); |
1745 |
kakl |
221 |
output_high(TDC_ENABLE); |
1744 |
kakl |
222 |
|
1758 |
kakl |
223 |
// update reg3 |
1745 |
kakl |
224 |
output_low(TDC_ENABLE); |
1758 |
kakl |
225 |
spi_xfer(TDC_stream,0x83); |
|
|
226 |
spi_xfer(TDC_stream,0,2); |
|
|
227 |
spi_xfer(TDC_stream,en_err_val,1); |
|
|
228 |
spi_xfer(TDC_stream,tim0_mr2,2); |
|
|
229 |
spi_xfer(TDC_stream,delval2,19); |
1745 |
kakl |
230 |
output_high(TDC_ENABLE); |
1744 |
kakl |
231 |
|
1758 |
kakl |
232 |
// update reg4 |
1745 |
kakl |
233 |
output_low(TDC_ENABLE); |
1758 |
kakl |
234 |
spi_xfer(TDC_stream,0x84); |
|
|
235 |
spi_xfer(TDC_stream,0b00100,5); |
|
|
236 |
spi_xfer(TDC_stream,delval3,19); |
1745 |
kakl |
237 |
output_high(TDC_ENABLE); |
1744 |
kakl |
238 |
|
1758 |
kakl |
239 |
// update reg5 |
1745 |
kakl |
240 |
output_low(TDC_ENABLE); |
1758 |
kakl |
241 |
spi_xfer(TDC_stream,0x85); |
|
|
242 |
spi_xfer(TDC_stream,conf_fire,3); |
|
|
243 |
spi_xfer(TDC_stream,en_startnoise,1); |
|
|
244 |
spi_xfer(TDC_stream,dis_phasenoise,1); |
|
|
245 |
spi_xfer(TDC_stream,repeat_fire,3); |
|
|
246 |
spi_xfer(TDC_stream,phase_fire,16); |
|
|
247 |
output_high(TDC_ENABLE); |
1744 |
kakl |
248 |
} |
1757 |
kakl |
249 |
|
2163 |
kaklik |
250 |
float TDC_mrange2_get_time(unsigned int shot) // read start to stop time distance of desired shot |
1965 |
kaklik |
251 |
{ |
1966 |
kaklik |
252 |
unsigned int32 measurement; |
|
|
253 |
float time; |
|
|
254 |
|
2163 |
kaklik |
255 |
switch (shot) // determine which shot is desired to compute |
1966 |
kaklik |
256 |
{ |
|
|
257 |
case 1: |
1965 |
kaklik |
258 |
hit2=TDC_MRANGE2_HIT2_1CH1; |
|
|
259 |
break; |
|
|
260 |
|
1966 |
kaklik |
261 |
case 2: |
1965 |
kaklik |
262 |
hit2=TDC_MRANGE2_HIT2_2CH1; |
|
|
263 |
break; |
|
|
264 |
|
1966 |
kaklik |
265 |
case 3: |
1965 |
kaklik |
266 |
hit2=TDC_MRANGE2_HIT2_3CH1; |
|
|
267 |
break; |
1966 |
kaklik |
268 |
} |
2163 |
kaklik |
269 |
TDC_update_reg1(); // tell ALU which shot period must be computed |
1966 |
kaklik |
270 |
|
|
|
271 |
Delay_ms(50); // wait to computing of result |
|
|
272 |
|
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|
273 |
measurement=TDC_get_measurement(7&TDC_get_status()); // read computed value on pointer result register address |
|
|
274 |
|
|
|
275 |
|
2163 |
kaklik |
276 |
switch (clkhsdiv) // calibrate measurement data to microseconds from known register setting |
1966 |
kaklik |
277 |
{ |
|
|
278 |
case TDC_CLKHSDIV_1: |
|
|
279 |
time=(measurement/65536.0) * 1.0e6/TDC_CLKHS; |
|
|
280 |
break; |
|
|
281 |
|
|
|
282 |
case TDC_CLKHSDIV_2: |
|
|
283 |
time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 2.0; |
|
|
284 |
break; |
|
|
285 |
|
|
|
286 |
case TDC_CLKHSDIV_4: |
|
|
287 |
time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 4.0; |
|
|
288 |
break; |
|
|
289 |
case TDC_CLKHSDIV_8: |
|
|
290 |
time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 8.0; |
|
|
291 |
break; |
|
|
292 |
} |
|
|
293 |
return time; |
1965 |
kaklik |
294 |
} |
1980 |
kaklik |
295 |
|
|
|
296 |
float TDC_mrange1_get_time(unsigned int channel1, unsigned int shot1, unsigned int channel2, unsigned int shot2) |
|
|
297 |
{ |
|
|
298 |
unsigned int32 measurement; |
|
|
299 |
float time; |
|
|
300 |
|
2181 |
kaklik |
301 |
Delay_ms(10); // wait to computing of result |
|
|
302 |
|
1980 |
kaklik |
303 |
switch (shot1) |
|
|
304 |
{ |
|
|
305 |
case 0: |
|
|
306 |
hit1=TDC_MRANGE1_HIT1_START; |
|
|
307 |
break; |
|
|
308 |
case 1: |
|
|
309 |
if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_1CH1; else hit1=TDC_MRANGE1_HIT1_1CH2; |
|
|
310 |
break; |
|
|
311 |
|
|
|
312 |
case 2: |
|
|
313 |
if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_2CH1; else hit1=TDC_MRANGE1_HIT1_2CH2; |
|
|
314 |
break; |
|
|
315 |
|
|
|
316 |
case 3: |
|
|
317 |
if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_3CH1; else hit1=TDC_MRANGE1_HIT1_3CH2; |
|
|
318 |
break; |
|
|
319 |
|
|
|
320 |
case 4: |
|
|
321 |
if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_4CH1; else hit1=TDC_MRANGE1_HIT1_4CH2; |
|
|
322 |
break; |
|
|
323 |
} |
|
|
324 |
|
|
|
325 |
switch (shot2) |
|
|
326 |
{ |
|
|
327 |
case 0: |
|
|
328 |
hit2=TDC_MRANGE1_HIT2_START; |
|
|
329 |
break; |
|
|
330 |
|
|
|
331 |
case 1: |
|
|
332 |
if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_1CH1; else hit2=TDC_MRANGE1_HIT2_1CH2; |
|
|
333 |
break; |
|
|
334 |
|
|
|
335 |
case 2: |
|
|
336 |
if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_2CH1; else hit2=TDC_MRANGE1_HIT2_2CH2; |
|
|
337 |
break; |
|
|
338 |
|
|
|
339 |
case 3: |
|
|
340 |
if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_3CH1; else hit2=TDC_MRANGE1_HIT2_3CH2; |
|
|
341 |
break; |
|
|
342 |
|
|
|
343 |
case 4: |
|
|
344 |
if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_4CH1; else hit2=TDC_MRANGE1_HIT2_4CH2; |
|
|
345 |
break; |
|
|
346 |
} |
2184 |
kaklik |
347 |
|
|
|
348 |
// hit2=TDC_MRANGE1_HIT2_START; |
|
|
349 |
// hit1=TDC_MRANGE1_HIT1_1CH1; |
1980 |
kaklik |
350 |
|
|
|
351 |
TDC_update_reg1(); // tell to ALU which shot period must be computed |
|
|
352 |
|
|
|
353 |
Delay_ms(50); // wait to computing of result |
|
|
354 |
|
|
|
355 |
measurement=TDC_get_measurement(7&TDC_get_status()); // read computed value on pointer result register address |
|
|
356 |
|
2184 |
kaklik |
357 |
printf("%Lu\r\n", (7&TDC_get_status())); |
2181 |
kaklik |
358 |
printf("%Lu\r\n", measurement); |
1980 |
kaklik |
359 |
|
|
|
360 |
switch (clkhsdiv) |
|
|
361 |
{ |
|
|
362 |
case TDC_CLKHSDIV_1: |
2181 |
kaklik |
363 |
time=(measurement/65536.0)* 1.0e6/TDC_CLKHS; |
1980 |
kaklik |
364 |
break; |
|
|
365 |
|
|
|
366 |
case TDC_CLKHSDIV_2: |
|
|
367 |
time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 2.0; |
|
|
368 |
break; |
|
|
369 |
|
|
|
370 |
case TDC_CLKHSDIV_4: |
|
|
371 |
time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 4.0; |
|
|
372 |
break; |
|
|
373 |
case TDC_CLKHSDIV_8: |
|
|
374 |
time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 8.0; |
|
|
375 |
break; |
|
|
376 |
} |
|
|
377 |
return time; |
|
|
378 |
} |