1757 |
kakl |
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//struct { |
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unsigned int8 firenum; |
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unsigned int8 div_fire; |
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unsigned int8 calresnum :2; |
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unsigned int8 clkhsdiv ; |
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unsigned int8 start_clkhs:1; |
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unsigned int8 portnum :1; |
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unsigned int8 Tcycle :1; |
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unsigned int8 fakenum :1; |
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unsigned int8 selclkT :1; |
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unsigned int8 calibrate :1; |
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unsigned int8 disautocal :1; |
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unsigned int8 MRange :1; |
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unsigned int8 neg_stop2 :1; |
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unsigned int8 neg_stop1 :1; |
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unsigned int8 neg_start :1; |
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//}reg0; |
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//struct { |
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unsigned int hit2 :4; |
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unsigned int hit1 :4; |
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unsigned int fast_init :1; |
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unsigned int sc :1; |
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unsigned int hitin2 :3; |
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unsigned int hitin1 :3; |
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//}reg1; |
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//struct { |
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unsigned int en_int :3; |
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unsigned int rfedge2 :1; |
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unsigned int rfedge1 :1; |
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unsigned int delval1 :3; |
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//}reg2; |
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//struct { |
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unsigned int en_err_val :1; |
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unsigned int tim0_mr2 :2; |
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unsigned int32 delval :7; |
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//}reg3; |
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//}TDC_registers; |
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1744 |
kakl |
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void TDC_init() |
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{ |
1745 |
kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0x70); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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} |
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void TDC_reset() |
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{ |
1745 |
kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0x50); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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} |
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void TDC_start_cycle() |
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{ |
1745 |
kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0x01); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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} |
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void TDC_start_temp() |
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{ |
1745 |
kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0x02); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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} |
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void TDC_start_cal_resonator() |
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{ |
1745 |
kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0x03); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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} |
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void TDC_start_cal() |
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{ |
1745 |
kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0x04); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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} |
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unsigned int32 TDC_get_measurement(int num) |
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{ |
1745 |
kakl |
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unsigned int32 ret; |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0xB0 + num - 1); |
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kakl |
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ret=spi_xfer(TDC_stream,0,32); |
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output_high(TDC_ENABLE); |
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return ret; |
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kakl |
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} |
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unsigned int16 TDC_get_status() |
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{ |
1745 |
kakl |
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unsigned int16 ret; |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB4,8); |
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ret=spi_xfer(TDC_stream,0,16); |
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output_high(TDC_ENABLE); |
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return ret; |
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kakl |
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} |
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unsigned int8 TDC_get_reg1() |
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{ |
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kakl |
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unsigned int8 ret; |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB5,8); |
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ret=spi_xfer(TDC_stream,0,8); |
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output_high(TDC_ENABLE); |
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return ret; |
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kakl |
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} |
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1757 |
kakl |
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void TDC_update_registers() |
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kakl |
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{ |
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kakl |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0x81,8); |
1757 |
kakl |
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spi_xfer(TDC_stream,reg1.*,24); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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1757 |
kakl |
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/* output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0xB1); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0xB2); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0xB3); |
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kakl |
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output_high(TDC_ENABLE); |
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kakl |
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kakl |
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output_low(TDC_ENABLE); |
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kakl |
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spi_xfer(TDC_stream,0xB4); |
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kakl |
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output_high(TDC_ENABLE); */ |
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kakl |
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} |
1757 |
kakl |
143 |
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void TDC_set_firenum() |
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{ |
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reg0.Tcycle=TDC_TCYCLE_SHORT; |
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} |