1745 |
kakl |
1 |
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1757 |
kakl |
2 |
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1755 |
kakl |
3 |
//register 0 |
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|
4 |
#define TDC_NEG_START_INV 1 |
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|
5 |
#define TDC_NEG_START 0 |
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6 |
#define TDC_NEG_STOP1_INV 1 |
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7 |
#define TDC_NEG_STOP1 0 |
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|
8 |
#define TDC_NEG_STOP2_INV 1 |
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|
9 |
#define TDC_NEG_STOP2 0 |
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|
10 |
#define TDC_MRANGE1 0 |
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|
11 |
#define TDC_MRANGE2 1 |
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|
12 |
#define TDC_AUTOCAL_EN 0 |
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|
13 |
#define TDC_AUTOCAL_DIS 1 |
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|
14 |
#define TDC_CALIBRATE_EN 1 |
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|
15 |
#define TDC_CALIBRATE_DIS 0 |
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|
16 |
#define TDC_TSELCLK_32KHZ 0 |
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|
17 |
#define TDC_TSELCLK_128HS 1 |
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|
18 |
#define TDC_TFAKENUM_2 0 |
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|
19 |
#define TDC_TFAKENUM_7 1 |
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|
20 |
#define TDC_TCYCLE_SHORT 0 |
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|
21 |
#define TDC_TCYSLE_LONG 1 |
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22 |
#define TDC_TPORTNUM_2 0 |
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|
23 |
#define TDC_TPORTNUM_4 1 |
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|
24 |
#define TDC_CLKHS_OFF 0 |
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|
25 |
#define TDC_CLKHS_ON 1 |
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|
26 |
#define TDC_CLKHS_640US 2 |
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|
27 |
#define TDC_CLKHS_1280US 4 |
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|
28 |
#define TDC_CLKHSDIV_1 0 |
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|
29 |
#define TDC_CLKHSDIV_2 1 |
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|
30 |
#define TDC_CLKHSDIV_4 2 |
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31 |
#define TDC_CLKHSDIV_8 3 |
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|
32 |
#define TDC_CALPERIODS_2 0 |
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33 |
#define TDC_CALPERIODS_4 1 |
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34 |
#define TDC_CALPERIODS_8 2 |
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35 |
#define TDC_CALPERIODS_16 3 |
1745 |
kakl |
36 |
|
1755 |
kakl |
37 |
#define TDC_DIV_FIRE_2 0 |
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|
38 |
#define TDC_DIV_FIRE_3 2 |
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|
39 |
#define TDC_DIV_FIRE_4 3 |
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40 |
#define TDC_DIV_FIRE_5 4 |
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41 |
#define TDC_DIV_FIRE_6 5 |
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42 |
#define TDC_DIV_FIRE_7 6 |
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43 |
#define TDC_DIV_FIRE_8 7 |
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44 |
#define TDC_DIV_FIRE_9 8 |
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|
45 |
#define TDC_DIV_FIRE_10 9 |
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|
46 |
#define TDC_DIV_FIRE_11 10 |
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|
47 |
#define TDC_DIV_FIRE_12 11 |
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|
48 |
#define TDC_DIV_FIRE_13 12 |
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|
49 |
#define TDC_DIV_FIRE_14 13 |
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|
50 |
#define TDC_DIV_FIRE_15 14 |
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|
51 |
#define TDC_DIV_FIRE_16 15 |
1745 |
kakl |
52 |
|
1755 |
kakl |
53 |
#define TDC_FIRENUM_0 0 |
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|
54 |
#define TDC_FIRENUM_1 1 |
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|
55 |
#define TDC_FIRENUM_2 2 |
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|
56 |
#define TDC_FIRENUM_3 3 |
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|
57 |
#define TDC_FIRENUM_4 4 |
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|
58 |
#define TDC_FIRENUM_5 5 |
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59 |
#define TDC_FIRENUM_6 6 |
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|
60 |
#define TDC_FIRENUM_7 7 |
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|
61 |
#define TDC_FIRENUM_8 8 |
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|
62 |
#define TDC_FIRENUM_9 9 |
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|
63 |
#define TDC_FIRENUM_10 10 |
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|
64 |
#define TDC_FIRENUM_11 11 |
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|
65 |
#define TDC_FIRENUM_12 12 |
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|
66 |
#define TDC_FIRENUM_13 13 |
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|
67 |
#define TDC_FIRENUM_14 14 |
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|
68 |
#define TDC_FIRENUM_15 15 |
1745 |
kakl |
69 |
|
1755 |
kakl |
70 |
//register 1 |
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|
71 |
#define TDC_HITIN1_0 0 |
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|
72 |
#define TDC_HITIN1_1 1 |
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|
73 |
#define TDC_HITIN1_2 2 |
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|
74 |
#define TDC_HITIN1_3 3 |
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|
75 |
#define TDC_HITIN1_4 4 |
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|
76 |
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|
|
77 |
#define TDC_HITIN2_0 0 |
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|
78 |
#define TDC_HITIN2_1 1 |
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|
79 |
#define TDC_HITIN2_2 2 |
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|
80 |
#define TDC_HITIN2_3 3 |
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|
81 |
#define TDC_HITIN2_4 4 |
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|
82 |
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|
|
83 |
#define TDC_FAST_INIT_EN 1 |
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|
84 |
#define TDC_FAST_INIT_DIS 0 |
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|
85 |
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|
|
86 |
#define TDC_MRANGE1_HIT1_START 0 |
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|
87 |
#define TDC_MRANGE1_HIT1_1CH1 1 |
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|
88 |
#define TDC_MRANGE1_HIT1_2CH1 2 |
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|
89 |
#define TDC_MRANGE1_HIT1_3CH1 3 |
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|
90 |
#define TDC_MRANGE1_HIT1_4CH1 4 |
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|
91 |
#define TDC_MRANGE1_HIT1_NOAC 5 |
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|
92 |
#define TDC_MRANGE1_HIT1_CAL1CH1 6 |
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|
93 |
#define TDC_MRANGE1_HIT1_CAL2CH1 7 |
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|
94 |
#define TDC_MRANGE1_HIT1_1CH2 9 |
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|
95 |
#define TDC_MRANGE1_HIT1_2CH2 0xA |
|
|
96 |
#define TDC_MRANGE1_HIT1_3CH2 0xB |
|
|
97 |
#define TDC_MRANGE1_HIT1_4CH2 0xC |
|
|
98 |
|
|
|
99 |
#define TDC_MRANGE2_HIT1_START 1 |
|
|
100 |
|
|
|
101 |
#define TDC_MRANGE1_HIT2_START 0 |
|
|
102 |
#define TDC_MRANGE1_HIT2_1CH1 1 |
|
|
103 |
#define TDC_MRANGE1_HIT2_2CH1 2 |
|
|
104 |
#define TDC_MRANGE1_HIT2_3CH1 3 |
|
|
105 |
#define TDC_MRANGE1_HIT2_4CH1 4 |
|
|
106 |
#define TDC_MRANGE1_HIT2_NOAC 5 |
|
|
107 |
#define TDC_MRANGE1_HIT2_CAL1CH1 6 |
|
|
108 |
#define TDC_MRANGE1_HIT2_CAL2CH1 7 |
|
|
109 |
#define TDC_MRANGE1_HIT2_1CH2 9 |
|
|
110 |
#define TDC_MRANGE1_HIT2_2CH2 0xA |
|
|
111 |
#define TDC_MRANGE1_HIT2_3CH2 0xB |
|
|
112 |
#define TDC_MRANGE1_HIT2_4CH2 0xC |
|
|
113 |
|
|
|
114 |
#define TDC_MRANGE2_HIT2_1CH1 2 |
|
|
115 |
#define TDC_MRANGE2_HIT2_2CH1 3 |
|
|
116 |
#define TDC_MRANGE2_HIT2_3CH1 4 |
|
|
117 |
|
|
|
118 |
//register 2 |
|
|
119 |
#define TDC_CH1EDGE_RIS 0 |
|
|
120 |
#define TDC_CH1EDGE_FAL 1 |
|
|
121 |
|
|
|
122 |
//register 3 |
|
|
123 |
#define TDC_TIM0MR2_256 0 |
|
|
124 |
#define TDC_TIM0MR2_1024 1 |
|
|
125 |
#define TDC_TIM0MR2_4096 2 |
|
|
126 |
#define TDC_TIM0MR2_16384 3 |
|
|
127 |
|
|
|
128 |
#define TDC_ERRVAL_EN 1 |
|
|
129 |
#define TDC_ERRVAL_DIS 0 |
|
|
130 |
|
|
|
131 |
//register 5 |
|
|
132 |
#define TDC_FIRE_PHASE 0 |
|
|
133 |
#define TDC_FIRE_PHASE_INV 1 |
|
|
134 |
#define TDC_REPEAT_FIRE_0 0 |
|
|
135 |
#define TDC_REPEAT_FIRE_1 1 |
|
|
136 |
#define TDC_REPEAT_FIRE_2 2 |
|
|
137 |
#define TDC_REPEAT_FIRE_3 3 |
|
|
138 |
#define TDC_REPEAT_FIRE_4 4 |
|
|
139 |
#define TDC_REPEAT_FIRE_5 5 |
|
|
140 |
#define TDC_REPEAT_FIRE_6 6 |
|
|
141 |
#define TDC_REPEAT_FIRE_7 7 |
|
|
142 |
|
|
|
143 |
#define TDC_PHASENOISE_EN 0 |
|
|
144 |
#define TDC_PHASENOISE_DIS 1 |
|
|
145 |
|
|
|
146 |
#define TDC_STARTNOISE_EN 1 |
|
|
147 |
#define TDC_STARTNOISE_DIS 0 |
|
|
148 |
|
1757 |
kakl |
149 |
#include "GP2.c" |