/Designs/HOPEwireless/SW_RX_RFM01/RX_RFM01.c |
---|
96,7 → 96,7 |
RF_WRITE_CMD(0x0000); |
RF_WRITE_CMD(0x918A); // 868BAND,134kHz |
RF_WRITE_CMD(0xA640); // 876Mhz |
RF_WRITE_CMD(0xA640); // 868Mhz |
RF_WRITE_CMD(0xC847); // 4.8kbps |
RF_WRITE_CMD(0xC69B); // AFC setting |
RF_WRITE_CMD(0xC42A); // Clock recovery manualcontrol,Dig. filter, DQD=4 |
/Designs/HOPEwireless/SW_RX_RFM12B/RFM12B.h |
---|
0,0 → 1,184 |
/* mija 2008 |
defines for module RFM12B - RX/TX 868MHz |
*/ |
#define CMD_SETTING 0x8000 // el, ef, b1, b0, x3, x2, x1, x0 |
#define CMD_POWER 0x8200 // er, ebb, et, es, ex, eb, ew, dc |
#define CMD_FREQUENCY 0xA000 // f11..f0 860+F*0.005 MHz 36..3903 |
#define CMD_RATE 0xC600 // cs, r6..r0 BR=10M/29/(R+1)/1+cs*7) |
#define CMD_RX 0x9000 // P16, d1, d0, i2..i0, g1, g0, r2..r0 |
#define CMD_FILTER 0xC228 // al, ml, s, f2..f0 |
#define CMD_FIFO 0xCA00 // f3..f0, sp, al, ff, dr |
#define CMD_SYNCFIFO 0xCE00 // b7..b0 |
#define CMD_READ_FIFO 0xB000 // use for read FIFO |
#define CMD_AFC 0xC400 // a1, a0, rl1, rl0, st, fi, oe, en |
#define CMD_TX 0x9800 // mp, m3..m0, p2..p0 |
#define CMD_PLL 0xCC02 // ob1, ob0, lpx, ddy, ddit, bw0 |
#define CMD_TX_DATA 0xB800 // t7..t0 |
#define CMD_WAKE_UP 0xE000 // r4..r0, m7..m0 T=M*2^R [ms] |
#define CMD_DUTY 0xC800 // d6..d0 D.C.= (D*2+1)/M*100% |
#define CMD_BATTERY 0xC000 // d2..d0, v3..v0 |
#define CMD_STATUS 0x0000 // for read status |
// CMD_SETTING |
#define SETTING_EL 0x80 // enable TX register |
#define SETTING_EF 0x40 // enable TX FIFO buffer |
#define SETTING_B1 0x20 // select band |
#define SETTING_B0 0x10 // select band |
#define BAND_868 0x20 |
#define SETTING_X3 0x08 // select capacitor |
#define SETTING_X2 0x04 // select capacitor |
#define SETTING_X1 0x02 // select capacitor |
#define SETTING_X0 0x01 // select capacitor |
#define C_8_5pF 0x0 |
#define C_9pF 0x1 |
#define C_9_5pF 0x2 |
#define C_10pF 0x3 |
#define C_10_5pF 0x4 |
#define C_11pF 0x5 |
#define C_11_5pF 0x6 |
#define C_12pF 0x7 |
#define C_12_5pF 0x8 |
#define C_13pF 0x9 |
#define C_13_5pF 0xA |
#define C_14pF 0xB |
#define C_14_5pF 0xC |
#define C_15pF 0xD |
#define C_15_5pF 0xE |
#define C_16pF 0xF |
// CMD_POWER |
#define POWER_ER 0x80 // enable receiver |
#define POWER_EBB 0x40 // enable base band block |
#define POWER_ET 0x20 // enable transmitter |
#define POWER_ES 0x10 // enable synthesizer |
#define POWER_EX 0x08 // enable crystal oscillator |
#define POWER_EB 0x04 // enable low battery detector |
#define POWER_EW 0x02 // enable wake up timer |
#define POWER_DC 0x01 // disable clock output of CLK pin |
// CMD_FREQUENCY |
#define FREQUENCY_867 0x578 |
#define FREQUENCY_868 0x640 |
#define FREQUENCY_869 0x708 |
// CMD_RATE |
#define RATE_1200 0x123 |
#define RATE_2400 0x8F |
#define RATE_4800 0x47 |
#define RATE_CS_4800 0x108 |
#define RATE_9600 0x23 |
#define RATE_19200 0x11 |
#define RATE_38400 0x8 |
#define RATE_57600 0x5 |
#define RATE_115200 0x2 |
// CMD_RX |
#define RX_P16 10 // VDI output / interrupt input |
#define VDI_FAST 0x000 // VDI response time |
#define VDI_MEDIUM 0x100 |
#define VDI_SLOW 0x200 |
#define VDI_ALWAYS_ON 0x300 |
#define BANDWIDTH_400 0x20 // baseband bandwidth[kHz] |
#define BANDWIDTH_340 0x40 |
#define BANDWIDTH_270 0x60 |
#define BANDWIDTH_200 0x80 |
#define BANDWIDTH_134 0xA0 |
#define BANDWIDTH_67 0xC0 |
#define LNA_GAIN_0 0x00 // LNA_GAIN |
#define LNA_GAIN_6 0x08 // -6dBm |
#define LNA_GAIN_14 0x10 // -14dBm |
#define LNA_GAIN_20 0x18 // -20dBm |
#define DRSSI_103 0x0 // RSSI= DRSSI + LNA_GAIN -103dBm |
#define DRSSI_97 0x1 // -97dBm |
#define DRSSI_91 0x2 // -91dBm |
#define DRSSI_85 0x3 // -85dBm |
#define DRSSI_79 0x4 // -79dBm |
#define DRSSI_73 0x5 // -73dBm |
#define DRSSI_67 0x6 // -67dBm |
#define DRSSI_61 0x7 // -61dBm |
// CMD_FILTER |
#define FILTER_AL 0x80 // enable clock recovery atuo-lock |
#define FILTER_ML 0x40 // enable clock recovery fast mode |
#define FILTER_S 0x10 // enable analog RC filter |
#define DQD_7 0x7 |
#define DQD_6 0x6 |
#define DQD_5 0x5 |
#define DQD_4 0x4 |
#define DQD_3 0x3 |
#define DQD_2 0x2 |
#define DQD_1 0x1 |
#define DQD_0 0x0 |
// CMD_FIFO |
#define FIFO_16 0x00 // FIFO level |
#define FIFO_15 0xF0 |
#define FIFO_14 0xE0 |
#define FIFO_13 0xD0 |
#define FIFO_12 0xC0 |
#define FIFO_11 0xB0 |
#define FIFO_10 0xA0 |
#define FIFO_9 0x90 |
#define FIFO_8 0x80 |
#define FIFO_7 0x70 |
#define FIFO_6 0x60 |
#define FIFO_5 0x50 |
#define FIFO_4 0x40 |
#define FIFO_3 0x30 |
#define FIFO_2 0x20 |
#define FIFO_1 0x10 |
#define FIFO_SP 0x8 // select 1 byte sync.pattern |
#define FIFO_AL 0x4 // start FIFO always |
#define FIFO_FF 0x2 // enable FIFO fill |
#define FIFO_DR 0x1 // disable hi sensitivity reset |
// CMD_AFC |
#define AFC_MCU 0x00 // AFC auto_mode by MCU |
#define AFC_POWER_ON 0x40 // AFC at poweron |
#define AFC_OFFSET 0x80 // AFC keep offset when VDI hi |
#define AFC_VDI 0xC0 // AFC keeps independently from VDI |
#define AFC_NORESTR 0x00 // range limit no restriction |
#define AFC_RANG_16 0x10 // range limit +15/-16 |
#define AFC_RANG_8 0x20 // range limit +7/-8 |
#define AFC_RANG_4 0x30 // range limit +3/-4 |
#define AFC_ST 0x08 // store offset into outpur register |
#define AFC_FI 0x04 // enable AFC hi accuracy mode |
#define AFC_OE 0x02 // enable AFC output register |
#define AFC_EN 0x01 // enable AFC function |
// CMD_TX |
#define TX_MP 0x100 // modulation polarity |
#define TX_DEV_15 0x00 // select frequency deviation |
#define TX_DEV_30 0x10 |
#define TX_DEV_45 0x20 |
#define TX_DEV_60 0x30 |
#define TX_DEV_75 0x40 |
#define TX_DEV_90 0x50 |
#define TX_DEV_105 0x60 |
#define TX_DEV_120 0x70 |
#define TX_DEV_135 0x80 |
#define TX_DEV_150 0x90 |
#define TX_DEV_165 0xA0 |
#define TX_DEV_180 0xB0 |
#define TX_DEV_195 0xC0 |
#define TX_DEV_210 0xD0 |
#define TX_DEV_225 0xE0 |
#define TX_DEV_240 0xF0 |
#define TX_POWER_0 0x00 // 0 select output power |
#define TX_POWER_3 0x01 // -3dBm |
#define TX_POWER_6 0x02 // -6dBm |
#define TX_POWER_9 0x03 // -9Bm |
#define TX_POWER_12 0x04 // -12dBm |
#define TX_POWER_15 0x05 // -15dBm |
#define TX_POWER_18 0x06 // -18dBm |
#define TX_POWER_21 0x07 // -21dBm |
// CMD_PLL |
#define PLL_CLK_5_10 0x00 // microcontroller output clock 5-10Mhz |
#define PLL_CLK_33 0x20 // 3.3MHz |
#define PLL_CLK_25 0x40 // 2.5Mhz |
#define PLL_LPX 0x10 // low power mode |
#define PLL_DDY 0x08 // phase detector delay enable |
#define PLL_DDIT 0x04 // disable the dithering in the PLL loop |
#define PLL_BW0 0x01 // PLL bandwidth (max rate 256) |
/Designs/HOPEwireless/SW_RX_RFM12B/RX_RFM12B.c |
---|
0,0 → 1,220 |
/* mija 2008 |
demo for RFM12B - RX 868MHz |
CPU ATMEGA8 |
fcpu = 1MHz |
!! define PIN,PORT,DDR for IOpin !! |
*/ |
#include <avr/io.h> |
#include <util/delay.h> |
#include "RFM12B.h" |
//************************************************************************ |
#define SDI PB3 |
#define SDI_PORT PORTB |
#define SDI_DDR DDRB |
#define FSK PC1 |
#define FSK_PORT PORTC |
#define FSK_DDR DDRC |
#define SDO PB4 // input for mega |
#define SDO_PORT PORTB |
#define SDO_DDR DDRB |
#define SDO_PIN PINB |
#define SCK PB5 |
#define SCK_PORT PORTB |
#define SCK_DDR DDRB |
#define nIRQ PD2 // input for mega |
#define nIRQ_PORT PORTD |
#define nIRQ_DDR DDRD |
#define nIRQ_PIN PIND |
#define nSEL PB2 |
#define nSEL_PORT PORTB |
#define nSEL_DDR DDRB |
#define LED PD3 |
#define LED_PORT PORTD |
#define LED_DDR DDRD |
// interni |
#define SDI_H SDI_PORT |= _BV(SDI) |
#define SDI_L SDI_PORT &= (~(_BV(SDI))) |
#define SDI_INIT SDI_DDR |= _BV(SDI) |
#define FSK_H FSK_PORT |= _BV(FSK) |
#define FSK_L FSK_PORT &= (~(_BV(FSK))) |
#define FSK_INIT FSK_DDR |= _BV(FSK) |
#define SDO_INPUT (SDO_PIN & _BV(SDO)) |
#define SDO_INIT SDO_DDR &= (~(_BV(SDO))) |
#define SCK_H SCK_PORT |= _BV(SCK) |
#define SCK_L SCK_PORT &= (~(_BV(SCK))) |
#define SCK_INIT SCK_DDR |= _BV(SCK) |
#define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ)) |
#define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ))) |
#define nSEL_H nSEL_PORT |= _BV(nSEL) |
#define nSEL_L nSEL_PORT &= (~(_BV(nSEL))) |
#define nSEL_INIT nSEL_DDR |= _BV(nSEL) |
#define LED_H LED_PORT |= _BV(LED) |
#define LED_L LED_PORT &= (~(_BV(LED))) |
#define LED_INIT LED_DDR |= _BV(LED) |
#define START_FIFO RF_WRITE_CMD(CMD_FIFO|FIFO_8|FIFO_FF|FIFO_DR) |
#define STOP_FIFO RF_WRITE_CMD(CMD_FIFO) |
//************************************************************************ |
uint8_t rx_buf[16]; |
//************************************************************************ |
void delay_ms(uint16_t time) |
{ |
while(time--) _delay_ms(1); |
} |
void IO_INIT(void) |
{ |
SDI_INIT; |
SDO_INIT; |
SCK_INIT; |
nIRQ_INIT; |
nSEL_INIT; |
FSK_INIT; |
LED_INIT; |
} |
void RF_INIT(void) |
{ |
nSEL_H; |
SDI_H; |
SCK_L; |
nIRQ_INPUT; |
SDO_INPUT; |
FSK_H; |
} |
uint16_t RF_WRITE_CMD(uint16_t cmd) |
{ |
uint8_t i; |
uint16_t temp; |
SCK_L; |
nSEL_L; |
temp=0; |
for (i=0;i<16;i++) |
{ |
if (cmd & 0x8000) SDI_H; |
else SDI_L; |
SCK_H; |
cmd <<= 1; |
temp <<= 1; |
if(SDO_INPUT) temp |= 0x0001; |
SCK_L; |
} |
SCK_L; |
nSEL_H; |
return (temp); |
} |
void RF_WRITE_DATA(uint8_t data) |
{ |
while (nIRQ_INPUT); |
RF_WRITE_CMD(0xB800 + data); |
} |
uint8_t RF_READ_DATA(void) |
{ |
while (nIRQ_INPUT); |
RF_WRITE_CMD(0x0000); |
return (0x00FF & RF_WRITE_CMD(0xB000)); |
} |
void RS232_INIT(void) |
{ |
//set baud rate 9600 8N1 for Fosc 1MHz |
UBRRH = 0; |
UBRRL = 12; |
UCSRB = (1<<RXEN)|(1<<TXEN); //enable RX TX |
UCSRC = (1<<URSEL) |(3<<UCSZ0); //8N1 |
UCSRA |= _BV(U2X); |
} |
void put_rs232(char data) |
{ |
// Wait for empty transmit buffer |
while ( !( UCSRA & (1<<UDRE)) ); |
// Put data into buffer, sends the data |
UDR = data; |
} |
int main() |
{ |
uint8_t i,j,ChkSum; |
uint8_t LED_TRG; |
uint8_t b; |
IO_INIT(); |
RF_INIT(); |
RS232_INIT(); |
LED_H; |
delay_ms(1000); |
LED_L; |
LED_TRG=0; |
RF_WRITE_CMD(CMD_SETTING |SETTING_EL |SETTING_EF |BAND_868 |C_12pF ); |
RF_WRITE_CMD(CMD_POWER |POWER_ER |POWER_EBB |POWER_ES |POWER_EX |POWER_DC); |
RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868 ); |
RF_WRITE_CMD(CMD_RATE |RATE_9600 ); |
RF_WRITE_CMD(CMD_RX |RX_P16 |VDI_FAST |BANDWIDTH_67|LNA_GAIN_0|DRSSI_103); |
RF_WRITE_CMD(CMD_FILTER |FILTER_AL |DQD_4 ); |
RF_WRITE_CMD(CMD_FIFO |FIFO_8 |FIFO_DR ); |
RF_WRITE_CMD(CMD_SYNCFIFO |0xD4 ); |
RF_WRITE_CMD(CMD_AFC |AFC_POWER_ON|AFC_RANG_8|AFC_ST |AFC_OE |AFC_EN ); |
//RF_WRITE_CMD(CMD_TX |TX_DEV_120 |TX_POWER_0 ); |
RF_WRITE_CMD(CMD_PLL |PLL_CLK_25 |PLL_LPX |PLL_DDIT |PLL_BW0 ); |
while (1) |
{ |
START_FIFO; |
ChkSum = 0; |
for (i=0;i<16;i++) |
{ |
b= RF_READ_DATA(); |
rx_buf[i]=b; |
ChkSum +=b; |
} |
b = RF_READ_DATA(); |
RF_READ_DATA(); |
STOP_FIFO; |
for (i=0;i<16;i++) |
{ |
put_rs232(rx_buf[i]); |
delay_ms(2); |
} |
if (ChkSum == b) LED_TRG = ~ LED_TRG; |
else put_rs232('\f'); |
if (LED_TRG) LED_H; |
else LED_L; |
} |
return 0; |
} |
/Designs/HOPEwireless/SW_RX_RFM12B/RX_RFM12B.hex |
---|
0,0 → 1,31 |
:1000000012C02CC02BC02AC029C028C027C026C0BF |
:1000100025C024C023C022C021C020C01FC01EC0D4 |
:100020001DC01CC01BC011241FBECFE5D4E0DEBF25 |
:10003000CDBF10E0A0E6B0E0EEEDF1E002C005902B |
:100040000D92A036B107D9F710E0A0E6B0E001C0EC |
:100050001D92A037B107E1F758D0C0C0D1CFAC0195 |
:10006000892B59F020E030E08AEF90E00197F1F71A |
:100070002F5F3F4F24173507B9F70895BB9ABC98F7 |
:10008000BD9A8A98BA9AA19A8B9A0895C29AC39AED |
:10009000C59880B386B3A99A0895C598C29840E0E0 |
:1000A00020E030E0992314F4C39A01C0C398C59AA4 |
:1000B000220F331FB4992160C5984F5F403119F06A |
:1000C000880F991FEFCFC598C29AC90108958299E8 |
:1000D000FECF90E080509844E0DF08958299FECFF3 |
:1000E00080E090E0DADF80E090EBD7DF90E00895E9 |
:1000F00010BC8CE089B988E18AB986E880BD599A3C |
:1001000008955D9BFECF8CB908956F927F929F9268 |
:10011000AF92BF92CF92DF92EF92FF920F931F9315 |
:10012000CF93DF93ABDFB2DFE3DF939A88EE93E008 |
:1001300096DF939887EE90E8B0DF89ED92E8ADDF27 |
:1001400080E496EAAADF83E296ECA7DF8AEC90E9E6 |
:10015000A4DF8CEA92ECA1DF81E89AEC9EDF84EDCB |
:100160009EEC9BDF8BE694EC98DF87E59CEC95DFBB |
:1001700099240F2EF0E6AF2EF0E0BF2EF02D3501C2 |
:10018000CC24DD246894C4F8CA0CDB1C83E89AEC08 |
:1001900084DF8501E301FF24A1DF8993F80ECC15EC |
:1001A000DD05D1F79BDFE82E99DF80E09AEC75DF63 |
:1001B000F80181918F01A5DF82E090E050DFC01748 |
:1001C000D107B1F7FE1411F4909402C08CE099DFCE |
:0E01D000992011F0939ADACF9398D8CFFFCFF1 |
:00000001FF |
/Designs/HOPEwireless/SW_TX_RFM12B/RFM12B.h |
---|
0,0 → 1,184 |
/* mija 2008 |
defines for module RFM12B - RX/TX 868MHz |
*/ |
#define CMD_SETTING 0x8000 // el, ef, b1, b0, x3, x2, x1, x0 |
#define CMD_POWER 0x8200 // er, ebb, et, es, ex, eb, ew, dc |
#define CMD_FREQUENCY 0xA000 // f11..f0 860+F*0.005 MHz 36..3903 |
#define CMD_RATE 0xC600 // cs, r6..r0 BR=10M/29/(R+1)/1+cs*7) |
#define CMD_RX 0x9000 // P16, d1, d0, i2..i0, g1, g0, r2..r0 |
#define CMD_FILTER 0xC228 // al, ml, s, f2..f0 |
#define CMD_FIFO 0xCA00 // f3..f0, sp, al, ff, dr |
#define CMD_SYNCFIFO 0xCE00 // b7..b0 |
#define CMD_READ_FIFO 0xB000 // use for read FIFO |
#define CMD_AFC 0xC400 // a1, a0, rl1, rl0, st, fi, oe, en |
#define CMD_TX 0x9800 // mp, m3..m0, p2..p0 |
#define CMD_PLL 0xCC02 // ob1, ob0, lpx, ddy, ddit, bw0 |
#define CMD_TX_DATA 0xB800 // t7..t0 |
#define CMD_WAKE_UP 0xE000 // r4..r0, m7..m0 T=M*2^R [ms] |
#define CMD_DUTY 0xC800 // d6..d0 D.C.= (D*2+1)/M*100% |
#define CMD_BATTERY 0xC000 // d2..d0, v3..v0 |
#define CMD_STATUS 0x0000 // for read status |
// CMD_SETTING |
#define SETTING_EL 0x80 // enable TX register |
#define SETTING_EF 0x40 // enable TX FIFO buffer |
#define SETTING_B1 0x20 // select band |
#define SETTING_B0 0x10 // select band |
#define BAND_868 0x20 |
#define SETTING_X3 0x08 // select capacitor |
#define SETTING_X2 0x04 // select capacitor |
#define SETTING_X1 0x02 // select capacitor |
#define SETTING_X0 0x01 // select capacitor |
#define C_8_5pF 0x0 |
#define C_9pF 0x1 |
#define C_9_5pF 0x2 |
#define C_10pF 0x3 |
#define C_10_5pF 0x4 |
#define C_11pF 0x5 |
#define C_11_5pF 0x6 |
#define C_12pF 0x7 |
#define C_12_5pF 0x8 |
#define C_13pF 0x9 |
#define C_13_5pF 0xA |
#define C_14pF 0xB |
#define C_14_5pF 0xC |
#define C_15pF 0xD |
#define C_15_5pF 0xE |
#define C_16pF 0xF |
// CMD_POWER |
#define POWER_ER 0x80 // enable receiver |
#define POWER_EBB 0x40 // enable base band block |
#define POWER_ET 0x20 // enable transmitter |
#define POWER_ES 0x10 // enable synthesizer |
#define POWER_EX 0x08 // enable crystal oscillator |
#define POWER_EB 0x04 // enable low battery detector |
#define POWER_EW 0x02 // enable wake up timer |
#define POWER_DC 0x01 // disable clock output of CLK pin |
// CMD_FREQUENCY |
#define FREQUENCY_867 0x578 |
#define FREQUENCY_868 0x640 |
#define FREQUENCY_869 0x708 |
// CMD_RATE |
#define RATE_1200 0x123 |
#define RATE_2400 0x8F |
#define RATE_4800 0x47 |
#define RATE_CS_4800 0x108 |
#define RATE_9600 0x23 |
#define RATE_19200 0x11 |
#define RATE_38400 0x8 |
#define RATE_57600 0x5 |
#define RATE_115200 0x2 |
// CMD_RX |
#define RX_P16 10 // VDI output / interrupt input |
#define VDI_FAST 0x000 // VDI response time |
#define VDI_MEDIUM 0x100 |
#define VDI_SLOW 0x200 |
#define VDI_ALWAYS_ON 0x300 |
#define BANDWIDTH_400 0x20 // baseband bandwidth[kHz] |
#define BANDWIDTH_340 0x40 |
#define BANDWIDTH_270 0x60 |
#define BANDWIDTH_200 0x80 |
#define BANDWIDTH_134 0xA0 |
#define BANDWIDTH_67 0xC0 |
#define LNA_GAIN_0 0x00 // LNA_GAIN |
#define LNA_GAIN_6 0x08 // -6dBm |
#define LNA_GAIN_14 0x10 // -14dBm |
#define LNA_GAIN_20 0x18 // -20dBm |
#define DRSSI_103 0x0 // RSSI= DRSSI + LNA_GAIN -103dBm |
#define DRSSI_97 0x1 // -97dBm |
#define DRSSI_91 0x2 // -91dBm |
#define DRSSI_85 0x3 // -85dBm |
#define DRSSI_79 0x4 // -79dBm |
#define DRSSI_73 0x5 // -73dBm |
#define DRSSI_67 0x6 // -67dBm |
#define DRSSI_61 0x7 // -61dBm |
// CMD_FILTER |
#define FILTER_AL 0x80 // enable clock recovery atuo-lock |
#define FILTER_ML 0x40 // enable clock recovery fast mode |
#define FILTER_S 0x10 // enable analog RC filter |
#define DQD_7 0x7 |
#define DQD_6 0x6 |
#define DQD_5 0x5 |
#define DQD_4 0x4 |
#define DQD_3 0x3 |
#define DQD_2 0x2 |
#define DQD_1 0x1 |
#define DQD_0 0x0 |
// CMD_FIFO |
#define FIFO_16 0x00 // FIFO level |
#define FIFO_15 0xF0 |
#define FIFO_14 0xE0 |
#define FIFO_13 0xD0 |
#define FIFO_12 0xC0 |
#define FIFO_11 0xB0 |
#define FIFO_10 0xA0 |
#define FIFO_9 0x90 |
#define FIFO_8 0x80 |
#define FIFO_7 0x70 |
#define FIFO_6 0x60 |
#define FIFO_5 0x50 |
#define FIFO_4 0x40 |
#define FIFO_3 0x30 |
#define FIFO_2 0x20 |
#define FIFO_1 0x10 |
#define FIFO_SP 0x8 // select 1 byte sync.pattern |
#define FIFO_AL 0x4 // start FIFO always |
#define FIFO_FF 0x2 // enable FIFO fill |
#define FIFO_DR 0x1 // disable hi sensitivity reset |
// CMD_AFC |
#define AFC_MCU 0x00 // AFC auto_mode by MCU |
#define AFC_POWER_ON 0x40 // AFC at poweron |
#define AFC_OFFSET 0x80 // AFC keep offset when VDI hi |
#define AFC_VDI 0xC0 // AFC keeps independently from VDI |
#define AFC_NORESTR 0x00 // range limit no restriction |
#define AFC_RANG_16 0x10 // range limit +15/-16 |
#define AFC_RANG_8 0x20 // range limit +7/-8 |
#define AFC_RANG_4 0x30 // range limit +3/-4 |
#define AFC_ST 0x08 // store offset into outpur register |
#define AFC_FI 0x04 // enable AFC hi accuracy mode |
#define AFC_OE 0x02 // enable AFC output register |
#define AFC_EN 0x01 // enable AFC function |
// CMD_TX |
#define TX_MP 0x100 // modulation polarity |
#define TX_DEV_15 0x00 // select frequency deviation |
#define TX_DEV_30 0x10 |
#define TX_DEV_45 0x20 |
#define TX_DEV_60 0x30 |
#define TX_DEV_75 0x40 |
#define TX_DEV_90 0x50 |
#define TX_DEV_105 0x60 |
#define TX_DEV_120 0x70 |
#define TX_DEV_135 0x80 |
#define TX_DEV_150 0x90 |
#define TX_DEV_165 0xA0 |
#define TX_DEV_180 0xB0 |
#define TX_DEV_195 0xC0 |
#define TX_DEV_210 0xD0 |
#define TX_DEV_225 0xE0 |
#define TX_DEV_240 0xF0 |
#define TX_POWER_0 0x00 // 0 select output power |
#define TX_POWER_3 0x01 // -3dBm |
#define TX_POWER_6 0x02 // -6dBm |
#define TX_POWER_9 0x03 // -9Bm |
#define TX_POWER_12 0x04 // -12dBm |
#define TX_POWER_15 0x05 // -15dBm |
#define TX_POWER_18 0x06 // -18dBm |
#define TX_POWER_21 0x07 // -21dBm |
// CMD_PLL |
#define PLL_CLK_5_10 0x00 // microcontroller output clock 5-10Mhz |
#define PLL_CLK_33 0x20 // 3.3MHz |
#define PLL_CLK_25 0x40 // 2.5Mhz |
#define PLL_LPX 0x10 // low power mode |
#define PLL_DDY 0x08 // phase detector delay enable |
#define PLL_DDIT 0x04 // disable the dithering in the PLL loop |
#define PLL_BW0 0x01 // PLL bandwidth (max rate 256) |
/Designs/HOPEwireless/SW_TX_RFM12B/TX_RFM12B.c |
---|
0,0 → 1,190 |
/* mija 2008 |
demo for RFM12B - TX 868MHz |
CPU ATMEGA16 |
fcpu = 1MHz |
!! define PIN,PORT,DDR for IOpin !! |
*/ |
#include <avr/io.h> |
#include <util/delay.h> |
#include "RFM12B.h" |
//************************************************************************ |
#define SDI PB3 |
#define SDI_PORT PORTB |
#define SDI_DDR DDRB |
#define FSK PC1 |
#define FSK_PORT PORTC |
#define FSK_DDR DDRC |
#define SDO PB4 // input for mega |
#define SDO_PORT PORTB |
#define SDO_DDR DDRB |
#define SDO_PIN PINB |
#define SCK PB5 |
#define SCK_PORT PORTB |
#define SCK_DDR DDRB |
#define nIRQ PD2 // input for mega |
#define nIRQ_PORT PORTD |
#define nIRQ_DDR DDRD |
#define nIRQ_PIN PIND |
#define nSEL PB2 |
#define nSEL_PORT PORTB |
#define nSEL_DDR DDRB |
#define LED PC3 |
#define LED_PORT PORTC |
#define LED_DDR DDRC |
// interni |
#define SDI_H SDI_PORT |= _BV(SDI) |
#define SDI_L SDI_PORT &= (~(_BV(SDI))) |
#define SDI_INIT SDI_DDR |= _BV(SDI) |
#define FSK_H FSK_PORT |= _BV(FSK) |
#define FSK_L FSK_PORT &= (~(_BV(FSK))) |
#define FSK_INIT FSK_DDR |= _BV(FSK) |
#define SDO_INPUT (SDO_PIN & _BV(SDO)) |
#define SDO_INIT SDO_DDR &= (~(_BV(SDO))) |
#define SCK_H SCK_PORT |= _BV(SCK) |
#define SCK_L SCK_PORT &= (~(_BV(SCK))) |
#define SCK_INIT SCK_DDR |= _BV(SCK) |
#define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ)) |
#define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ))) |
#define nSEL_H nSEL_PORT |= _BV(nSEL) |
#define nSEL_L nSEL_PORT &= (~(_BV(nSEL))) |
#define nSEL_INIT nSEL_DDR |= _BV(nSEL) |
#define LED_H LED_PORT |= _BV(LED) |
#define LED_L LED_PORT &= (~(_BV(LED))) |
#define LED_INIT LED_DDR |= _BV(LED) |
#define START_TX RF_WRITE_CMD(CMD_POWER|POWER_ET|POWER_ES|POWER_EX|POWER_DC) |
#define STOP_TX RF_WRITE_CMD(CMD_POWER|POWER_DC) |
//************************************************************************ |
//uint8_t test[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x03b,0x3c,0x3d,0x3e,0x3f}; |
uint8_t test[17]="\n\rATmega16\n\r ---"; |
//uint8_t test[16]="0123456789abcdef"; |
//************************************************************************ |
void delay_ms(uint16_t time) |
{ |
while(time--) _delay_ms(1); |
} |
void IO_INIT(void) |
{ |
SDI_INIT; |
SDO_INIT; |
SCK_INIT; |
nIRQ_INIT; |
nSEL_INIT; |
FSK_INIT; |
LED_INIT; |
} |
void RF_INIT(void) |
{ |
nSEL_H; |
SDI_H; |
SCK_L; |
nIRQ_INPUT; |
SDO_INPUT; |
FSK_H; |
} |
void RF_WRITE_CMD(uint16_t cmd) |
{ |
uint8_t i; |
SCK_L; |
nSEL_L; |
for (i=0;i<16;i++) |
{ |
SCK_L; |
SCK_L; |
if (cmd & 0x8000) SDI_H; |
else SDI_L; |
SCK_H; |
SCK_H; |
cmd <<= 1; |
} |
SCK_L; |
nSEL_H; |
} |
void RF_WRITE_DATA(uint8_t data) |
{ |
while (nIRQ_INPUT); |
RF_WRITE_CMD(0xB800 + data); |
} |
int main() |
{ |
uint8_t i,j,ChkSum; |
IO_INIT(); |
RF_INIT(); |
LED_H; |
delay_ms(100); |
RF_WRITE_CMD(CMD_SETTING |SETTING_EL |SETTING_EF |BAND_868 |C_12pF ); |
RF_WRITE_CMD(CMD_POWER |POWER_ET |POWER_ES |POWER_EX |POWER_DC ); |
RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868 ); |
RF_WRITE_CMD(CMD_RATE |RATE_9600 ); |
//RF_WRITE_CMD(CMD_RX |RX_P16|VDI_FAST|BANDWIDTH_134|LNA_GAIN_0|DRSSI_103 ); |
//RF_WRITE_CMD(CMD_FILTER |FILTER_AL |DQD_4 ); |
//RF_WRITE_CMD(CMD_FIFO |FIFO_8 |FIFO_DR ); |
//RF_WRITE_CMD(CMD_SYNCFIFO |0xD4 ); |
//RF_WRITE_CMD(CMD_AFC |AFC_POWER_ON|AFC_RANG_8|AFC_OE |AFC_EN ); |
RF_WRITE_CMD(CMD_TX |TX_DEV_45 |TX_POWER_0 ); |
//RF_WRITE_CMD(CMD_PLL |PLL_CLK_25 |PLL_LPX |PLL_DDIT |PLL_BW0 ); |
j= 0; |
while (1) |
{ |
LED_H; |
RF_WRITE_CMD(0x0000); |
START_TX; |
ChkSum = 0; |
for (i=0;i<3;i++) RF_WRITE_DATA(0xAA); |
RF_WRITE_DATA(0x2D); |
RF_WRITE_DATA(0xD4); |
for (i=0;i<16;i++) |
{ |
RF_WRITE_DATA(test[i]); |
ChkSum += test[i]; |
} |
RF_WRITE_DATA(ChkSum); |
RF_WRITE_DATA(0xAA); |
RF_WRITE_DATA(0xAA); |
STOP_TX; |
LED_L; |
delay_ms(500); |
j++; |
test[13]=(j/100)+0x30; |
test[14]=((j%100)/10)+0x30; |
test[15]=((j%100)%10)+0x30; |
} |
return 0; |
} |
/Designs/HOPEwireless/SW_TX_RFM12B/TX_RFM12B.hex |
---|
0,0 → 1,37 |
:100000000C942A000C9447000C9447000C94470071 |
:100010000C9447000C9447000C9447000C94470044 |
:100020000C9447000C9447000C9447000C94470034 |
:100030000C9447000C9447000C9447000C94470024 |
:100040000C9447000C9447000C9447000C94470014 |
:100050000C94470011241FBECFE5D4E0DEBFCDBF16 |
:1000600010E0A0E6B0E0EEE1F2E002C005900D92F3 |
:10007000A237B107D9F710E0A2E7B0E001C01D92A6 |
:10008000A237B107E1F70E9484000C940E010C9492 |
:100090000000AC01892B59F020E030E08AEF90E0BD |
:1000A0000197F1F72F5F3F4F24173507B9F70895F0 |
:1000B000BB9ABC98BD9A8A98BA9AA19AA39A0895B5 |
:1000C000C29AC39AC59880B386B3A99A0895C59871 |
:1000D000C29820E0C598C598992314F4C39A01C02A |
:1000E000C398C59AC59A2F5F203119F0880F991FC0 |
:1000F000F1CFC598C29A08958299FECF90E08050C2 |
:1001000098440E9467000895CF92DF92EF92FF9289 |
:100110000F931F93CF93DF930E9458000E946000BB |
:10012000AB9A84E690E00E94490087EE90E80E9436 |
:10013000670089E392E80E94670080E496EA0E94E3 |
:10014000670083E296EC0E94670080E298E90E94D3 |
:10015000670000E00F2EF0E6CF2EF0E0DF2EF02D4E |
:10016000EE24FF246894E4F8EC0CFD1CAB9A80E0CC |
:1001700090E00E94670089E392E80E94670010E027 |
:100180008AEA0E947C001F5F1330D1F78DE20E9443 |
:100190007C0084ED0E947C00E60110E088810E94D2 |
:1001A0007C008991180FCE15DF05C1F7812F0E94C1 |
:1001B0007C008AEA0E947C008AEA0E947C0081E03E |
:1001C00092E80E946700AB9884EF91E00E9449009A |
:1001D0000F5F802F64E60E940201805D80936D00B6 |
:1001E000802F0E940201292F892F6AE00E940201BC |
:1001F000805D80936E00822F0E940201905D90933B |
:100200006F00B4CF991B79E004C0991F961708F0CE |
:0E021000961B881F7A95C9F780950895FFCF39 |
:10021E000A0D41546D65676131360A0D202D2D2D65 |
:02022E000000CE |
:00000001FF |