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| /Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc |
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| 27,6 → 27,8 |
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| R5 R,0R@R0805 |
| R6 R,4k7@R0805 |
| R7 R,4k7@R0805 |
| R8 R,100@R0805 |
| R9 R,100@R0805 |
| U1 SOT223,LM1117MPX@SOT223 |
| U2 Si570,Si570@Si5XX |
| U3 SO8_150,GTL2002@SO8_150 |
| 48,10 → 50,6 |
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| U2.1 J4.1 J4.2 |
| *SIGNAL* N02024 |
| U2.2 J5.1 J5.2 |
| *SIGNAL* N02723 |
| U2.8 R1.1 U3.4 R5.2 |
| *SIGNAL* N02730 |
| U2.7 R2.1 U3.3 R4.2 |
| *SIGNAL* N02853 |
| U3.6 J6.1 J6.2 R4.1 R6.1 |
| *SIGNAL* N02857 |
| 58,6 → 56,14 |
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| U3.5 J6.3 J6.4 R5.1 R7.1 |
| *SIGNAL* N03045 |
| U3.7 U3.8 R3.1 C6.2 |
| *SIGNAL* N03387 |
| R1.1 U3.3 R4.2 R9.1 |
| *SIGNAL* N03720 |
| R2.1 U3.4 R5.2 R8.1 |
| *SIGNAL* N08058 |
| U2.8 R9.2 |
| *SIGNAL* N08132 |
| U2.7 R8.2 |
| *SIGNAL* VDD |
| J3.3 J3.4 U1.3 U1.4 C2.A U2.6 C5.2 D2.C |
| R1.2 R2.2 U3.2 |
| /Modules/Memory/SDcard01B/SCH/SDCARD.DSN |
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