0,0 → 1,167 |
/* |
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio |
|
Licensed under the Apache License, Version 2.0 (the "License"); |
you may not use this file except in compliance with the License. |
You may obtain a copy of the License at |
|
http://www.apache.org/licenses/LICENSE-2.0 |
|
Unless required by applicable law or agreed to in writing, software |
distributed under the License is distributed on an "AS IS" BASIS, |
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
See the License for the specific language governing permissions and |
limitations under the License. |
*/ |
|
/* |
* STM32L1xx drivers configuration. |
* The following settings override the default settings present in |
* the various device driver implementation headers. |
* Note that the settings for each driver only have effect if the whole |
* driver is enabled in halconf.h. |
* |
* IRQ priorities: |
* 15...0 Lowest...Highest. |
* |
* DMA priorities: |
* 0...3 Lowest...Highest. |
*/ |
|
#define STM32L1xx_MCUCONF |
|
/* |
* HAL driver system settings. |
*/ |
#define STM32_NO_INIT FALSE |
#define STM32_HSI_ENABLED TRUE |
#define STM32_LSI_ENABLED TRUE |
#define STM32_HSE_ENABLED FALSE |
#define STM32_LSE_ENABLED TRUE |
#define STM32_ADC_CLOCK_ENABLED FALSE |
#define STM32_USB_CLOCK_ENABLED FALSE |
#define STM32_MSIRANGE STM32_MSIRANGE_2M |
#define STM32_SW STM32_SW_PLL |
#define STM32_PLLSRC STM32_PLLSRC_HSI |
#define STM32_PLLMUL_VALUE 6 |
#define STM32_PLLDIV_VALUE 3 |
#define STM32_HPRE STM32_HPRE_DIV1 |
#define STM32_PPRE1 STM32_PPRE1_DIV1 |
#define STM32_PPRE2 STM32_PPRE2_DIV1 |
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK |
#define STM32_MCOPRE STM32_MCOPRE_DIV1 |
#define STM32_RTCSEL STM32_RTCSEL_LSE |
#define STM32_RTCPRE STM32_RTCPRE_DIV2 |
#define STM32_VOS STM32_VOS_1P8 |
#define STM32_PVD_ENABLE FALSE |
#define STM32_PLS STM32_PLS_LEV0 |
|
/* |
* ADC driver system settings. |
*/ |
#define STM32_ADC_USE_ADC1 FALSE |
#define STM32_ADC_ADC1_DMA_PRIORITY 2 |
#define STM32_ADC_IRQ_PRIORITY 6 |
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 |
|
/* |
* EXT driver system settings. |
*/ |
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 |
#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 |
|
/* |
* GPT driver system settings. |
*/ |
#define STM32_GPT_USE_TIM2 TRUE |
#define STM32_GPT_USE_TIM3 FALSE |
#define STM32_GPT_USE_TIM4 FALSE |
#define STM32_GPT_TIM2_IRQ_PRIORITY 7 |
#define STM32_GPT_TIM3_IRQ_PRIORITY 7 |
#define STM32_GPT_TIM4_IRQ_PRIORITY 7 |
|
/* |
* I2C driver system settings. |
*/ |
#define STM32_I2C_USE_I2C1 FALSE |
#define STM32_I2C_USE_I2C2 FALSE |
#define STM32_I2C_I2C1_IRQ_PRIORITY 5 |
#define STM32_I2C_I2C2_IRQ_PRIORITY 5 |
#define STM32_I2C_I2C1_DMA_PRIORITY 3 |
#define STM32_I2C_I2C2_DMA_PRIORITY 3 |
#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() |
#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() |
|
/* |
* ICU driver system settings. |
*/ |
#define STM32_ICU_USE_TIM2 FALSE |
#define STM32_ICU_USE_TIM3 FALSE |
#define STM32_ICU_USE_TIM4 FALSE |
#define STM32_ICU_TIM2_IRQ_PRIORITY 7 |
#define STM32_ICU_TIM3_IRQ_PRIORITY 7 |
#define STM32_ICU_TIM4_IRQ_PRIORITY 7 |
|
/* |
* PWM driver system settings. |
*/ |
#define STM32_PWM_USE_TIM2 FALSE |
#define STM32_PWM_USE_TIM3 TRUE |
#define STM32_PWM_USE_TIM4 TRUE |
#define STM32_PWM_TIM2_IRQ_PRIORITY 7 |
#define STM32_PWM_TIM3_IRQ_PRIORITY 7 |
#define STM32_PWM_TIM4_IRQ_PRIORITY 7 |
|
/* |
* SERIAL driver system settings. |
*/ |
#define STM32_SERIAL_USE_USART1 TRUE |
#define STM32_SERIAL_USE_USART2 TRUE |
#define STM32_SERIAL_USE_USART3 FALSE |
#define STM32_SERIAL_USART1_PRIORITY 12 |
#define STM32_SERIAL_USART2_PRIORITY 12 |
#define STM32_SERIAL_USART3_PRIORITY 12 |
|
/* |
* SPI driver system settings. |
*/ |
#define STM32_SPI_USE_SPI1 FALSE |
#define STM32_SPI_USE_SPI2 FALSE |
#define STM32_SPI_SPI1_DMA_PRIORITY 1 |
#define STM32_SPI_SPI2_DMA_PRIORITY 1 |
#define STM32_SPI_SPI1_IRQ_PRIORITY 10 |
#define STM32_SPI_SPI2_IRQ_PRIORITY 10 |
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() |
|
/* |
* UART driver system settings. |
*/ |
#define STM32_UART_USE_USART1 FALSE |
#define STM32_UART_USE_USART2 FALSE |
#define STM32_UART_USE_USART3 FALSE |
#define STM32_UART_USART1_IRQ_PRIORITY 12 |
#define STM32_UART_USART2_IRQ_PRIORITY 12 |
#define STM32_UART_USART3_IRQ_PRIORITY 12 |
#define STM32_UART_USART1_DMA_PRIORITY 0 |
#define STM32_UART_USART2_DMA_PRIORITY 0 |
#define STM32_UART_USART3_DMA_PRIORITY 0 |
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() |
|
/* |
* USB driver system settings. |
*/ |
#define STM32_USB_USE_USB1 FALSE |
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE |
#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 |
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 |