WebSVN – MLAB – /Modules Rev 4668 and /Modules/ Rev 4669 – Path Comparison

 /Modules/OpAmps/OZDUAL03A/CAM_PROFI/OZDUAL03A-B.Cu.gbr
 ,0 → 1,1876
+G04 #@! TF.FileFunction,Copper,L2,Bot,Signal*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 4.0.2+dfsg1-2~bpo8+1-stable) date Sun 07 Aug 2016 09:39:46 PM CEST*
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+X145923000Y-104711500D03*
 D20*
 X137160000Y-100965000D03*
+X154940000Y-89916000D03*
 X148336000Y-94615000D03*
 X147828000Y-87884000D03*
-X147320000Y-100012500D03*
-X149479000Y-104394000D03*
 X154940000Y-100965000D03*
 X142240000Y-91122500D03*
 X142240000Y-98552000D03*
 ,6 → 209,8
 X154813000Y-96647000D03*
 X152368250Y-103155750D03*
 X152400000Y-91186000D03*
+X146050000Y-103505000D03*
+X147320000Y-100076000D03*
 D21*
 X138430000Y-100012500D02*
 X138112500Y-100012500D01*
 ,18 → 262,50
 X147320000Y-80010000D02*
 X147320000Y-82550000D01*
 D21*
+X154924760Y-89900760D02*
+X154924760Y-89804240D01*
+X154940000Y-89916000D02*
+X154924760Y-89900760D01*
+X154940000Y-108966000D02*
+X154940000Y-110490000D01*
+X153670000Y-107696000D02*
+X154940000Y-108966000D01*
+X153670000Y-106362500D02*
+X153670000Y-107696000D01*
+X133350000Y-106680000D02*
+X133350000Y-103505000D01*
+X135255000Y-108585000D02*
+X133350000Y-106680000D01*
+X135890000Y-108585000D02*
+X135255000Y-108585000D01*
+X138112500Y-106362500D02*
+X135890000Y-108585000D01*
+X138430000Y-106362500D02*
+X138112500Y-106362500D01*
+X133350000Y-103505000D02*
+X129286000Y-103505000D01*
+X158750000Y-109220000D02*
+X157480000Y-110490000D01*
+X151130000Y-104457500D02*
+X151447500Y-104457500D01*
+X151447500Y-104457500D02*
+X153352500Y-106362500D01*
+X153352500Y-106362500D02*
+X153670000Y-106362500D01*
+D22*
+X154940000Y-110490000D02*
+X157480000Y-110490000D01*
+X154940000Y-110490000D02*
+X154940000Y-113030000D01*
+D21*
 X158750000Y-106362500D02*
+X158750000Y-109220000D01*
+X158750000Y-109220000D02*
 X158750000Y-109093000D01*
 X158750000Y-109093000D02*
 X158750000Y-108839000D01*
 X158750000Y-108839000D02*
 X158750000Y-109093000D01*
-X153670000Y-106362500D02*
-X153670000Y-107823000D01*
-X153797000Y-107950000D02*
-X156210000Y-107950000D01*
-X153670000Y-107823000D02*
-X153797000Y-107950000D01*
 X157988000Y-80518000D02*
 X157988000Y-83566000D01*
 X164068760Y-85709760D02*
 ,12 → 348,6
 X142240000Y-80010000D01*
 X142146020Y-79916020D02*
 X142240000Y-80010000D01*
-X154924760Y-89804240D02*
-X161178240Y-89804240D01*
-X161290000Y-89916000D02*
-X161290000Y-91440000D01*
-X161178240Y-89804240D02*
-X161290000Y-89916000D01*
 X131079240Y-87884000D02*
 X131079240Y-89900760D01*
 X140731240Y-89900760D02*
 ,12 → 358,6
 X140716000Y-89916000D01*
 X131079240Y-89900760D02*
 X131094480Y-89916000D01*
-X151130000Y-106362500D02*
-X153670000Y-106362500D01*
-X156210000Y-107950000D02*
-X156210000Y-110490000D01*
-X153670000Y-106362500D02*
-X153670000Y-106680000D01*
 X158750000Y-101917500D02*
 X159067500Y-101917500D01*
 X159067500Y-101917500D02*
 ,7 → 369,7
 X135572500Y-101917500D02*
 X133985000Y-103505000D01*
 X133985000Y-103505000D02*
-X129286000Y-103505000D01*
+X133350000Y-103505000D01*
 X143510000Y-101917500D02*
 X143510000Y-102235000D01*
 X143510000Y-102235000D02*
 ,10 → 380,6
 X140970000Y-106362500D01*
 X140970000Y-106362500D02*
 X138430000Y-106362500D01*
-X138430000Y-106362500D02*
-X138430000Y-107823000D01*
-X138430000Y-107823000D02*
-X136398000Y-109855000D01*
 X130810000Y-91440000D02*
 X129286000Y-91440000D01*
 X129286000Y-91440000D02*
 ,24 → 386,8
 X129413000Y-91440000D01*
 X129413000Y-91440000D02*
 X129286000Y-91440000D01*
-X152400000Y-114554000D02*
-X152400000Y-113030000D01*
 X129286000Y-91440000D02*
 X129286000Y-103505000D01*
-X129286000Y-103505000D02*
-X129286000Y-107188000D01*
-X129286000Y-107188000D02*
-X133731000Y-107188000D01*
-X133731000Y-107188000D02*
-X136398000Y-109855000D01*
-X136398000Y-109855000D02*
-X137287000Y-110744000D01*
-X137287000Y-110744000D02*
-X137287000Y-114427000D01*
-X137287000Y-114427000D02*
-X137414000Y-114554000D01*
-X137414000Y-114554000D02*
-X152400000Y-114554000D01*
 X152400000Y-80010000D02*
 X152400000Y-78359000D01*
 X152400000Y-78359000D02*
 ,12 → 410,8
 X157988000Y-78359000D01*
 X157988000Y-78359000D02*
 X157988000Y-80518000D01*
-X157353000Y-110490000D02*
-X156210000Y-110490000D01*
 X160782000Y-107061000D02*
 X158750000Y-109093000D01*
-X158750000Y-109093000D02*
-X157353000Y-110490000D01*
 X164973000Y-107061000D02*
 X160782000Y-107061000D01*
 X165227000Y-107315000D02*
 ,12 → 440,6
 X162560000Y-91440000D01*
 X162560000Y-91440000D02*
 X163830000Y-91440000D01*
-D21*
-X152400000Y-110490000D02*
-X156210000Y-110490000D01*
-D22*
-X152400000Y-113030000D02*
-X152400000Y-110490000D01*
 X130810000Y-91440000D02*
 X132080000Y-91440000D01*
 X132080000Y-91440000D02*
 ,12 → 453,20
 X142240000Y-81280000D02*
 X142240000Y-82550000D01*
 D21*
-X143510000Y-106680000D02*
-X142240000Y-107950000D01*
-X142240000Y-107950000D02*
-X142240000Y-110490000D01*
-X143510000Y-106362500D02*
-X143510000Y-106680000D01*
+X137160000Y-110490000D02*
+X137160000Y-109220000D01*
+X137160000Y-109220000D02*
+X138430000Y-107950000D01*
+X138430000Y-107950000D02*
+X141922500Y-107950000D01*
+X141922500Y-107950000D02*
+X143510000Y-106362500D01*
+X137160000Y-110490000D02*
+X137160000Y-109855000D01*
+D22*
+X137160000Y-110490000D02*
+X137160000Y-113030000D01*
+D21*
 X148590000Y-93027500D02*
 X148590000Y-94361000D01*
 X148590000Y-94361000D02*
 ,10 → 483,6
 X149875240Y-87884000D01*
 X150177500Y-87581740D02*
 X149875240Y-87884000D01*
-D22*
-X142240000Y-113030000D02*
-X142240000Y-110490000D01*
-D21*
 X136128760Y-87884000D02*
 X136128760Y-86215220D01*
 X136128760Y-86215220D02*
 ,70 → 527,6
 X145780760Y-87884000D01*
 X146367500Y-87297260D02*
 X145780760Y-87884000D01*
-X146050000Y-104140000D02*
-X146367500Y-104140000D01*
-X146050000Y-101917500D02*
-X146050000Y-104140000D01*
-X146367500Y-104140000D02*
-X144780000Y-104140000D01*
-X144780000Y-104140000D02*
-X143827500Y-104140000D01*
-X143827500Y-104140000D02*
-X143510000Y-104457500D01*
-X144780000Y-110490000D02*
-X144780000Y-108267500D01*
-X144780000Y-108267500D02*
-X146367500Y-106680000D01*
-X146367500Y-106680000D02*
-X146367500Y-104140000D01*
-D22*
-X144780000Y-110490000D02*
-X144780000Y-113030000D01*
-D21*
-X149479000Y-104457500D02*
-X149479000Y-104394000D01*
-X146050000Y-100012500D02*
-X147320000Y-100012500D01*
-X147320000Y-100012500D02*
-X148590000Y-100012500D01*
-X149860000Y-110490000D02*
-X149860000Y-108267500D01*
-X149860000Y-108267500D02*
-X148272500Y-106680000D01*
-X151130000Y-104457500D02*
-X149479000Y-104457500D01*
-X149479000Y-104457500D02*
-X148272500Y-104457500D01*
-X148272500Y-106680000D02*
-X148272500Y-104394000D01*
-X148336000Y-104394000D02*
-X148590000Y-104394000D01*
-X148590000Y-104394000D02*
-X148272500Y-104394000D01*
-X148272500Y-104457500D02*
-X148336000Y-104394000D01*
-X148272500Y-104394000D02*
-X148272500Y-104140000D01*
-D22*
-X149860000Y-110490000D02*
-X149860000Y-113030000D01*
-D21*
-X147320000Y-104140000D02*
-X147320000Y-102870000D01*
-X147320000Y-102870000D02*
-X148272500Y-101917500D01*
-X148272500Y-101917500D02*
-X148590000Y-101917500D01*
-X148272500Y-102235000D02*
-X148590000Y-101917500D01*
-X147320000Y-110490000D02*
-X147320000Y-106680000D01*
-X147320000Y-106680000D02*
-X147320000Y-104140000D01*
-D22*
-X147320000Y-113030000D02*
-X147320000Y-110490000D01*
-D21*
 X153670000Y-100012500D02*
 X153987500Y-100012500D01*
 X153987500Y-100012500D02*
 ,6 → 554,9
 D22*
 X161290000Y-96520000D02*
 X163830000Y-96520000D01*
+D21*
+X157480000Y-113030000D02*
+X157480000Y-115570000D01*
 D23*
 X162560000Y-81280000D02*
 X158750000Y-77470000D01*
 ,10 → 576,6
 X162560000Y-81280000D01*
 X166370000Y-107950000D02*
 X166370000Y-85090000D01*
-D22*
-X156210000Y-113030000D02*
-X156210000Y-115570000D01*
-D23*
 X132080000Y-111760000D02*
 X135890000Y-115570000D01*
 X135890000Y-115570000D02*
 ,6 → 583,8
 X158750000Y-115570000D02*
 X162560000Y-111760000D01*
 X156210000Y-115570000D02*
+X157480000Y-115570000D01*
+X157480000Y-115570000D02*
 X158750000Y-115570000D01*
 D21*
 X140970000Y-98679000D02*
 ,8 → 771,252
 X135890000Y-104457500D01*
 X153670000Y-101917500D02*
 X156210000Y-104457500D01*
+D24*
+X146050000Y-104584500D02*
+X146050000Y-104267000D01*
+D21*
+X146050000Y-104267000D02*
+X146050000Y-103505000D01*
+X146050000Y-103505000D02*
+X146050000Y-101917500D01*
+D24*
+X146050000Y-104584500D02*
+X145923000Y-104711500D01*
+D21*
+X139700000Y-110490000D02*
+X139700000Y-113030000D01*
+D24*
+X148463000Y-105664000D02*
+X149098000Y-105664000D01*
+D21*
+X149860000Y-106426000D02*
+X149860000Y-110490000D01*
+D24*
+X149098000Y-105664000D02*
+X149860000Y-106426000D01*
+D21*
+X147320000Y-100076000D02*
+X147320000Y-100012500D01*
+D22*
+X149860000Y-110490000D02*
+X149860000Y-113030000D01*
+D21*
+X146050000Y-100012500D02*
+X147320000Y-100012500D01*
+X147320000Y-100012500D02*
+X148590000Y-100012500D01*
+D24*
+X145923000Y-106616500D02*
+X145923000Y-107061000D01*
+D21*
+X145923000Y-108331000D02*
+X144780000Y-109474000D01*
+X145923000Y-108331000D02*
+X145923000Y-107442000D01*
+X145923000Y-107061000D02*
+X145923000Y-107442000D01*
+X144780000Y-110490000D02*
+X144780000Y-109474000D01*
+X148590000Y-101917500D02*
+X148590000Y-102743000D01*
+X147193000Y-107061000D02*
+X144780000Y-109474000D01*
+X147193000Y-104140000D02*
+X147193000Y-107061000D01*
+X148590000Y-102743000D02*
+X147193000Y-104140000D01*
+X148590000Y-101917500D02*
+X148590000Y-102235000D01*
+D22*
+X144780000Y-110490000D02*
+X144780000Y-113030000D01*
+D21*
+X148272500Y-101917500D02*
+X148590000Y-101917500D01*
+D24*
+X148463000Y-104711500D02*
+X149453372Y-104711500D01*
+X149453372Y-104711500D02*
+X149516872Y-104775000D01*
+D21*
+X151130000Y-106362500D02*
+X151104372Y-106362500D01*
+X151104372Y-106362500D02*
+X149516872Y-104775000D01*
+X149516872Y-104775000D02*
+X149479000Y-104775000D01*
+X151130000Y-106362500D02*
+X150939500Y-106362500D01*
+X152400000Y-110490000D02*
+X152400000Y-109220000D01*
+X151130000Y-107950000D02*
+X151130000Y-106362500D01*
+X152400000Y-109220000D02*
+X151130000Y-107950000D01*
+D22*
+X152400000Y-110490000D02*
+X152400000Y-113030000D01*
+D24*
+X148590000Y-106743500D02*
+X148590000Y-107188000D01*
+D21*
+X148590000Y-107188000D02*
+X148590000Y-107696000D01*
+D24*
+X148590000Y-106743500D02*
+X148463000Y-106616500D01*
+X148590000Y-107632500D02*
+X148590000Y-107696000D01*
+X148590000Y-107696000D02*
+X148590000Y-107950000D01*
+D21*
+X147320000Y-109220000D02*
+X148590000Y-107950000D01*
+X147320000Y-109220000D02*
+X147320000Y-110490000D01*
+D22*
+X147320000Y-110490000D02*
+X147320000Y-113030000D01*
+D24*
+X144780000Y-105664000D02*
+X145923000Y-105664000D01*
+D21*
+X142240000Y-110490000D02*
+X142240000Y-109855000D01*
+X142240000Y-109855000D02*
+X144780000Y-107315000D01*
+X144462500Y-104457500D02*
+X143510000Y-104457500D01*
+X144780000Y-104775000D02*
+X144462500Y-104457500D01*
+X144780000Y-107315000D02*
+X144780000Y-106680000D01*
+X144780000Y-106680000D02*
+X144780000Y-105664000D01*
+X144780000Y-105664000D02*
+X144780000Y-104775000D01*
+D22*
+X142240000Y-110490000D02*
+X142240000Y-113030000D01*
 D23*
 G36*
+X166803000Y-116003000D02*
+X127837000Y-116003000D01*
+X127837000Y-85090000D01*
+X128143000Y-85090000D01*
+X128143000Y-107950000D01*
+X128153006Y-107999410D01*
+X128180197Y-108039803D01*
+X135800197Y-115659803D01*
+X135842211Y-115687666D01*
+X135890000Y-115697000D01*
+X157035500Y-115697000D01*
+X157084910Y-115686994D01*
+X157126535Y-115658553D01*
+X157153815Y-115616159D01*
+X157162500Y-115570000D01*
+X157162500Y-114427000D01*
+X157194250Y-114427000D01*
+X157353000Y-114268250D01*
+X157353000Y-113157000D01*
+X157333000Y-113157000D01*
+X157333000Y-112903000D01*
+X157353000Y-112903000D01*
+X157353000Y-112883000D01*
+X157607000Y-112883000D01*
+X157607000Y-112903000D01*
+X157627000Y-112903000D01*
+X157627000Y-113157000D01*
+X157607000Y-113157000D01*
+X157607000Y-114268250D01*
+X157734000Y-114395250D01*
+X157734000Y-115570000D01*
+X157744006Y-115619410D01*
+X157772447Y-115661035D01*
+X157814841Y-115688315D01*
+X157861000Y-115697000D01*
+X158750000Y-115697000D01*
+X158799410Y-115686994D01*
+X158839803Y-115659803D01*
+X166459803Y-108039803D01*
+X166487666Y-107997789D01*
+X166497000Y-107950000D01*
+X166497000Y-85090000D01*
+X166486994Y-85040590D01*
+X166459803Y-85000197D01*
+X158839803Y-77380197D01*
+X158797789Y-77352334D01*
+X158750000Y-77343000D01*
+X135890000Y-77343000D01*
+X135840590Y-77353006D01*
+X135800197Y-77380197D01*
+X128180197Y-85000197D01*
+X128152334Y-85042211D01*
+X128143000Y-85090000D01*
+X127837000Y-85090000D01*
+X127837000Y-77037000D01*
+X166803000Y-77037000D01*
+X166803000Y-116003000D01*
+X166803000Y-116003000D01*
+G37*
+X166803000Y-116003000D02*
+X127837000Y-116003000D01*
+X127837000Y-85090000D01*
+X128143000Y-85090000D01*
+X128143000Y-107950000D01*
+X128153006Y-107999410D01*
+X128180197Y-108039803D01*
+X135800197Y-115659803D01*
+X135842211Y-115687666D01*
+X135890000Y-115697000D01*
+X157035500Y-115697000D01*
+X157084910Y-115686994D01*
+X157126535Y-115658553D01*
+X157153815Y-115616159D01*
+X157162500Y-115570000D01*
+X157162500Y-114427000D01*
+X157194250Y-114427000D01*
+X157353000Y-114268250D01*
+X157353000Y-113157000D01*
+X157333000Y-113157000D01*
+X157333000Y-112903000D01*
+X157353000Y-112903000D01*
+X157353000Y-112883000D01*
+X157607000Y-112883000D01*
+X157607000Y-112903000D01*
+X157627000Y-112903000D01*
+X157627000Y-113157000D01*
+X157607000Y-113157000D01*
+X157607000Y-114268250D01*
+X157734000Y-114395250D01*
+X157734000Y-115570000D01*
+X157744006Y-115619410D01*
+X157772447Y-115661035D01*
+X157814841Y-115688315D01*
+X157861000Y-115697000D01*
+X158750000Y-115697000D01*
+X158799410Y-115686994D01*
+X158839803Y-115659803D01*
+X166459803Y-108039803D01*
+X166487666Y-107997789D01*
+X166497000Y-107950000D01*
+X166497000Y-85090000D01*
+X166486994Y-85040590D01*
+X166459803Y-85000197D01*
+X158839803Y-77380197D01*
+X158797789Y-77352334D01*
+X158750000Y-77343000D01*
+X135890000Y-77343000D01*
+X135840590Y-77353006D01*
+X135800197Y-77380197D01*
+X128180197Y-85000197D01*
+X128152334Y-85042211D01*
+X128143000Y-85090000D01*
+X127837000Y-85090000D01*
+X127837000Y-77037000D01*
+X166803000Y-77037000D01*
+X166803000Y-116003000D01*
+G36*
 X159075222Y-78927328D02*
 X159063340Y-78939190D01*
 X158433718Y-80455487D01*
 ,186 → 1047,57
 X161742690Y-107632285D01*
 X160225296Y-108259259D01*
 X159063340Y-109419190D01*
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 ,186 → 2080,57
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+X135743000Y-102044500D01*
+X135743000Y-101790500D01*
+X135763000Y-101790500D01*
+X135763000Y-101770500D01*
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+X136017000Y-101790500D01*
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+X136017000Y-102044500D01*
+X136017000Y-102838250D01*
+X136089606Y-102910856D01*
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+X134588338Y-105137317D01*
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+X134588338Y-107042317D01*
+X134727410Y-107258441D01*
+X134939610Y-107403431D01*
+X135191500Y-107454440D01*
+X136588500Y-107454440D01*
+X136823817Y-107410162D01*
+X137039941Y-107271090D01*
+X137162261Y-107092069D01*
+X137193173Y-107166698D01*
+X137371801Y-107345327D01*
+X137595129Y-107437833D01*
+X136486481Y-108546481D01*
+X136280005Y-108855494D01*
+X136228908Y-109112377D01*
+X136162683Y-109124838D01*
+X135946559Y-109263910D01*
+X135801569Y-109476110D01*
+X135750560Y-109728000D01*
+X135750560Y-109836290D01*
+X135580741Y-109425296D01*
+X134420810Y-108263340D01*
+X132904513Y-107633718D01*
+X131262690Y-107632285D01*
+X129745296Y-108259259D01*
+X129728316Y-108276210D01*
+X129032000Y-107579894D01*
 X129032000Y-90551690D01*
 X129413000Y-90551690D01*
 X129413000Y-91154250D01*
 ,6 → 3082,140
 X158379894Y-78232000D01*
 X159075222Y-78927328D01*
 G36*
+X139795250Y-106235500D02*
+X140843000Y-106235500D01*
+X140843000Y-106215500D01*
+X141097000Y-106215500D01*
+X141097000Y-106235500D01*
+X141117000Y-106235500D01*
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+X141097000Y-106489500D01*
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+X140843000Y-106489500D01*
+X139795250Y-106489500D01*
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+X138557000Y-106489500D01*
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+X138303000Y-106509500D01*
+X138303000Y-106489500D01*
+X138283000Y-106489500D01*
+X138283000Y-106235500D01*
+X138303000Y-106235500D01*
+X138303000Y-106215500D01*
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+X139700000Y-106140250D01*
+X139795250Y-106235500D01*
+X139795250Y-106235500D01*
+G37*
+X139795250Y-106235500D02*
+X140843000Y-106235500D01*
+X140843000Y-106215500D01*
+X141097000Y-106215500D01*
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+X138283000Y-106489500D01*
+X138283000Y-106235500D01*
+X138303000Y-106235500D01*
+X138303000Y-106215500D01*
+X138557000Y-106215500D01*
+X138557000Y-106235500D01*
+X139604750Y-106235500D01*
+X139700000Y-106140250D01*
+X139795250Y-106235500D01*
+G36*
+X149967410Y-102813441D02*
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+X151003000Y-103536750D01*
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+X149799779Y-103878774D01*
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+X149967410Y-102813441D01*
+G37*
+X149967410Y-102813441D02*
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+X149453372Y-103822500D01*
+X149005058Y-103822500D01*
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+X149739941Y-102826090D01*
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+G36*
 X143637000Y-101790500D02*
 X143657000Y-101790500D01*
 X143657000Y-102044500D01*
 ,10 → 3228,13
 X144778763Y-102644598D01*
 X144887410Y-102813441D01*
 X145097500Y-102956989D01*
-X145097500Y-103187500D01*
-X143827500Y-103187500D01*
-X143462994Y-103260005D01*
-X143305020Y-103365560D01*
+X145097500Y-102983934D01*
+X144970687Y-103289332D01*
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+X144642097Y-103540724D01*
+X144460390Y-103416569D01*
+X144208500Y-103365560D01*
 X142811500Y-103365560D01*
 X142576183Y-103409838D01*
 X142360059Y-103548910D01*
 ,10 → 3270,13
 X144778763Y-102644598D01*
 X144887410Y-102813441D01*
 X145097500Y-102956989D01*
-X145097500Y-103187500D01*
-X143827500Y-103187500D01*
-X143462994Y-103260005D01*
-X143305020Y-103365560D01*
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+X144970687Y-103289332D01*
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+X144642097Y-103540724D01*
+X144460390Y-103416569D01*
+X144208500Y-103365560D01*
 X142811500Y-103365560D01*
 X142576183Y-103409838D01*
 X142360059Y-103548910D01*
 ,127 → 3298,4
 X143383000Y-101770500D01*
 X143637000Y-101770500D01*
 X143637000Y-101790500D01*
-G36*
-X166803000Y-116003000D02*
-X127837000Y-116003000D01*
-X127837000Y-85090000D01*
-X128143000Y-85090000D01*
-X128143000Y-107950000D01*
-X128153006Y-107999410D01*
-X128180197Y-108039803D01*
-X135800197Y-115659803D01*
-X135842211Y-115687666D01*
-X135890000Y-115697000D01*
-X155257500Y-115697000D01*
-X155306910Y-115686994D01*
-X155348535Y-115658553D01*
-X155375815Y-115616159D01*
-X155384500Y-115570000D01*
-X155384500Y-114427000D01*
-X155924250Y-114427000D01*
-X156083000Y-114268250D01*
-X156083000Y-113157000D01*
-X156063000Y-113157000D01*
-X156063000Y-112903000D01*
-X156083000Y-112903000D01*
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-X158799410Y-115686994D01*
-X158839803Y-115659803D01*
-X166459803Y-108039803D01*
-X166487666Y-107997789D01*
-X166497000Y-107950000D01*
-X166497000Y-85090000D01*
-X166486994Y-85040590D01*
-X166459803Y-85000197D01*
-X158839803Y-77380197D01*
-X158797789Y-77352334D01*
-X158750000Y-77343000D01*
-X135890000Y-77343000D01*
-X135840590Y-77353006D01*
-X135800197Y-77380197D01*
-X128180197Y-85000197D01*
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-X127837000Y-77037000D01*
-X166803000Y-77037000D01*
-X166803000Y-116003000D01*
-X166803000Y-116003000D01*
-G37*
-X166803000Y-116003000D02*
-X127837000Y-116003000D01*
-X127837000Y-85090000D01*
-X128143000Y-85090000D01*
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-X128153006Y-107999410D01*
-X128180197Y-108039803D01*
-X135800197Y-115659803D01*
-X135842211Y-115687666D01*
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-X155348535Y-115658553D01*
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-X155384500Y-115570000D01*
-X155384500Y-114427000D01*
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-X156083000Y-114268250D01*
-X156083000Y-113157000D01*
-X156063000Y-113157000D01*
-X156063000Y-112903000D01*
-X156083000Y-112903000D01*
-X156083000Y-112883000D01*
-X156337000Y-112883000D01*
-X156337000Y-112903000D01*
-X156357000Y-112903000D01*
-X156357000Y-113157000D01*
-X156337000Y-113157000D01*
-X156337000Y-114268250D01*
-X156495750Y-114427000D01*
-X157098310Y-114427000D01*
-X157331699Y-114330327D01*
-X157353000Y-114309026D01*
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-X157391447Y-115661035D01*
-X157433841Y-115688315D01*
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-X158750000Y-115697000D01*
-X158799410Y-115686994D01*
-X158839803Y-115659803D01*
-X166459803Y-108039803D01*
-X166487666Y-107997789D01*
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-X166497000Y-85090000D01*
-X166486994Y-85040590D01*
-X166459803Y-85000197D01*
-X158839803Y-77380197D01*
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-X158750000Y-77343000D01*
-X135890000Y-77343000D01*
-X135840590Y-77353006D01*
-X135800197Y-77380197D01*
-X128180197Y-85000197D01*
-X128152334Y-85042211D01*
-X128143000Y-85090000D01*
-X127837000Y-85090000D01*
-X127837000Y-77037000D01*
-X166803000Y-77037000D01*
-X166803000Y-116003000D01*
 M02*

 /Modules/OpAmps/OZDUAL03A/CAM_PROFI/OZDUAL03A-F.Mask.gbr
 ,7 → 1,7
 G04 #@! TF.FileFunction,Soldermask,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.2+dfsg1-2~bpo8+1-stable) date Wed 27 Jul 2016 07:30:53 PM CEST*
+G04 Created by KiCad (PCBNEW 4.0.2+dfsg1-2~bpo8+1-stable) date Sun 07 Aug 2016 09:39:46 PM CEST*
 %MOMM*%
 G01*
 G04 APERTURE LIST*
 ,9 → 12,9
 %ADD14C,6.400000*%
 %ADD15R,1.289000X1.797000*%
 %ADD16R,2.200860X2.899360*%
-%ADD17R,0.900000X1.400760*%
-%ADD18R,0.901040X1.400760*%
-%ADD19R,2.950160X2.899360*%
+%ADD17R,2.950160X2.899360*%
+%ADD18R,1.400760X0.900000*%
+%ADD19R,1.400760X0.901040*%
 G04 APERTURE END LIST*
 D10*
 D11*
 ,8 → 68,8
 X153670000Y-97472500D03*
 X153670000Y-95567500D03*
 D11*
-X156210000Y-110490000D03*
-X156210000Y-113030000D03*
+X157480000Y-110490000D03*
+X157480000Y-113030000D03*
 X152400000Y-80010000D03*
 X152400000Y-82550000D03*
 X149860000Y-80010000D03*
 ,16 → 90,6
 X130810000Y-93980000D03*
 X133350000Y-91440000D03*
 X130810000Y-91440000D03*
-X142240000Y-113030000D03*
-X142240000Y-110490000D03*
-X144780000Y-113030000D03*
-X144780000Y-110490000D03*
-X147320000Y-113030000D03*
-X147320000Y-110490000D03*
-X149860000Y-113030000D03*
-X149860000Y-110490000D03*
-X152400000Y-113030000D03*
-X152400000Y-110490000D03*
 D14*
 X132080000Y-111760000D03*
 X132080000Y-81280000D03*
 ,10 → 118,6
 X146367500Y-85344000D03*
 X144462500Y-85344000D03*
 D12*
-X143510000Y-106362500D03*
-X143510000Y-104457500D03*
-X151130000Y-104457500D03*
-X151130000Y-106362500D03*
 X156210000Y-106362500D03*
 X156210000Y-104457500D03*
 X153670000Y-93027500D03*
 ,15 → 145,6
 X158750000Y-100012500D03*
 X158750000Y-101917500D03*
 D17*
-X146367500Y-104140000D03*
-X147320000Y-104140000D03*
-D18*
-X148272500Y-104140000D03*
-D17*
-X148272500Y-106680000D03*
-X147320000Y-106680000D03*
-X146367500Y-106680000D03*
-D19*
 X164068760Y-87884000D03*
 X159019240Y-87884000D03*
 X136128760Y-87884000D03*
 ,4 → 153,41
 X149875240Y-87884000D03*
 X145780760Y-87884000D03*
 X140731240Y-87884000D03*
+D11*
+X154940000Y-110490000D03*
+X154940000Y-113030000D03*
+X152400000Y-110490000D03*
+X152400000Y-113030000D03*
+X149860000Y-110490000D03*
+X149860000Y-113030000D03*
+X147320000Y-110490000D03*
+X147320000Y-113030000D03*
+X144780000Y-110490000D03*
+X144780000Y-113030000D03*
+X142240000Y-110490000D03*
+X142240000Y-113030000D03*
+X139700000Y-110490000D03*
+X139700000Y-113030000D03*
+X137160000Y-110490000D03*
+X137160000Y-113030000D03*
+D12*
+X143510000Y-106362500D03*
+X143510000Y-104457500D03*
+X151130000Y-106362500D03*
+X151130000Y-104457500D03*
+D18*
+X148463000Y-104711500D03*
+X148463000Y-105664000D03*
+D19*
+X148463000Y-106616500D03*
+D18*
+X145923000Y-106616500D03*
+X145923000Y-105664000D03*
+X145923000Y-104711500D03*
+X145923000Y-105664000D03*
+X148463000Y-104711500D03*
+X148463000Y-106616500D03*
+X148463000Y-105664000D03*
+X145923000Y-106616500D03*
+X145923000Y-104711500D03*
 M02*

 /Modules/OpAmps/OZDUAL03A/CAM_PROFI/OZDUAL03A-F.SilkS.gbr
 ,7 → 1,7
 G04 #@! TF.FileFunction,Legend,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.2+dfsg1-2~bpo8+1-stable) date Wed 27 Jul 2016 07:30:53 PM CEST*
+G04 Created by KiCad (PCBNEW 4.0.2+dfsg1-2~bpo8+1-stable) date Sun 07 Aug 2016 09:39:46 PM CEST*
 %MOMM*%
 G01*
 G04 APERTURE LIST*
 ,8 → 13,7
 %ADD15C,0.109220*%
 %ADD16C,0.250000*%
 %ADD17C,0.099060*%
-%ADD18C,0.190500*%
-%ADD19C,0.175000*%
+%ADD18C,0.175000*%
 G04 APERTURE END LIST*
 D10*
 D11*
 ,14 → 473,14
 X154432000Y-94996000D01*
 X154432000Y-94996000D02*
 X154432000Y-96012000D01*
-X157480000Y-109220000D02*
-X157480000Y-114300000D01*
-X157480000Y-114300000D02*
-X154940000Y-114300000D01*
-X154940000Y-114300000D02*
-X154940000Y-109220000D01*
-X154940000Y-109220000D02*
-X157480000Y-109220000D01*
+X158750000Y-109220000D02*
+X158750000Y-114300000D01*
+X158750000Y-114300000D02*
+X156210000Y-114300000D01*
+X156210000Y-114300000D02*
+X156210000Y-109220000D01*
+X156210000Y-109220000D02*
+X158750000Y-109220000D01*
 X153670000Y-78740000D02*
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 ,14 → 497,6
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 G75*
 G03X141859000Y-102616000I-127000J0D01*
 ,38 → 657,6
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 X157099000Y-107061000D02*
 G75*
 G03X157099000Y-107061000I-127000J0D01*
 ,16 → 849,6
 X157988000Y-102489000D01*
 X157988000Y-102489000D02*
 X157988000Y-101473000D01*
-X146812000Y-106172000D02*
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 X157243780Y-86184740D02*
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 ,6 → 873,76
 X140256260Y-89583260D01*
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 D15*
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/Modules/OpAmps/OZDUAL03A/CAM_PROFI/OZDUAL03A.drl
1,5 → 1,5
M48
;DRILL file {KiCad 4.0.2+dfsg1-2~bpo8+1-stable} date Wed 27 Jul 2016 07:30:56 PM CEST
;DRILL file {KiCad 4.0.2+dfsg1-2~bpo8+1-stable} date Sun 07 Aug 2016 09:37:19 PM CEST
;FORMAT={-:-/ absolute / inch / decimal}
FMAT,2
INCH,TZ
16,13 → 16,14
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T2
36,6 → 37,10
X5.25Y-3.8
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X5.5Y-4.35
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56,8 → 61,10
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 /Modules/OpAmps/OZDUAL03A/SCH_PCB/OZDUAL03A-cache.lib
 ,6 → 1,30
 EESchema-LIBRARY Version 2.3
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 ,336 → 168,336
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 L VCC #PWR02
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 L C-RESCUE-OZDUAL03A c1
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 L C-RESCUE-OZDUAL03A a2
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 L R a7
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 L R a8
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 L C-RESCUE-OZDUAL03A a9
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 L R b8
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 L R d7
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 L R d8
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 1    -1   0
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 L C-RESCUE-OZDUAL03A a6
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 -1   1    0
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 L C-RESCUE-OZDUAL03A c7
 U 1 1 574D6C6A
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-2550 4900
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 VREFB
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 INB-
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 INB+
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 OUTB
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 L C-RESCUE-OZDUAL03A b9
 U 1 1 574D6CA2
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-F 1 "C" H 2575 6600 50  0000 L CNN
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-2550 6700
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 -1   1    0
 $EndComp
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 L C-RESCUE-OZDUAL03A b7
 U 1 1 574D6CAA
-P 3850 7000
-F 0 "b7" H 3875 7100 50  0000 L CNN
-F 1 "C" H 3875 6900 50  0000 L CNN
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-3850 7000
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 -1   1    0
 $EndComp
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 L LM358 U1
 U 2 1 574D80F6
-P 3950 5800
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-F 1 "OZ" H 3950 5600 50  0000 L CNN
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-3950 5800
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 0    0    -1
 $EndComp
 $Comp
 L R c8
 U 1 1 574EC6DF
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-F 0 "c8" V 3030 5900 50  0000 C CNN
-F 1 "R" V 2950 5900 50  0000 C CNN
-F 2 "Mlab_R:SMD-0805" V 2880 5900 50  0001 C CNN
-F 3 "" H 2950 5900 50  0000 C CNN
-2950 5900
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 1    -1   0
 $EndComp
 $Comp
 L R c6
 U 1 1 574EC7FF
-P 2950 5700
-F 0 "c6" V 3030 5700 50  0000 C CNN
-F 1 "R" V 2950 5700 50  0000 C CNN
-F 2 "Mlab_R:SMD-0805" V 2880 5700 50  0001 C CNN
-F 3 "" H 2950 5700 50  0000 C CNN
-2950 5700
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 1    -1   0
 $EndComp
 $Comp
 L R c2
 U 1 1 574ED470
-P 2950 2250
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-F 1 "R" V 2950 2250 50  0000 C CNN
-F 2 "Mlab_R:SMD-0805" V 2880 2250 50  0001 C CNN
-F 3 "" H 2950 2250 50  0000 C CNN
-2950 2250
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 1    1    0
 $EndComp
 $Comp
 L R b2
 U 1 1 574ED590
-P 2950 2450
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-F 1 "R" V 2950 2450 50  0000 C CNN
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-2950 2450
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+2200 2450
 1    1    0
 $EndComp
 $Comp
 ,7 → 517,7
 P 6700 1250
 F 0 "C1" H 6700 1350 50  0000 L CNN
 F 1 "47u" H 6700 1150 50  0000 L CNN
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 F 3 "" H 6700 1250 60  0000 C CNN
 6700 1250
 0    0    -1
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 P 7400 1250
 F 0 "C3" H 7400 1350 50  0000 L CNN
 F 1 "47u" H 7400 1150 50  0000 L CNN
-F 2 "Mlab_C:TantalC_SizeC_Reflow" H 7400 1250 60  0001 C CNN
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 F 3 "" H 7400 1250 60  0000 C CNN
 7400 1250
 0    0    -1
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 P 6700 1950
 F 0 "C2" H 6700 2050 50  0000 L CNN
 F 1 "47u" H 6700 1850 50  0000 L CNN
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+F 2 "sot23-6:TantalC_SizeC_Reflow" H 6700 1950 60  0001 C CNN
 F 3 "" H 6700 1950 60  0000 C CNN
 6700 1950
 0    0    -1
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 P 7400 1950
 F 0 "C4" H 7400 2050 50  0000 L CNN
 F 1 "47u" H 7400 1850 50  0000 L CNN
-F 2 "Mlab_C:TantalC_SizeC_Reflow" H 7400 1950 60  0001 C CNN
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 F 3 "" H 7400 1950 60  0000 C CNN
 7400 1950
 0    0    -1
 ,45 → 628,45
 $Comp
 L GNDA #PWR04
 U 1 1 575E4754
-P 3250 2000
-F 0 "#PWR04" H 3250 1750 50  0001 C CNN
-F 1 "GNDA" H 3250 1850 50  0000 C CNN
-F 2 "" H 3250 2000 50  0000 C CNN
-F 3 "" H 3250 2000 50  0000 C CNN
-3250 2000
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 0    0    -1
 $EndComp
 $Comp
 L GNDA #PWR05
 U 1 1 575E47FB
-P 3250 2950
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-F 1 "GNDA" H 3250 2800 50  0000 C CNN
-F 2 "" H 3250 2950 50  0000 C CNN
-F 3 "" H 3250 2950 50  0000 C CNN
-3250 2950
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 0    0    -1
 $EndComp
 $Comp
 L GNDA #PWR06
 U 1 1 575E51DB
-P 3250 5450
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-F 1 "GNDA" H 3250 5300 50  0000 C CNN
-F 2 "" H 3250 5450 50  0000 C CNN
-F 3 "" H 3250 5450 50  0000 C CNN
-3250 5450
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 0    0    -1
 $EndComp
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 L GNDA #PWR07
 U 1 1 575E5282
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-F 2 "" H 3250 6450 50  0000 C CNN
-F 3 "" H 3250 6450 50  0000 C CNN
-3250 6450
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 0    0    -1
 $EndComp
 $Comp
 ,12 → 733,12
 $Comp
 L VSS #PWR011
 U 1 1 575EF3F4
-P 3850 2750
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-F 2 "" H 3850 2750 50  0000 C CNN
-F 3 "" H 3850 2750 50  0000 C CNN
-3850 2750
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 $EndComp
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 ,95 → 780,45
 Text Label 10400 4800 0    60   ~ 0
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 $Comp
-L HEADER_2x05_PARALLEL J5
-U 1 1 575FB302
-P 9900 5950
-F 0 "J5" H 9900 5650 60  0000 C CNN
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-F 3 "" H 9900 6150 60  0000 C CNN
-9900 5950
--1   1    0
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-U 1 1 575FD184
-P 9650 5600
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-F 1 "VCC" H 9650 5750 60  0000 C CNN
-F 2 "" H 9650 5600 60  0000 C CNN
-F 3 "" H 9650 5600 60  0000 C CNN
-9650 5600
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-T1
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 L ISL21070CIH320Z-TK U2
 U 1 1 57610E4B
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-F 0 "U2" H 6875 4600 50  0000 C CNN
-F 1 "MAX6066" H 7125 4550 50  0000 C CNN
-F 2 "sot23-6:SOT-23-6" H 6850 4200 50  0000 C CIN
-F 3 "" H 6800 4350 50  0000 C CNN
-6800 4350
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 0    0    -1
 $EndComp
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-U 1 1 57620182
-P 6700 3450
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-F 2 "" H 6700 3450 60  0000 C CNN
-F 3 "" H 6700 3450 60  0000 C CNN
-6700 3450
-0    0    -1
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-U 1 1 576206CA
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-F 0 "#PWR014" H 6700 5150 50  0001 C CNN
-F 1 "GNDA" H 6700 5250 50  0000 C CNN
-F 2 "" H 6700 5400 50  0000 C CNN
-F 3 "" H 6700 5400 50  0000 C CNN
-6700 5400
-0    0    -1
-$EndComp
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 L C-RESCUE-OZDUAL03A c4
 U 1 1 57618EB4
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-F 0 "c4" H 6375 4450 50  0000 L CNN
-F 1 "C" H 6375 4250 50  0000 L CNN
-F 2 "Mlab_R:SMD-0805" H 6388 4200 50  0001 C CNN
-F 3 "" H 6350 4350 50  0000 C CNN
-6350 4350
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+6800 4000
 0    0    -1
 $EndComp
 $Comp
 L C-RESCUE-OZDUAL03A c5
 U 1 1 5761FADF
-P 7350 4600
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-F 1 "C" H 7375 4500 50  0000 L CNN
-F 2 "Mlab_R:SMD-0805" H 7388 4450 50  0001 C CNN
-F 3 "" H 7350 4600 50  0000 C CNN
-7350 4600
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+7800 4250
 0    0    -1
 $EndComp
 $Comp
-L PWR_FLAG #FLG015
+L PWR_FLAG #FLG012
 U 1 1 576DCD1D
 P 9450 1900
-F 0 "#FLG015" H 9450 1995 50  0001 C CNN
+F 0 "#FLG012" H 9450 1995 50  0001 C CNN
 F 1 "PWR_FLAG" H 9450 2080 50  0000 C CNN
 F 2 "" H 9450 1900 50  0000 C CNN
 F 3 "" H 9450 1900 50  0000 C CNN
 ,10 → 826,10
 0    0    -1
 $EndComp
 $Comp
-L PWR_FLAG #FLG016
+L PWR_FLAG #FLG013
 U 1 1 576DE0E5
 P 9100 1900
-F 0 "#FLG016" H 9100 1995 50  0001 C CNN
+F 0 "#FLG013" H 9100 1995 50  0001 C CNN
 F 1 "PWR_FLAG" H 9100 2080 50  0000 C CNN
 F 2 "" H 9100 1900 50  0000 C CNN
 F 3 "" H 9100 1900 50  0000 C CNN
 ,10 → 837,10
 0    0    -1
 $EndComp
 $Comp
-L PWR_FLAG #FLG017
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 U 1 1 576DE19E
 P 10200 1900
-F 0 "#FLG017" H 10200 1995 50  0001 C CNN
+F 0 "#FLG014" H 10200 1995 50  0001 C CNN
 F 1 "PWR_FLAG" H 10200 2080 50  0000 C CNN
 F 2 "" H 10200 1900 50  0000 C CNN
 F 3 "" H 10200 1900 50  0000 C CNN
 ,10 → 848,10
 0    0    -1
 $EndComp
 $Comp
-L PWR_FLAG #FLG018
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 U 1 1 576DE257
 P 9900 1900
-F 0 "#FLG018" H 9900 1995 50  0001 C CNN
+F 0 "#FLG015" H 9900 1995 50  0001 C CNN
 F 1 "PWR_FLAG" H 9900 2080 50  0000 C CNN
 F 2 "" H 9900 1900 50  0000 C CNN
 F 3 "" H 9900 1900 50  0000 C CNN
 ,10 → 859,10
 0    0    -1
 $EndComp
 $Comp
-L VCC #PWR019
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 U 1 1 576DE3C9
 P 9450 2050
-F 0 "#PWR019" H 9450 1900 60  0001 C CNN
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 F 1 "VCC" H 9450 2200 60  0000 C CNN
 F 2 "" H 9450 2050 60  0000 C CNN
 F 3 "" H 9450 2050 60  0000 C CNN
 ,10 → 870,10
         -1   0    0    1
 $EndComp
 $Comp
-L VSS #PWR020
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 U 1 1 576DE85C
 P 9100 2050
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 $EndComp
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 0    0    -1
 $EndComp
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 F 2 "" H 10200 2050 50  0000 C CNN
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 10200 2050
 0    0    -1
 $EndComp
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 $Comp
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 0    0    -1
 $EndComp
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 0    0    -1
 $EndComp
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 0    0    -1
 $EndComp
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Notes Line
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 4700 10750 4700
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 Wire Wire Line
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+$EndComp
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 $EndSCHEMATC

 /Modules/OpAmps/OZDUAL03A/SCH_PCB/OZDUAL03A.kicad_pcb
 ,15 → 1,15
 (kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-2~bpo8+1-stable)
   (general
-    (links 117)
+    (links 126)
     (no_connects 0)
     (area 126.165 69.667 180.212 118.320714)
     (thickness 1.6)
-    (drawings 44)
-    (tracks 339)
+    (drawings 48)
+    (tracks 367)
     (zones 0)
-    (modules 53)
-    (nets 28)
+    (modules 55)
+    (nets 31)
   )
   (page A4)
 ,6 → 39,7
   (setup
     (last_trace_width 0.254)
     (user_trace_width 0.254)
+    (user_trace_width 0.508)
     (user_trace_width 0.635)
     (user_trace_width 1.016)
     (trace_clearance 0.2)
 ,7 → 68,7
     (aux_axis_origin 0 0)
     (visible_elements FFFFFF7F)
     (pcbplotparams
-      (layerselection 0x011b0_80000001)
+      (layerselection 0x011f0_80000001)
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       (excludeedgelayer true)
       (linewidth 0.100000)
 ,25 → 103,28
   (net 6 VCC)
   (net 7 /VIN-)
   (net 8 VSS)
-  (net 9 /T1)
-  (net 10 /T3)
-  (net 11 /VREF/T2)
-  (net 12 /INB+)
-  (net 13 /OUTB)
-  (net 14 /INB-)
-  (net 15 GND)
-  (net 16 /VREFA)
-  (net 17 /VREFB)
-  (net 18 "Net-(U1-Pad3)")
-  (net 19 "Net-(U1-Pad1)")
-  (net 20 "Net-(U1-Pad2)")
-  (net 21 "Net-(U1-Pad6)")
-  (net 22 "Net-(U1-Pad7)")
-  (net 23 "Net-(U1-Pad5)")
-  (net 24 "Net-(b0-Pad2)")
-  (net 25 "Net-(b8-Pad2)")
-  (net 26 "Net-(c1-Pad2)")
-  (net 27 "Net-(c7-Pad2)")
+  (net 9 /INB+)
+  (net 10 /OUTB)
+  (net 11 /INB-)
+  (net 12 GND)
+  (net 13 /VREFA)
+  (net 14 /VREFB)
+  (net 15 "Net-(U1-Pad3)")
+  (net 16 "Net-(U1-Pad1)")
+  (net 17 "Net-(U1-Pad2)")
+  (net 18 "Net-(U1-Pad6)")
+  (net 19 "Net-(U1-Pad7)")
+  (net 20 "Net-(U1-Pad5)")
+  (net 21 "Net-(b0-Pad2)")
+  (net 22 "Net-(b8-Pad2)")
+  (net 23 "Net-(c1-Pad2)")
+  (net 24 "Net-(c7-Pad2)")
+  (net 25 /1)
+  (net 26 /5)
+  (net 27 /3)
+  (net 28 /6)
+  (net 29 /4)
+  (net 30 /2)
   (net_class Default "This is the default net class."
     (clearance 0.2)
 ,6 → 133,12
     (via_drill 0.635)
     (uvia_dia 0.508)
     (uvia_drill 0.127)
+    (add_net /1)
+    (add_net /2)
+    (add_net /3)
+    (add_net /4)
+    (add_net /5)
+    (add_net /6)
     (add_net /INA+)
     (add_net /INA-)
     (add_net /INB+)
 ,11 → 145,8
     (add_net /INB-)
     (add_net /OUTA)
     (add_net /OUTB)
-    (add_net /T1)
-    (add_net /T3)
     (add_net /VIN+)
     (add_net /VIN-)
-    (add_net /VREF/T2)
     (add_net /VREFA)
     (add_net /VREFB)
     (add_net GND)
 ,21 → 184,21
     (fp_line (start 2.54 6.35) (end -2.54 6.35) (layer F.SilkS) (width 0.15))
     (fp_line (start -2.54 6.35) (end -2.54 -6.35) (layer F.SilkS) (width 0.15))
     (pad 1 thru_hole rect (at -1.27 -5.08 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
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     (pad 2 thru_hole rect (at 1.27 -5.08 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 12 /INB+))
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     (pad 3 thru_hole rect (at -1.27 -2.54 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 17 /VREFB))
+      (net 14 /VREFB))
     (pad 4 thru_hole rect (at 1.27 -2.54 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 17 /VREFB))
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     (pad 5 thru_hole rect (at -1.27 0 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 14 /INB-))
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-      (net 14 /INB-))
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     (pad 7 thru_hole rect (at -1.27 2.54 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 13 /OUTB))
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     (pad 8 thru_hole rect (at 1.27 2.54 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 13 /OUTB))
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       (net 5 GNDA))
     (pad 10 thru_hole rect (at 1.27 5.08 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
 ,9 → 228,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 14 /INB-))
+      (net 11 /INB-))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 25 "Net-(b8-Pad2)"))
+      (net 22 "Net-(b8-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,19 → 256,19
     (fp_line (start -2.54 1.905) (end -2.54 -1.905) (layer F.SilkS) (width 0.15))
     (fp_line (start 2.54 1.905) (end 2.54 -1.905) (layer F.SilkS) (width 0.15))
     (pad 1 smd oval (at -1.905 2.794 270) (size 0.6096 1.4732) (layers F.Cu F.Paste F.Mask)
-      (net 19 "Net-(U1-Pad1)"))
+      (net 16 "Net-(U1-Pad1)"))
     (pad 2 smd oval (at -0.635 2.794 270) (size 0.6096 1.4732) (layers F.Cu F.Paste F.Mask)
-      (net 20 "Net-(U1-Pad2)"))
+      (net 17 "Net-(U1-Pad2)"))
     (pad 3 smd oval (at 0.635 2.794 270) (size 0.6096 1.4732) (layers F.Cu F.Paste F.Mask)
-      (net 18 "Net-(U1-Pad3)"))
+      (net 15 "Net-(U1-Pad3)"))
     (pad 4 smd oval (at 1.905 2.794 270) (size 0.6096 1.4732) (layers F.Cu F.Paste F.Mask)
       (net 8 VSS))
     (pad 5 smd oval (at 1.905 -2.794 270) (size 0.6096 1.4732) (layers F.Cu F.Paste F.Mask)
-      (net 23 "Net-(U1-Pad5)"))
+      (net 20 "Net-(U1-Pad5)"))
     (pad 6 smd oval (at 0.635 -2.794 270) (size 0.6096 1.4732) (layers F.Cu F.Paste F.Mask)
-      (net 21 "Net-(U1-Pad6)"))
+      (net 18 "Net-(U1-Pad6)"))
     (pad 7 smd oval (at -0.635 -2.794 270) (size 0.6096 1.4732) (layers F.Cu F.Paste F.Mask)
-      (net 22 "Net-(U1-Pad7)"))
+      (net 19 "Net-(U1-Pad7)"))
     (pad 8 smd oval (at -1.905 -2.794 270) (size 0.6096 1.4732) (layers F.Cu F.Paste F.Mask)
       (net 6 VCC))
     (model MLAB_3D/IO/cms_so8.wrl
 ,7 → 298,7
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 1 /INA+))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 26 "Net-(c1-Pad2)"))
+      (net 23 "Net-(c1-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 324,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 18 "Net-(U1-Pad3)"))
+      (net 15 "Net-(U1-Pad3)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 19 "Net-(U1-Pad1)"))
+      (net 16 "Net-(U1-Pad1)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,7 → 354,7
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 2 /OUTA))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 19 "Net-(U1-Pad1)"))
+      (net 16 "Net-(U1-Pad1)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,7 → 382,7
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 3 /INA-))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 24 "Net-(b0-Pad2)"))
+      (net 21 "Net-(b0-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 408,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 20 "Net-(U1-Pad2)"))
+      (net 17 "Net-(U1-Pad2)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 19 "Net-(U1-Pad1)"))
+      (net 16 "Net-(U1-Pad1)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 492,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 9 /T1))
+      (net 25 /1))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 10 /T3))
+      (net 26 /5))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 520,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 11 /VREF/T2))
+      (net 27 /3))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 10 /T3))
+      (net 26 /5))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 548,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 23 "Net-(U1-Pad5)"))
+      (net 20 "Net-(U1-Pad5)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 22 "Net-(U1-Pad7)"))
+      (net 19 "Net-(U1-Pad7)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 576,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 12 /INB+))
+      (net 9 /INB+))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 27 "Net-(c7-Pad2)"))
+      (net 24 "Net-(c7-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 604,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 13 /OUTB))
+      (net 10 /OUTB))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 22 "Net-(U1-Pad7)"))
+      (net 19 "Net-(U1-Pad7)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 632,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 21 "Net-(U1-Pad6)"))
+      (net 18 "Net-(U1-Pad6)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 22 "Net-(U1-Pad7)"))
+      (net 19 "Net-(U1-Pad7)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,7 → 643,7
   )
   (module Mlab_Pin_Headers:Straight_2x01 (layer F.Cu) (tedit 5545E8D2) (tstamp 578F5219)
-    (at 156.21 111.76 270)
+    (at 157.48 111.76 270)
     (descr "pin header straight 2x01")
     (tags "pin header straight 2x01")
     (path /575EAA7C)
 ,7 → 660,7
     (pad 1 thru_hole rect (at -1.27 0 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
       (net 5 GNDA))
     (pad 2 thru_hole rect (at 1.27 0 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 15 GND))
+      (net 12 GND))
     (model Pin_Headers/Pin_Header_Straight_2x01.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
 ,9 → 736,9
     (pad 2 thru_hole rect (at 1.27 -5.08 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
       (net 1 /INA+))
     (pad 3 thru_hole rect (at -1.27 -2.54 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 16 /VREFA))
+      (net 13 /VREFA))
     (pad 4 thru_hole rect (at 1.27 -2.54 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 16 /VREFA))
+      (net 13 /VREFA))
     (pad 5 thru_hole rect (at -1.27 0 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
       (net 3 /INA-))
     (pad 6 thru_hole rect (at 1.27 0 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
 ,51 → 758,6
     )
   )
-  (module Mlab_Pin_Headers:Straight_2x05 (layer F.Cu) (tedit 5798E7C2) (tstamp 578F5251)
-    (at 147.32 111.76 90)
-    (descr "pin header straight 2x05")
-    (tags "pin header straight 2x05")
-    (path /575FB302)
-    (fp_text reference J5 (at 0 -7.62 90) (layer F.SilkS) hide
-      (effects (font (size 1.5 1.5) (thickness 0.15)))
-    )
-    (fp_text value VREF/TRANSISTOR (at -3.81 -1.778 180) (layer F.SilkS) hide
-      (effects (font (size 1.5 1.5) (thickness 0.15)))
-    )
-    (fp_text user 1 (at -2.921 -5.08 90) (layer F.SilkS)
-      (effects (font (size 0.5 0.5) (thickness 0.05)))
-    )
-    (fp_line (start -2.54 -6.35) (end 2.54 -6.35) (layer F.SilkS) (width 0.15))
-    (fp_line (start 2.54 -6.35) (end 2.54 6.35) (layer F.SilkS) (width 0.15))
-    (fp_line (start 2.54 6.35) (end -2.54 6.35) (layer F.SilkS) (width 0.15))
-    (fp_line (start -2.54 6.35) (end -2.54 -6.35) (layer F.SilkS) (width 0.15))
-    (pad 1 thru_hole rect (at -1.27 -5.08 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 6 VCC))
-    (pad 2 thru_hole rect (at 1.27 -5.08 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 6 VCC))
-    (pad 3 thru_hole rect (at -1.27 -2.54 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 9 /T1))
-    (pad 4 thru_hole rect (at 1.27 -2.54 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 9 /T1))
-    (pad 5 thru_hole rect (at -1.27 0 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 11 /VREF/T2))
-    (pad 6 thru_hole rect (at 1.27 0 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 11 /VREF/T2))
-    (pad 7 thru_hole rect (at -1.27 2.54 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 10 /T3))
-    (pad 8 thru_hole rect (at 1.27 2.54 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 10 /T3))
-    (pad 9 thru_hole rect (at -1.27 5.08 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 5 GNDA))
-    (pad 10 thru_hole rect (at 1.27 5.08 90) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
-      (net 5 GNDA))
-    (model Pin_Headers/Pin_Header_Straight_2x05.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 90))
-    )
-  )
   (module Mlab_Mechanical:MountingHole_3mm placed (layer F.Cu) (tedit 5535DB2C) (tstamp 578F5256)
     (at 132.08 111.76 90)
     (descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
 ,7 → 771,7
     )
     (fp_circle (center 0 0) (end 2.99974 0) (layer Cmts.User) (width 0.381))
     (pad 1 thru_hole circle (at 0 0 90) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
-      (net 15 GND) (clearance 1) (zone_connect 2))
+      (net 12 GND) (clearance 1) (zone_connect 2))
   )
   (module Mlab_Mechanical:MountingHole_3mm placed (layer F.Cu) (tedit 5535DB2C) (tstamp 578F525B)
 ,7 → 787,7
     )
     (fp_circle (center 0 0) (end 2.99974 0) (layer Cmts.User) (width 0.381))
     (pad 1 thru_hole circle (at 0 0 90) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
-      (net 15 GND) (clearance 1) (zone_connect 2))
+      (net 12 GND) (clearance 1) (zone_connect 2))
   )
   (module Mlab_Mechanical:MountingHole_3mm placed (layer F.Cu) (tedit 5535DB2C) (tstamp 578F5260)
 ,7 → 803,7
     )
     (fp_circle (center 0 0) (end 2.99974 0) (layer Cmts.User) (width 0.381))
     (pad 1 thru_hole circle (at 0 0 90) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
-      (net 15 GND) (clearance 1) (zone_connect 2))
+      (net 12 GND) (clearance 1) (zone_connect 2))
   )
   (module Mlab_Mechanical:MountingHole_3mm placed (layer F.Cu) (tedit 5535DB2C) (tstamp 578F5265)
 ,7 → 819,7
     )
     (fp_circle (center 0 0) (end 2.99974 0) (layer Cmts.User) (width 0.381))
     (pad 1 thru_hole circle (at 0 0 90) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
-      (net 15 GND) (clearance 1) (zone_connect 2))
+      (net 12 GND) (clearance 1) (zone_connect 2))
   )
   (module Mlab_R:SMD-0805 (layer F.Cu) (tedit 5798E6E0) (tstamp 578F526B)
 ,9 → 840,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 18 "Net-(U1-Pad3)"))
+      (net 15 "Net-(U1-Pad3)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 16 /VREFA))
+      (net 13 /VREFA))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 868,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 20 "Net-(U1-Pad2)"))
+      (net 17 "Net-(U1-Pad2)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 16 /VREFA))
+      (net 13 /VREFA))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 896,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 18 "Net-(U1-Pad3)"))
+      (net 15 "Net-(U1-Pad3)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 26 "Net-(c1-Pad2)"))
+      (net 23 "Net-(c1-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,7 → 924,7
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 18 "Net-(U1-Pad3)"))
+      (net 15 "Net-(U1-Pad3)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 5 GNDA))
     (model MLAB_3D/Resistors/chip_cms.wrl
 ,9 → 952,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 19 "Net-(U1-Pad1)"))
+      (net 16 "Net-(U1-Pad1)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 18 "Net-(U1-Pad3)"))
+      (net 15 "Net-(U1-Pad3)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,7 → 980,7
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 20 "Net-(U1-Pad2)"))
+      (net 17 "Net-(U1-Pad2)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 5 GNDA))
     (model MLAB_3D/Resistors/chip_cms.wrl
 ,9 → 1008,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 20 "Net-(U1-Pad2)"))
+      (net 17 "Net-(U1-Pad2)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 24 "Net-(b0-Pad2)"))
+      (net 21 "Net-(b0-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 1036,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 19 "Net-(U1-Pad1)"))
+      (net 16 "Net-(U1-Pad1)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 20 "Net-(U1-Pad2)"))
+      (net 17 "Net-(U1-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,62 → 1102,6
     )
   )
-  (module Mlab_R:SMD-0805 (layer F.Cu) (tedit 5798E788) (tstamp 578F52A7)
-    (at 143.51 105.41 90)
-    (path /578F6BEE)
-    (attr smd)
-    (fp_text reference d3 (at 0 -0.3175 90) (layer F.SilkS) hide
-      (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
-    )
-    (fp_text value R (at 0.127 0.381 90) (layer F.SilkS) hide
-      (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
-    )
-    (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.15))
-    (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
-    (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 6 VCC))
-    (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 9 /T1))
-    (model MLAB_3D/Resistors/chip_cms.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 0.1 0.1 0.1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-  (module Mlab_R:SMD-0805 (layer F.Cu) (tedit 5798E7A0) (tstamp 578F52AD)
-    (at 151.13 105.41 270)
-    (path /578F6CDF)
-    (attr smd)
-    (fp_text reference d6 (at 0 -0.3175 270) (layer F.SilkS) hide
-      (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
-    )
-    (fp_text value R (at 0.127 0.381 270) (layer F.SilkS) hide
-      (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
-    )
-    (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.15))
-    (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
-    (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 10 /T3))
-    (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 5 GNDA))
-    (model MLAB_3D/Resistors/chip_cms.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 0.1 0.1 0.1))
-      (rotate (xyz 0 0 0))
-    )
-  )
   (module Mlab_R:SMD-0805 (layer F.Cu) (tedit 5798E7AF) (tstamp 578F52B3)
     (at 156.21 105.41 90)
     (path /574D6C52)
 ,9 → 1120,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 23 "Net-(U1-Pad5)"))
+      (net 20 "Net-(U1-Pad5)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 27 "Net-(c7-Pad2)"))
+      (net 24 "Net-(c7-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 1148,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 22 "Net-(U1-Pad7)"))
+      (net 19 "Net-(U1-Pad7)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 23 "Net-(U1-Pad5)"))
+      (net 20 "Net-(U1-Pad5)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,7 → 1178,7
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 5 GNDA))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 23 "Net-(U1-Pad5)"))
+      (net 20 "Net-(U1-Pad5)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 1204,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 23 "Net-(U1-Pad5)"))
+      (net 20 "Net-(U1-Pad5)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 17 /VREFB))
+      (net 14 /VREFB))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 1232,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 21 "Net-(U1-Pad6)"))
+      (net 18 "Net-(U1-Pad6)"))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 17 /VREFB))
+      (net 14 /VREFB))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,7 → 1262,7
     (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 5 GNDA))
     (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 21 "Net-(U1-Pad6)"))
+      (net 18 "Net-(U1-Pad6)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 1288,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 21 "Net-(U1-Pad6)"))
+      (net 18 "Net-(U1-Pad6)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 25 "Net-(b8-Pad2)"))
+      (net 22 "Net-(b8-Pad2)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,9 → 1316,9
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 22 "Net-(U1-Pad7)"))
+      (net 19 "Net-(U1-Pad7)"))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 21 "Net-(U1-Pad6)"))
+      (net 18 "Net-(U1-Pad6)"))
     (model MLAB_3D/Resistors/chip_cms.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.1 0.1 0.1))
 ,7 → 1420,7
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 16 /VREFA))
+      (net 13 /VREFA))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 5 GNDA))
     (model MLAB_3D/Resistors/chip_cms.wrl
 ,7 → 1448,7
     (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
     (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
     (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
-      (net 17 /VREFB))
+      (net 14 /VREFB))
     (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
       (net 5 GNDA))
     (model MLAB_3D/Resistors/chip_cms.wrl
 ,39 → 1458,6
     )
   )
-  (module sot23-6:SOT-23-6 (layer F.Cu) (tedit 5798E7EB) (tstamp 57967CA7)
-    (at 147.32 105.41)
-    (path /57610E4B)
-    (fp_text reference U2 (at 0 0) (layer F.SilkS)
-      (effects (font (size 0.762 0.762) (thickness 0.1905)))
-    )
-    (fp_text value MAX6066 (at 0.0635 0) (layer F.SilkS) hide
-      (effects (font (size 0.50038 0.50038) (thickness 0.0762)))
-    )
-    (fp_line (start -0.508 0.762) (end -1.27 0.254) (layer F.SilkS) (width 0.15))
-    (fp_line (start 1.27 0.762) (end -1.3335 0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start -1.3335 0.762) (end -1.3335 -0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start -1.3335 -0.762) (end 1.27 -0.762) (layer F.SilkS) (width 0.15))
-    (fp_line (start 1.27 -0.762) (end 1.27 0.762) (layer F.SilkS) (width 0.15))
-    (pad 1 smd rect (at -0.9525 -1.27) (size 0.5 1.00076) (layers F.Cu F.Paste F.Mask)
-      (net 9 /T1))
-    (pad 2 smd rect (at 0 -1.27) (size 0.5 1.00076) (layers F.Cu F.Paste F.Mask)
-      (net 11 /VREF/T2))
-    (pad 3 smd rect (at 0.9525 -1.27) (size 0.50104 1.00076) (layers F.Cu F.Paste F.Mask)
-      (net 10 /T3))
-    (pad 3 smd rect (at 0.9525 1.27) (size 0.5 1.00076) (layers F.Cu F.Paste F.Mask)
-      (net 10 /T3))
-    (pad 2 smd rect (at 0 1.27) (size 0.5 1.00076) (layers F.Cu F.Paste F.Mask)
-      (net 11 /VREF/T2))
-    (pad 1 smd rect (at -0.9525 1.27) (size 0.5 1.00076) (layers F.Cu F.Paste F.Mask)
-      (net 9 /T1))
-    (model MLAB_3D/IO/SOT23_6.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 0.11 0.11 0.11))
-      (rotate (xyz 0 0 0))
-    )
-  )
   (module sot23-6:TantalC_SizeC_Reflow (layer F.Cu) (tedit 5798E50E) (tstamp 5798E76B)
     (at 161.544 87.884)
     (descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
 ,6 → 1574,227
     )
   )
+  (module Mlab_Pin_Headers:Straight_2x08 (layer F.Cu) (tedit 57A77AF5) (tstamp 57A775B2)
+    (at 146.05 111.76 270)
+    (descr "pin header straight 2x08")
+    (tags "pin header straight 2x08")
+    (path /57A8B6E9)
+    (fp_text reference J5 (at 0 -11.43 270) (layer F.SilkS) hide
+      (effects (font (size 1.5 1.5) (thickness 0.15)))
+    )
+    (fp_text value SOT23-6 (at 0 11.43 270) (layer F.SilkS) hide
+      (effects (font (size 1.5 1.5) (thickness 0.15)))
+    )
+    (fp_text user 1 (at -2.921 -8.89 270) (layer F.SilkS)
+      (effects (font (size 0.5 0.5) (thickness 0.05)))
+    )
+    (fp_line (start -2.54 -10.16) (end 2.54 -10.16) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.54 -10.16) (end 2.54 10.16) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.54 10.16) (end -2.54 10.16) (layer F.SilkS) (width 0.15))
+    (fp_line (start -2.54 10.16) (end -2.54 -10.16) (layer F.SilkS) (width 0.15))
+    (pad 1 thru_hole rect (at -1.27 -8.89 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 5 GNDA))
+    (pad 2 thru_hole rect (at 1.27 -8.89 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 5 GNDA))
+    (pad 3 thru_hole rect (at -1.27 -6.35 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 28 /6))
+    (pad 4 thru_hole rect (at 1.27 -6.35 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 28 /6))
+    (pad 5 thru_hole rect (at -1.27 -3.81 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 26 /5))
+    (pad 6 thru_hole rect (at 1.27 -3.81 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 26 /5))
+    (pad 7 thru_hole rect (at -1.27 -1.27 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 29 /4))
+    (pad 8 thru_hole rect (at 1.27 -1.27 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 29 /4))
+    (pad 9 thru_hole rect (at -1.27 1.27 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 27 /3))
+    (pad 10 thru_hole rect (at 1.27 1.27 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 27 /3))
+    (pad 11 thru_hole rect (at -1.27 3.81 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 30 /2))
+    (pad 12 thru_hole rect (at 1.27 3.81 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 30 /2))
+    (pad 13 thru_hole rect (at -1.27 6.35 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 25 /1))
+    (pad 14 thru_hole rect (at 1.27 6.35 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 25 /1))
+    (pad 15 thru_hole rect (at -1.27 8.89 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 6 VCC))
+    (pad 16 thru_hole rect (at 1.27 8.89 270) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
+      (net 6 VCC))
+    (model Pin_Headers/Pin_Header_Straight_2x08.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+  (module Mlab_R:SMD-0805 (layer F.Cu) (tedit 57A77DB5) (tstamp 57A775BF)
+    (at 143.51 105.41 90)
+    (path /57A7E177)
+    (attr smd)
+    (fp_text reference d3 (at 0 -0.3175 90) (layer F.SilkS) hide
+      (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
+    )
+    (fp_text value R (at 0.127 0.381 90) (layer F.SilkS) hide
+      (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
+    )
+    (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
+    (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
+      (net 6 VCC))
+    (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
+      (net 30 /2))
+    (model MLAB_3D/Resistors/chip_cms.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.1 0.1 0.1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+  (module Mlab_R:SMD-0805 (layer F.Cu) (tedit 57A77DBF) (tstamp 57A775C5)
+    (at 151.13 105.41 90)
+    (path /57A7E253)
+    (attr smd)
+    (fp_text reference d6 (at 0 -0.3175 90) (layer F.SilkS) hide
+      (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
+    )
+    (fp_text value R (at 0.127 0.381 90) (layer F.SilkS) hide
+      (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
+    )
+    (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.15))
+    (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
+      (net 28 /6))
+    (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
+      (net 5 GNDA))
+    (model MLAB_3D/Resistors/chip_cms.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.1 0.1 0.1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+  (module Mlab_IO:SOT-23-6 (layer F.Cu) (tedit 57A77B32) (tstamp 57A775D5)
+    (at 147.193 105.664 270)
+    (path /57A85301)
+    (fp_text reference U3 (at 1.99898 0 360) (layer F.SilkS) hide
+      (effects (font (size 0.762 0.762) (thickness 0.0762)))
+    )
+    (fp_text value "ANALOG SWITCH" (at 0.0635 0 270) (layer F.SilkS) hide
+      (effects (font (size 0.50038 0.50038) (thickness 0.0762)))
+    )
+    (fp_line (start -0.508 0.762) (end -1.27 0.254) (layer F.SilkS) (width 0.15))
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 ,42 → 1999,26
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   (segment (start 152.4 78.486) (end 152.4 78.359) (width 0.635) (layer F.Cu) (net 5) (tstamp 579643D9))
 ,9 → 2030,7
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       )
     )
   )

 /Modules/OpAmps/OZDUAL03A/SCH_PCB/OZDUAL03A.net
 ,7 → 1,7
 (export (version D)
   (design
     (source /home/jirka/svn/OpAmps/OZDUAL03A/SCH_PCB/OZDUAL03A.sch)
-    (date "Wed 27 Jul 2016 06:46:41 PM CEST")
+    (date "Sun 07 Aug 2016 08:27:16 PM CEST")
     (tool "Eeschema 4.0.2+dfsg1-2~bpo8+1-stable")
     (sheet (number 1) (name /) (tstamps /)
       (title_block
 ,15 → 285,9
       (libsource (lib MLAB_HEADER) (part HEADER_2x05_PARALLEL))
       (sheetpath (names /) (tstamps /))
       (tstamp 575F0877))
-    (comp (ref J5)
-      (value VREF/TRANSISTOR)
-      (footprint Mlab_Pin_Headers:Straight_2x05)
-      (libsource (lib MLAB_HEADER) (part HEADER_2x05_PARALLEL))
-      (sheetpath (names /) (tstamps /))
-      (tstamp 575FB302))
     (comp (ref U2)
       (value MAX6066)
-      (footprint sot23-6:SOT-23-6)
+      (footprint sot23-6:SOT-23-3)
       (libsource (lib references) (part ISL21070CIH320Z-TK))
       (sheetpath (names /) (tstamps /))
       (tstamp 57610E4B))
 ,31 → 303,64
       (libsource (lib OZDUAL03A-cache) (part C-RESCUE-OZDUAL03A))
       (sheetpath (names /) (tstamps /))
       (tstamp 5761FADF))
+    (comp (ref c9)
+      (value C)
+      (footprint Mlab_R:SMD-0805)
+      (libsource (lib OZDUAL03A-cache) (part C-RESCUE-OZDUAL03A))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 57966DF4))
+    (comp (ref c0)
+      (value C)
+      (footprint Mlab_R:SMD-0805)
+      (libsource (lib OZDUAL03A-cache) (part C-RESCUE-OZDUAL03A))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 579676DC))
     (comp (ref d3)
       (value R)
       (footprint Mlab_R:SMD-0805)
       (libsource (lib device) (part R))
       (sheetpath (names /) (tstamps /))
-      (tstamp 578F6BEE))
+      (tstamp 57A7E177))
     (comp (ref d6)
       (value R)
       (footprint Mlab_R:SMD-0805)
       (libsource (lib device) (part R))
       (sheetpath (names /) (tstamps /))
-      (tstamp 578F6CDF))
-    (comp (ref c9)
-      (value C)
-      (footprint Mlab_R:SMD-0805)
-      (libsource (lib OZDUAL03A-cache) (part C-RESCUE-OZDUAL03A))
+      (tstamp 57A7E253))
+    (comp (ref U3)
+      (value "ANALOG SWITCH")
+      (footprint Mlab_IO:SOT-23-6)
+      (libsource (lib texas) (part TS5A3159))
       (sheetpath (names /) (tstamps /))
-      (tstamp 57966DF4))
-    (comp (ref c0)
-      (value C)
-      (footprint Mlab_R:SMD-0805)
-      (libsource (lib OZDUAL03A-cache) (part C-RESCUE-OZDUAL03A))
+      (tstamp 57A85301))
+    (comp (ref J5)
+      (value SOT23-6)
+      (footprint Mlab_Pin_Headers:Straight_2x08)
+      (libsource (lib MLAB_HEADER) (part HEADER_2x08_PARALLEL))
       (sheetpath (names /) (tstamps /))
-      (tstamp 579676DC)))
+      (tstamp 57A8B6E9))
+    (comp (ref Q1)
+      (value BC846)
+      (footprint sot23-6:SOT-23-3)
+      (libsource (lib transistors) (part BC849))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 57A94CB6)))
   (libparts
+    (libpart (lib transistors) (part BC850)
+      (aliases
+        (alias BC849))
+      (description "45V Vce, 0.1A Ic, Low noise, NPN, SOT-23")
+      (docs http://www.fairchildsemi.com/ds/BC/BC850.pdf)
+      (footprints
+        (fp SOT-23*))
+      (fields
+        (field (name Reference) Q)
+        (field (name Value) BC850)
+        (field (name Footprint) SOT-23))
+      (pins
+        (pin (num 1) (name B) (type input))
+        (pin (num 2) (name E) (type passive))
+        (pin (num 3) (name C) (type passive))))
     (libpart (lib OZDUAL03A-cache) (part C-RESCUE-OZDUAL03A)
       (footprints
         (fp SM*)
 ,6 → 432,28
         (pin (num 8) (name ~) (type input))
         (pin (num 9) (name ~) (type input))
         (pin (num 10) (name ~) (type input))))
+    (libpart (lib MLAB_HEADER) (part HEADER_2x08_PARALLEL)
+      (description "2x08 2.54 mm pitch header, 2 pins next to each other are connected")
+      (fields
+        (field (name Reference) J)
+        (field (name Value) HEADER_2x08_PARALLEL))
+      (pins
+        (pin (num 1) (name ~) (type input))
+        (pin (num 2) (name ~) (type input))
+        (pin (num 3) (name ~) (type input))
+        (pin (num 4) (name ~) (type input))
+        (pin (num 5) (name ~) (type input))
+        (pin (num 6) (name ~) (type input))
+        (pin (num 7) (name ~) (type input))
+        (pin (num 8) (name ~) (type input))
+        (pin (num 9) (name ~) (type input))
+        (pin (num 10) (name ~) (type input))
+        (pin (num 11) (name ~) (type input))
+        (pin (num 12) (name ~) (type input))
+        (pin (num 13) (name ~) (type input))
+        (pin (num 14) (name ~) (type input))
+        (pin (num 15) (name ~) (type input))
+        (pin (num 16) (name ~) (type input))))
     (libpart (lib MLAB_MECHANICAL) (part HOLE)
       (fields
         (field (name Reference) M)
 ,188 → 524,228
         (field (name Value) R))
       (pins
         (pin (num 1) (name ~) (type passive))
-        (pin (num 2) (name ~) (type passive)))))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib texas) (part TS5A3160)
+      (aliases
+        (alias TS5A3159))
+      (description "1-Ohm SPDT Analog Switch, Make-Before-Break")
+      (docs http://www.ti.com/lit/ds/symlink/ts5a3160.pdf)
+      (footprints
+        (fp SOT-23-6*)
+        (fp SC-70-6*))
+      (fields
+        (field (name Reference) U)
+        (field (name Value) TS5A3160))
+      (pins
+        (pin (num 1) (name NO) (type passive))
+        (pin (num 2) (name GND) (type power_in))
+        (pin (num 3) (name NC) (type passive))
+        (pin (num 4) (name COM) (type passive))
+        (pin (num 5) (name V+) (type power_in))
+        (pin (num 6) (name IN) (type input)))))
   (libraries
-    (library (logical device)
-      (uri /home/jirka/git/kicad-library/library/device.lib))
+    (library (logical MLAB_Jumpers)
+      (uri /home/jirka/git/kicad-mlab/symbols/MLAB_Jumpers.lib))
+    (library (logical MLAB_MECHANICAL)
+      (uri /home/jirka/git/kicad-mlab/symbols/MLAB_MECHANICAL.lib))
     (library (logical linear)
       (uri /home/jirka/git/kicad-library/library/linear.lib))
-    (library (logical MLAB_MECHANICAL)
-      (uri /home/jirka/git/kicad-mlab/symbols/MLAB_MECHANICAL.lib))
-    (library (logical MLAB_Jumpers)
-      (uri /home/jirka/git/kicad-mlab/symbols/MLAB_Jumpers.lib))
-    (library (logical MLAB_HEADER)
-      (uri /home/jirka/git/kicad-mlab/symbols/MLAB_HEADER.lib))
+    (library (logical texas)
+      (uri /home/jirka/git/kicad-library/library/texas.lib))
+    (library (logical transistors)
+      (uri /home/jirka/git/kicad-library/library/transistors.lib))
     (library (logical references)
       (uri /home/jirka/git/kicad-library/library/references.lib))
     (library (logical OZDUAL03A-cache)
-      (uri /home/jirka/svn/OpAmps/OZDUAL03A/SCH_PCB/OZDUAL03A-cache.lib)))
+      (uri /home/jirka/svn/OpAmps/OZDUAL03A/SCH_PCB/OZDUAL03A-cache.lib))
+    (library (logical device)
+      (uri /home/jirka/git/kicad-library/library/device.lib))
+    (library (logical MLAB_HEADER)
+      (uri /home/jirka/git/kicad-mlab/symbols/MLAB_HEADER.lib)))
   (nets
-    (net (code 1) (name "Net-(c1-Pad2)")
-      (node (ref d0) (pin 2))
-      (node (ref c1) (pin 2)))
-    (net (code 2) (name /INA+)
-      (node (ref c1) (pin 1))
-      (node (ref J3) (pin 2))
-      (node (ref J3) (pin 1)))
-    (net (code 3) (name "Net-(b0-Pad2)")
-      (node (ref b0) (pin 2))
-      (node (ref b1) (pin 2)))
-    (net (code 4) (name /OUTA)
-      (node (ref J3) (pin 7))
-      (node (ref J3) (pin 8))
-      (node (ref a0) (pin 1)))
-    (net (code 5) (name /INB+)
+    (net (code 1) (name /INB+)
       (node (ref c7) (pin 1))
       (node (ref J4) (pin 1))
       (node (ref J4) (pin 2)))
-    (net (code 6) (name /OUTB)
+    (net (code 2) (name /OUTB)
       (node (ref a9) (pin 1))
       (node (ref J4) (pin 8))
       (node (ref J4) (pin 7)))
-    (net (code 7) (name "Net-(U1-Pad2)")
-      (node (ref U1) (pin 2))
-      (node (ref b2) (pin 1))
-      (node (ref a4) (pin 1))
-      (node (ref a1) (pin 2))
-      (node (ref b1) (pin 1))
-      (node (ref d2) (pin 1)))
-    (net (code 8) (name "Net-(U1-Pad7)")
+    (net (code 3) (name "Net-(U1-Pad7)")
+      (node (ref b7) (pin 2))
+      (node (ref U1) (pin 7))
       (node (ref a6) (pin 2))
+      (node (ref a9) (pin 2))
       (node (ref a7) (pin 1))
-      (node (ref a8) (pin 1))
-      (node (ref U1) (pin 7))
-      (node (ref a9) (pin 2))
-      (node (ref b7) (pin 2)))
-    (net (code 9) (name VSS)
-      (node (ref U1) (pin 4))
-      (node (ref R2) (pin 1))
-      (node (ref C4) (pin 2))
-      (node (ref c3) (pin 2)))
-    (net (code 10) (name VCC)
+      (node (ref a8) (pin 1)))
+    (net (code 4) (name "Net-(c1-Pad2)")
+      (node (ref c1) (pin 2))
+      (node (ref d0) (pin 2)))
+    (net (code 5) (name /INA+)
+      (node (ref J3) (pin 1))
+      (node (ref J3) (pin 2))
+      (node (ref c1) (pin 1)))
+    (net (code 6) (name "Net-(b0-Pad2)")
+      (node (ref b1) (pin 2))
+      (node (ref b0) (pin 2)))
+    (net (code 7) (name /VIN+)
+      (node (ref D1) (pin 1))
+      (node (ref C1) (pin 1))
+      (node (ref R1) (pin 2))
+      (node (ref J2) (pin 6))
+      (node (ref J2) (pin 5)))
+    (net (code 8) (name /INA-)
+      (node (ref b0) (pin 1))
+      (node (ref J3) (pin 5))
+      (node (ref J3) (pin 6)))
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-    (net (code 25) (name "Net-(U1-Pad6)")
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       (node (ref d9) (pin 2))
       (node (ref a8) (pin 2)))
-    (net (code 26) (name "Net-(U1-Pad5)")
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-    (net (code 27) (name /VIN-)
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-      (node (ref C2) (pin 2))
-      (node (ref R2) (pin 2))
-      (node (ref J2) (pin 3))
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+      (node (ref J2) (pin 4))
+      (node (ref J2) (pin 3)))
+    (net (code 30) (name VSS)
+      (node (ref U1) (pin 4))
+      (node (ref R2) (pin 1))
+      (node (ref C4) (pin 2))
+      (node (ref c3) (pin 2)))))

 /Modules/OpAmps/OZDUAL03A/SCH_PCB/OZDUAL03A.sch
 ,336 → 168,336
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 L C-RESCUE-OZDUAL03A b7
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 L R c6
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 L R c2
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 L R b2
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 L C-RESCUE-OZDUAL03A c5
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 F 2 "" H 9450 1900 50  0000 C CNN
 F 3 "" H 9450 1900 50  0000 C CNN
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 F 2 "" H 9100 1900 50  0000 C CNN
 F 3 "" H 9100 1900 50  0000 C CNN
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 F 3 "" H 10200 1900 50  0000 C CNN
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 F 2 "" H 9900 1900 50  0000 C CNN
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 F 3 "" H 9450 2050 60  0000 C CNN
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 F 3 "" H 9100 2050 50  0000 C CNN
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 F 3 "" H 9900 2050 60  0000 C CNN
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 F 2 "" H 10200 2050 50  0000 C CNN
 F 3 "" H 10200 2050 50  0000 C CNN
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 $EndSCHEMATC

/Modules/OpAmps/OZDUAL03A/SCH_PCB/sot23-6.pretty/SOT-23-6.kicad_mod
File deleted

 /Modules/OpAmps/OZDUAL03A/SCH_PCB/sot23-6.pretty/SOT-23-3.kicad_mod
 ,0 → 1,21
+(module SOT-23-3 (layer F.Cu) (tedit 57A77588)
+  (fp_text reference U3 (at 1.99898 0 90) (layer F.SilkS)
+    (effects (font (size 0.762 0.762) (thickness 0.0762)))
+  )
+  (fp_text value "ANALOG SWITCH" (at 0.0635 0) (layer F.SilkS)
+    (effects (font (size 0.50038 0.50038) (thickness 0.0762)))
+  )
+  (fp_line (start -0.508 0.762) (end -1.27 0.254) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.27 0.762) (end -1.3335 0.762) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.3335 0.762) (end -1.3335 -0.762) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.3335 -0.762) (end 1.27 -0.762) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.27 -0.762) (end 1.27 0.762) (layer F.SilkS) (width 0.15))
+  (pad 3 smd rect (at 0 -1.27) (size 0.5 1.00076) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at 0.9525 1.27) (size 0.5 1.00076) (layers F.Cu F.Paste F.Mask))
+  (pad 1 smd rect (at -0.9525 1.27) (size 0.5 1.00076) (layers F.Cu F.Paste F.Mask))
+  (model MLAB_3D/IO/SOT23_6.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.11 0.11 0.11))
+    (rotate (xyz 0 0 0))
+  )
+)

Subversion Repositories – MLAB

/Modules @ 4668 → /Modules/ @ 4669

Compare Path:	Rev
With Path:	Rev