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/Modules/ADconverters/BRIDGEADC01A/CAM_PROFI/BRIDGEADC01A-Edge_Cuts.gbr |
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0,0 → 1,19 |
G04 #@! TF.FileFunction,Profile,NP* |
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%MOMM*% |
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G04 APERTURE LIST* |
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M02* |
/Modules/ADconverters/BRIDGEADC01A/DOC/SRC/BRIDGEADC01A.html.in |
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0,0 → 1,26 |
<html> |
<head> |
<meta charset=utf-8/> |
<link rel="stylesheet" type="text/css" href="/home/ondra6ak/Documents/mlabgen/style.css"> |
<title> |
Mlab|$HumanName |
</title> |
<script type="text/x-mathjax-config"> |
MathJax.Hub.Config({extensions: ["asciimath2jax.js"], |
jax: ["input/AsciiMath", "output/CommonHTML"], |
asciimath2jax: {delimiters: [['$M','M$']]}, |
CommonHTML: {mtextFontInherit: true}, |
showProcessingMessages: false, |
messageStyle: "none", |
showMathMenu: false}); |
</script> |
<script type="text/javascript" src="https://cdn.mathjax.org/mathjax/latest/MathJax.js"></script> |
</head> |
</head> |
<body> |
$Text |
</body> |
</html> |
/Modules/ADconverters/BRIDGEADC01A/DOC/SRC/BRIDGEADC01A.md.in |
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0,0 → 1,37 |
$HumanName |
========== |
Brought to you by: $Author |
$Descr |
Specifications |
-------------- |
Specification | Value | Unit | Note |
----------------- | ------------- | ---- | -------------- |
Operating Voltage | | V | |
Power Consumption | | mA | |
Dimensions | $Dimensions | mm | width x length |
Description |
----------- |
!9.9;9.9;287.1;200.1;!(../SCH_PCB/${Module}_SCH.svg) |
Mechanical construction |
----------------------- |
Component placement |
------------------- |
![PCB top](../../CAM_AMA/${Module}_TOP.svg "Top side of a PCB") ![PCB bottom](../../CAM_AMA/${Module}_BOT.svg "Bottom side of a PCB") |
$bom |
First power up |
-------------- |
Programming |
---------- |
/Modules/ADconverters/BRIDGEADC01A/Makefile |
---|
0,0 → 1,8 |
TARGETS = DOC/$(MODULE).html \ |
DOC/SRC/$(MODULE).md \ |
PrjInfo.txt \ |
DOC/$(MODULE).pdf |
MATHJAX = /home/ondra6ak/Documents/MathJax/MathJax.js |
include mlabgen.mk |
/Modules/ADconverters/BRIDGEADC01A/PrjInfo.txt.in |
---|
0,0 → 1,13 |
[HumanName] |
Human friendly name of the module |
[BuyLinkTindie] |
Link to module's page on Tindie. |
[BuyLinkUST] |
Link to module's page on Universal Scientific Technologies. |
[Dev] |
True |
[End] |
/Modules/ADconverters/BRIDGEADC01A/SCH_PCB/BRIDGEADC01A-cache.lib |
---|
0,0 → 1,197 |
EESchema-LIBRARY Version 2.3 |
#encoding utf-8 |
# |
# AD7730 |
# |
DEF AD7730 U 0 30 Y Y 1 F N |
F0 "U" -550 700 50 H V L CNN |
F1 "AD7730" 800 750 50 H V L CNN |
F2 "" 0 0 50 H V C CNN |
F3 "" 0 0 50 H V C CNN |
ALIAS AD7730L |
$FPLIST |
TSSOP_24 |
SOIC_24 |
$ENDFPLIST |
DRAW |
S -550 650 1150 -1200 0 1 10 f |
X SCLK 1 1300 -700 150 L 50 50 1 1 I |
X MCLKIN 2 1300 150 150 L 50 50 1 1 I |
X MCLKOUT 3 1300 -100 150 L 50 50 1 1 I |
X POL 4 650 -1350 150 U 50 50 1 1 I |
X ~SYNC 5 550 800 150 D 50 50 1 1 I |
X ~RESET 6 300 800 150 D 50 50 1 1 I |
X Vbias 7 -700 -1100 150 R 50 50 1 1 I |
X AGND 8 50 -1350 150 U 50 50 1 1 W |
X AVDD 9 -150 800 150 D 50 50 1 1 W |
X AIN1+ 10 -700 150 150 R 50 50 1 1 I |
X ~RDY 20 1300 -350 150 L 50 50 1 1 O |
X AIN1- 11 -700 0 150 R 50 50 1 1 I |
X DOUT 21 1300 -900 150 L 50 50 1 1 O |
X AIN2+/D1 12 -700 -250 150 R 50 50 1 1 O |
X DIN 22 1300 -800 150 L 50 50 1 1 I |
X AIN2-/D0 13 -700 -400 150 R 50 50 1 1 O |
X DVDD 23 0 800 150 D 50 50 1 1 W |
X REFIN+ 14 -700 -800 150 R 50 50 1 1 I |
X DGND 24 200 -1350 150 U 50 50 1 1 W |
X REFIN- 15 -700 -700 150 R 50 50 1 1 I |
X ACX 16 -700 500 150 R 50 50 1 1 O |
X ~ACX 17 -700 400 150 R 50 50 1 1 O |
X ~STANDBY 18 1300 450 150 L 50 50 1 1 I |
X ~CS 19 1300 -600 150 L 50 50 1 1 I |
ENDDRAW |
ENDDEF |
# |
# CP_Small |
# |
DEF CP_Small C 0 10 N N 1 F N |
F0 "C" 10 70 50 H V L CNN |
F1 "CP_Small" 10 -80 50 H V L CNN |
F2 "" 0 0 60 H V C CNN |
F3 "" 0 0 60 H V C CNN |
$FPLIST |
CP* |
Elko* |
TantalC* |
C*elec |
c_elec* |
SMD*_Pol |
$ENDFPLIST |
DRAW |
S -60 -12 60 -27 0 1 0 F |
S -60 27 60 12 0 1 0 N |
P 2 0 1 0 -50 60 -30 60 N |
P 2 0 1 0 -40 50 -40 70 N |
X ~ 1 0 100 73 D 40 40 1 1 P |
X ~ 2 0 -100 73 U 40 40 1 1 P |
ENDDRAW |
ENDDEF |
# |
# C_Small |
# |
DEF C_Small C 0 10 N N 1 F N |
F0 "C" 10 70 50 H V L CNN |
F1 "C_Small" 10 -80 50 H V L CNN |
F2 "" 0 0 60 H V C CNN |
F3 "" 0 0 60 H V C CNN |
$FPLIST |
C? |
C_????_* |
C_???? |
SMD*_c |
Capacitor* |
$ENDFPLIST |
DRAW |
P 2 0 1 13 -60 -20 60 -20 N |
P 2 0 1 12 -60 20 60 20 N |
X ~ 1 0 100 75 D 40 40 1 1 P |
X ~ 2 0 -100 80 U 40 40 1 1 P |
ENDDRAW |
ENDDEF |
# |
# D_Small |
# |
DEF D_Small D 0 10 N N 1 F N |
F0 "D" -50 80 50 H V L CNN |
F1 "D_Small" -150 -80 50 H V L CNN |
F2 "" 0 0 60 V V C CNN |
F3 "" 0 0 60 V V C CNN |
$FPLIST |
Diode_* |
D-Pak_TO252AA |
*SingleDiode |
*SingleDiode* |
*_Diode_* |
$ENDFPLIST |
DRAW |
P 2 0 1 0 -30 -40 -30 40 N |
P 4 0 1 0 30 -40 -30 0 30 40 30 -40 F |
X K 1 -100 0 70 R 50 50 1 1 P |
X A 2 100 0 70 L 50 50 1 1 P |
ENDDRAW |
ENDDEF |
# |
# GND |
# |
DEF GND #PWR 0 0 Y Y 1 F P |
F0 "#PWR" 0 -250 50 H I C CNN |
F1 "GND" 0 -150 50 H V C CNN |
F2 "" 0 0 60 H V C CNN |
F3 "" 0 0 60 H V C CNN |
DRAW |
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N |
X GND 1 0 0 0 D 50 50 1 1 W N |
ENDDRAW |
ENDDEF |
# |
# GNDA |
# |
DEF GNDA #PWR 0 0 Y Y 1 F P |
F0 "#PWR" 0 -250 50 H I C CNN |
F1 "GNDA" 0 -150 50 H V C CNN |
F2 "" 0 0 60 H V C CNN |
F3 "" 0 0 60 H V C CNN |
DRAW |
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N |
X GNDA 1 0 0 0 D 50 50 1 1 W N |
ENDDRAW |
ENDDEF |
# |
# HEADER_2x03_PARALLEL |
# |
DEF HEADER_2x03_PARALLEL J 0 40 Y Y 1 F N |
F0 "J" 0 -200 60 H V C CNN |
F1 "HEADER_2x03_PARALLEL" 0 200 60 H V C CNN |
F2 "" 0 100 60 H V C CNN |
F3 "" 0 100 60 H V C CNN |
DRAW |
C -50 -100 15 0 1 0 N |
C -50 0 15 0 1 0 N |
C -50 100 15 0 1 0 N |
C 50 -100 15 0 1 0 N |
C 50 0 15 0 1 0 N |
C 50 100 15 0 1 0 N |
S -100 150 100 -150 0 1 0 f |
P 2 0 1 0 -65 -100 -100 -100 N |
P 2 0 1 0 -65 0 -100 0 N |
P 2 0 1 0 -65 100 -100 100 N |
P 2 0 1 0 -35 -100 35 -100 N |
P 2 0 1 0 -35 0 35 0 N |
P 2 0 1 0 -35 100 35 100 N |
X ~ 1 -250 100 150 R 50 50 1 1 I |
X ~ 2 -250 100 150 R 50 50 1 1 I N |
X ~ 3 -250 0 150 R 50 50 1 1 I |
X ~ 4 -250 0 150 R 50 50 1 1 I N |
X ~ 5 -250 -100 150 R 50 50 1 1 I |
X ~ 6 -250 -100 150 R 50 50 1 1 I N |
ENDDRAW |
ENDDEF |
# |
# HOLE |
# |
DEF HOLE M 0 40 N N 1 F N |
F0 "M" 0 100 60 H V C CNN |
F1 "HOLE" 0 -100 60 H V C CNN |
F2 "" 0 0 60 H V C CNN |
F3 "" 0 0 60 H V C CNN |
DRAW |
C 0 0 25 0 1 10 N |
X ~ 1 50 0 25 L 50 50 1 1 I |
ENDDRAW |
ENDDEF |
# |
# VCC |
# |
DEF VCC #PWR 0 0 Y Y 1 F P |
F0 "#PWR" 0 -150 50 H I C CNN |
F1 "VCC" 0 150 50 H V C CNN |
F2 "" 0 0 60 H V C CNN |
F3 "" 0 0 60 H V C CNN |
DRAW |
C 0 75 25 0 1 0 N |
P 2 0 1 0 0 0 0 50 N |
X VCC 1 0 0 0 U 50 50 1 1 W N |
ENDDRAW |
ENDDEF |
# |
#End Library |
/Modules/ADconverters/BRIDGEADC01A/SCH_PCB/BRIDGEADC01A.bak |
---|
0,0 → 1,282 |
EESchema Schematic File Version 2 |
LIBS:74xgxx |
LIBS:74xx |
LIBS:ac-dc |
LIBS:actel |
LIBS:adc-dac |
LIBS:Altera |
LIBS:analog_devices |
LIBS:analog_switches |
LIBS:atmel |
LIBS:audio |
LIBS:brooktre |
LIBS:cmos4000 |
LIBS:cmos_ieee |
LIBS:conn |
LIBS:contrib |
LIBS:cypress |
LIBS:dc-dc |
LIBS:device |
LIBS:digital-audio |
LIBS:diode |
LIBS:display |
LIBS:dsp |
LIBS:elec-unifil |
LIBS:ESD_Protection |
LIBS:freescale |
LIBS:ftdi |
LIBS:gennum |
LIBS:graphic |
LIBS:hc11 |
LIBS:intel |
LIBS:interface |
LIBS:ir |
LIBS:Lattice |
LIBS:linear |
LIBS:logo |
LIBS:maxim |
LIBS:memory |
LIBS:microchip_dspic33dsc |
LIBS:microchip |
LIBS:microchip_pic10mcu |
LIBS:microchip_pic12mcu |
LIBS:microchip_pic16mcu |
LIBS:microchip_pic18mcu |
LIBS:microchip_pic32mcu |
LIBS:microcontrollers |
LIBS:mlab_header |
LIBS:mlab_mechanical |
LIBS:motor_drivers |
LIBS:motorola |
LIBS:msp430 |
LIBS:nordicsemi |
LIBS:nxp_armmcu |
LIBS:onsemi |
LIBS:opto |
LIBS:Oscillators |
LIBS:philips |
LIBS:powerint |
LIBS:power |
LIBS:Power_Management |
LIBS:pspice |
LIBS:references |
LIBS:regul |
LIBS:relays |
LIBS:rfcom |
LIBS:sensors |
LIBS:silabs |
LIBS:siliconi |
LIBS:stm32 |
LIBS:stm8 |
LIBS:supertex |
LIBS:switches |
LIBS:texas |
LIBS:transf |
LIBS:transistors |
LIBS:ttl_ieee |
LIBS:valves |
LIBS:video |
LIBS:Xicor |
LIBS:xilinx |
LIBS:Zilog |
LIBS:module-cache |
EELAYER 25 0 |
EELAYER END |
$Descr A4 11693 8268 |
encoding utf-8 |
Sheet 1 1 |
Title "NAME" |
Date "%F" |
Rev "REV" |
Comp "Mlab www.mlab.cz" |
Comment1 "VERSION" |
Comment2 "Short description \\nTwo lines are maximum" |
Comment3 "nickname <email@example.com>" |
Comment4 "BSD" |
$EndDescr |
$Comp |
L HEADER_2x03_PARALLEL J1 |
U 1 1 549D65BC |
P 10550 1050 |
F 0 "J1" H 10550 850 60 0000 C CNN |
F 1 "Umin ... Umax" H 10550 1250 60 0000 C CNN |
F 2 "" H 10550 1150 60 0000 C CNN |
F 3 "" H 10550 1150 60 0000 C CNN |
1 10550 1050 |
1 0 0 -1 |
$EndComp |
$Comp |
L VCC #PWR1 |
U 1 1 549D7353 |
P 9350 1000 |
F 0 "#PWR1" H 9350 850 60 0001 C CNN |
F 1 "VCC" H 9350 1150 60 0000 C CNN |
F 2 "" H 9350 1000 60 0000 C CNN |
F 3 "" H 9350 1000 60 0000 C CNN |
1 9350 1000 |
1 0 0 -1 |
$EndComp |
$Comp |
L GND #PWR2 |
U 1 1 549D73B2 |
P 9350 1400 |
F 0 "#PWR2" H 9350 1150 60 0001 C CNN |
F 1 "GND" H 9350 1250 60 0000 C CNN |
F 2 "" H 9350 1400 60 0000 C CNN |
F 3 "" H 9350 1400 60 0000 C CNN |
1 9350 1400 |
1 0 0 -1 |
$EndComp |
Text Notes 9200 1700 0 60 ~ 0 |
POWER INPUT |
$Comp |
L HOLE M1 |
U 1 1 549D7549 |
P 10050 1900 |
F 0 "M1" V 9950 1900 60 0000 C CNN |
F 1 "HOLE" H 10050 1800 60 0001 C CNN |
F 2 "" H 10050 1900 60 0000 C CNN |
F 3 "" H 10050 1900 60 0000 C CNN |
1 10050 1900 |
0 -1 -1 0 |
$EndComp |
$Comp |
L HOLE M2 |
U 1 1 549D7628 |
P 10250 1900 |
F 0 "M2" V 10150 1900 60 0000 C CNN |
F 1 "HOLE" H 10250 1800 60 0001 C CNN |
F 2 "" H 10250 1900 60 0000 C CNN |
F 3 "" H 10250 1900 60 0000 C CNN |
1 10250 1900 |
0 -1 -1 0 |
$EndComp |
$Comp |
L HOLE M3 |
U 1 1 549D7646 |
P 10450 1900 |
F 0 "M3" V 10350 1900 60 0000 C CNN |
F 1 "HOLE" H 10450 1800 60 0001 C CNN |
F 2 "" H 10450 1900 60 0000 C CNN |
F 3 "" H 10450 1900 60 0000 C CNN |
1 10450 1900 |
0 -1 -1 0 |
$EndComp |
$Comp |
L HOLE M4 |
U 1 1 549D7665 |
P 10650 1900 |
F 0 "M4" V 10550 1900 60 0000 C CNN |
F 1 "HOLE" H 10650 1800 60 0001 C CNN |
F 2 "" H 10650 1900 60 0000 C CNN |
F 3 "" H 10650 1900 60 0000 C CNN |
1 10650 1900 |
0 -1 -1 0 |
$EndComp |
$Comp |
L GND #PWR3 |
U 1 1 549D770F |
P 10850 1850 |
F 0 "#PWR3" H 10850 1600 60 0001 C CNN |
F 1 "GND" H 10850 1700 60 0000 C CNN |
F 2 "" H 10850 1850 60 0000 C CNN |
F 3 "" H 10850 1850 60 0000 C CNN |
1 10850 1850 |
1 0 0 -1 |
$EndComp |
Wire Wire Line |
10850 1850 10850 1800 |
Wire Wire Line |
10850 1800 10050 1800 |
Wire Wire Line |
10050 1800 10050 1850 |
Wire Wire Line |
10250 1850 10250 1800 |
Connection ~ 10250 1800 |
Wire Wire Line |
10450 1850 10450 1800 |
Connection ~ 10450 1800 |
Wire Wire Line |
10650 1850 10650 1800 |
Connection ~ 10650 1800 |
Wire Notes Line |
9950 1750 10950 1750 |
Wire Notes Line |
10950 1750 10950 2150 |
Wire Notes Line |
10950 2150 9950 2150 |
Wire Notes Line |
9950 2150 9950 1750 |
Text Notes 9950 2150 0 60 ~ 0 |
MOUNTING HOLES |
$Comp |
L D_Small D1 |
U 1 1 55622FB7 |
P 9950 1200 |
F 0 "D1" V 10050 1200 50 0000 R CNN |
F 1 "D_Small" V 9850 1200 50 0000 R CNN |
F 2 "" V 9950 1200 60 0000 C CNN |
F 3 "" V 9950 1200 60 0000 C CNN |
1 9950 1200 |
0 -1 -1 0 |
$EndComp |
$Comp |
L C_Small C2 |
U 1 1 5562302C |
P 9650 1200 |
F 0 "C2" H 9650 1300 50 0000 L CNN |
F 1 "100nF" H 9650 1100 50 0000 L CNN |
F 2 "" H 9650 1200 60 0000 C CNN |
F 3 "" H 9650 1200 60 0000 C CNN |
1 9650 1200 |
1 0 0 -1 |
$EndComp |
$Comp |
L CP_Small C1 |
U 1 1 55623093 |
P 9350 1200 |
F 0 "C1" H 9350 1300 50 0000 L CNN |
F 1 "C/U" H 9350 1100 50 0000 L CNN |
F 2 "" H 9350 1200 60 0000 C CNN |
F 3 "" H 9350 1200 60 0000 C CNN |
1 9350 1200 |
1 0 0 -1 |
$EndComp |
Wire Wire Line |
10300 1050 9350 1050 |
Wire Wire Line |
9350 1000 9350 1100 |
Connection ~ 9350 1050 |
Wire Wire Line |
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Connection ~ 9650 1050 |
Wire Wire Line |
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Connection ~ 9950 1050 |
Wire Wire Line |
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Wire Wire Line |
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Wire Wire Line |
10250 1350 9350 1350 |
Wire Wire Line |
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Connection ~ 9350 1350 |
Wire Wire Line |
9650 1300 9650 1350 |
Connection ~ 9650 1350 |
Wire Wire Line |
9950 1300 9950 1350 |
Connection ~ 9950 1350 |
Wire Wire Line |
10300 1150 10250 1150 |
Connection ~ 10250 1150 |
Wire Notes Line |
10950 750 10950 1700 |
Wire Notes Line |
10950 1700 9200 1700 |
Wire Notes Line |
9200 1700 9200 750 |
Wire Notes Line |
9200 750 10950 750 |
$EndSCHEMATC |
/Modules/ADconverters/BRIDGEADC01A/SCH_PCB/BRIDGEADC01A.cmp |
---|
0,0 → 1,59 |
Cmp-Mod V01 Created by Cvpcb (2015-04-05 BZR 5577)-product date = Ne 24. květen 2015, 22:17:13 CEST |
BeginCmp |
TimeStamp = /549D6FF1; |
Reference = C1; |
ValeurCmp = C/U; |
IdModule = ; |
EndCmp |
BeginCmp |
TimeStamp = /549D6F9A; |
Reference = C2; |
ValeurCmp = 100nF; |
IdModule = ; |
EndCmp |
BeginCmp |
TimeStamp = /549D660A; |
Reference = D1; |
ValeurCmp = DIODE; |
IdModule = ; |
EndCmp |
BeginCmp |
TimeStamp = /549D65BC; |
Reference = J1; |
ValeurCmp = Umin ... Umax; |
IdModule = Pin_Header_Rect_Pads:Straight_2x03; |
EndCmp |
BeginCmp |
TimeStamp = /549D7549; |
Reference = M1; |
ValeurCmp = HOLE; |
IdModule = Mlab_Mechanical:MountingHole_3mm; |
EndCmp |
BeginCmp |
TimeStamp = /549D7628; |
Reference = M2; |
ValeurCmp = HOLE; |
IdModule = Mlab_Mechanical:MountingHole_3mm; |
EndCmp |
BeginCmp |
TimeStamp = /549D7646; |
Reference = M3; |
ValeurCmp = HOLE; |
IdModule = Mlab_Mechanical:MountingHole_3mm; |
EndCmp |
BeginCmp |
TimeStamp = /549D7665; |
Reference = M4; |
ValeurCmp = HOLE; |
IdModule = Mlab_Mechanical:MountingHole_3mm; |
EndCmp |
EndListe |
/Modules/ADconverters/BRIDGEADC01A/SCH_PCB/BRIDGEADC01A.kicad_pcb |
---|
0,0 → 1,114 |
(kicad_pcb (version 4) (host pcbnew "(2015-04-05 BZR 5577)-product") |
(general |
(links 0) |
(no_connects 0) |
(area 0 0 0 0) |
(thickness 1.6) |
(drawings 0) |
(tracks 0) |
(zones 0) |
(modules 0) |
(nets 1) |
) |
(page A4) |
(title_block |
(title NAME) |
(date "%d. %m. %Y") |
(rev REV) |
(company "Mlab www.mlab.cz") |
(comment 1 VERSION) |
(comment 2 "Short description\\nTwo lines are maximum") |
(comment 3 "nickname <email@example.com>") |
) |
(layers |
(0 F.Cu signal) |
(31 B.Cu signal) |
(32 B.Adhes user) |
(33 F.Adhes user) |
(34 B.Paste user) |
(35 F.Paste user) |
(36 B.SilkS user) |
(37 F.SilkS user) |
(38 B.Mask user) |
(39 F.Mask user) |
(40 Dwgs.User user) |
(41 Cmts.User user) |
(42 Eco1.User user) |
(43 Eco2.User user) |
(44 Edge.Cuts user) |
(45 Margin user) |
(46 B.CrtYd user) |
(47 F.CrtYd user) |
(48 B.Fab user) |
(49 F.Fab user) |
) |
(setup |
(last_trace_width 0.25) |
(trace_clearance 0.2) |
(zone_clearance 0.508) |
(zone_45_only no) |
(trace_min 0.2) |
(segment_width 0.2) |
(edge_width 0.15) |
(via_size 0.6) |
(via_drill 0.4) |
(via_min_size 0.4) |
(via_min_drill 0.3) |
(uvia_size 0.3) |
(uvia_drill 0.1) |
(uvias_allowed no) |
(uvia_min_size 0.2) |
(uvia_min_drill 0.1) |
(pcb_text_width 0.3) |
(pcb_text_size 1.5 1.5) |
(mod_edge_width 0.15) |
(mod_text_size 1 1) |
(mod_text_width 0.15) |
(pad_size 1.524 1.524) |
(pad_drill 0.762) |
(pad_to_mask_clearance 0.2) |
(aux_axis_origin 0 0) |
(visible_elements FFFFFF7F) |
(pcbplotparams |
(layerselection 0x00030_80000001) |
(usegerberextensions false) |
(excludeedgelayer true) |
(linewidth 0.150000) |
(plotframeref false) |
(viasonmask false) |
(mode 1) |
(useauxorigin false) |
(hpglpennumber 1) |
(hpglpenspeed 20) |
(hpglpendiameter 15) |
(hpglpenoverlay 2) |
(psnegative false) |
(psa4output false) |
(plotreference true) |
(plotvalue true) |
(plotinvisibletext false) |
(padsonsilk false) |
(subtractmaskfromsilk false) |
(outputformat 1) |
(mirror false) |
(drillshape 1) |
(scaleselection 1) |
(outputdirectory "")) |
) |
(net 0 "") |
(net_class Default "This is the default net class." |
(clearance 0.2) |
(trace_width 0.25) |
(via_dia 0.6) |
(via_drill 0.4) |
(uvia_dia 0.3) |
(uvia_drill 0.1) |
) |
) |
/Modules/ADconverters/BRIDGEADC01A/SCH_PCB/BRIDGEADC01A.net |
---|
0,0 → 1,125 |
(export (version D) |
(design |
(source /home/ondra6ak/Documents/kicad-mlab/template/mlab-default/mlab-default.sch) |
(date Pá 26. prosinec 2014, 15:39:47 CET) |
(tool "Eeschema (2014-12-23 BZR 5337)-product")) |
(components |
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