Subversion Repositories – MLAB

/Modules/ARM/ODROID-U3/ @ HEAD   →   /Modules/ARM/ODROID-U3 @ 3814

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/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER-cache.lib
0,0 → 1,210
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# +1.8V
#
DEF +1.8V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 140 20 H I C CNN
F1 "+1.8V" 0 110 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
ALIAS 1V8
DRAW
P 3 0 0 0 0 0 0 40 0 40 N
X +1.8V 1 0 0 0 U 20 20 0 0 W N
C 0 60 20 0 1 0 N
ENDDRAW
ENDDEF
#
# +5V
#
DEF +5V #PWR 0 40 Y Y 1 F P
F0 "#PWR" 0 90 20 H I C CNN
F1 "+5V" 0 90 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
X +5V 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 4 0 1 0 0 0 0 30 0 30 0 30 N
ENDDRAW
ENDDEF
#
# CONN1_1
#
DEF CONN1_1 J 0 40 Y N 1 F N
F0 "J" 50 50 50 H V C CNN
F1 "CONN1_1" 100 -50 40 H V C CNN
F2 "" 50 -50 60 H V C CNN
F3 "" 50 -50 60 H V C CNN
DRAW
X P1 1 -300 50 250 R 60 60 1 1 P I
ENDDRAW
ENDDEF
#
# CP2
#
DEF CP2 C 0 10 N Y 1 F N
F0 "C" 0 100 40 H V L CNN
F1 "CP2" 6 -85 40 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
SM*
C?
C1-1
$ENDFPLIST
DRAW
S -90 20 -90 40 0 1 0 N
S -90 20 90 20 0 1 0 N
S -70 90 -30 90 0 1 0 N
S -50 70 -50 110 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
S 90 40 -90 40 0 1 0 N
S 90 40 90 20 0 1 0 N
X ~ 1 0 200 160 D 40 40 1 1 P
X ~ 2 0 -200 160 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# DIODESCH
#
DEF DIODESCH D 0 40 N N 1 F N
F0 "D" 0 100 40 H V C CNN
F1 "DIODESCH" 0 -100 40 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
D?
S*
$ENDFPLIST
DRAW
P 3 0 1 0 -50 50 50 0 -50 -50 F
P 6 0 1 8 75 25 75 50 50 50 50 -50 25 -50 25 -25 N
X A 1 -200 0 150 R 40 40 1 1 P
X K 2 200 0 150 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF ~GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
F1 "GND" 0 -70 30 H I C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X GND 1 0 0 0 U 30 30 1 1 W N
ENDDRAW
ENDDEF
#
# HEADER_2x01_PARALLEL
#
DEF HEADER_2x01_PARALLEL J 0 40 Y Y 1 F N
F0 "J" 0 -100 60 H V C CNN
F1 "HEADER_2x01_PARALLEL" 0 100 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C -50 0 15 0 1 0 N
C 50 0 15 0 1 0 N
S -100 50 100 -50 0 1 0 f
P 2 0 1 0 -65 0 -100 0 N
P 2 0 1 0 -35 0 35 0 N
X ~ 1 -250 0 150 R 50 50 1 1 I
X ~ 2 -250 0 150 R 50 50 1 1 I N
ENDDRAW
ENDDEF
#
# HEADER_2x02
#
DEF HEADER_2x02 J 0 40 Y Y 1 F N
F0 "J" 0 -150 60 H V C CNN
F1 "HEADER_2x02" 0 150 60 H V C CNN
F2 "" 0 50 60 H V C CNN
F3 "" 0 50 60 H V C CNN
DRAW
C -50 -50 15 0 1 0 N
C -50 50 15 0 1 0 N
C 50 -50 15 0 1 0 N
C 50 50 15 0 1 0 N
S -100 100 100 -100 0 1 0 f
P 2 0 1 0 -65 -50 -100 -50 N
P 2 0 1 0 -65 50 -100 50 N
P 2 0 1 0 65 -50 100 -50 N
P 2 0 1 0 65 50 100 50 N
X ~ 1 -250 50 150 R 50 50 1 1 I
X ~ 2 -250 -50 150 R 50 50 1 1 I
X ~ 3 250 50 150 L 50 50 1 1 I
X ~ 4 250 -50 150 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# HEADER_2x03_PARALLEL
#
DEF HEADER_2x03_PARALLEL J 0 40 Y Y 1 F N
F0 "J" 0 -200 60 H V C CNN
F1 "HEADER_2x03_PARALLEL" 0 200 60 H V C CNN
F2 "" 0 100 60 H V C CNN
F3 "" 0 100 60 H V C CNN
DRAW
C -50 -100 15 0 1 0 N
C -50 0 15 0 1 0 N
C -50 100 15 0 1 0 N
C 50 -100 15 0 1 0 N
C 50 0 15 0 1 0 N
C 50 100 15 0 1 0 N
S -100 150 100 -150 0 1 0 f
P 2 0 1 0 -65 -100 -100 -100 N
P 2 0 1 0 -65 0 -100 0 N
P 2 0 1 0 -65 100 -100 100 N
P 2 0 1 0 -35 -100 35 -100 N
P 2 0 1 0 -35 0 35 0 N
P 2 0 1 0 -35 100 35 100 N
X ~ 1 -250 100 150 R 50 50 1 1 I
X ~ 2 -250 0 150 R 50 50 1 1 I
X ~ 3 -250 -100 150 R 50 50 1 1 I
X ~ 4 -250 -100 150 R 50 50 1 1 I N
X ~ 5 -250 0 150 R 50 50 1 1 I N
X ~ 6 -250 100 150 R 50 50 1 1 I N
ENDDRAW
ENDDEF
#
# HEADER_2x04
#
DEF HEADER_2x04 J 0 40 Y Y 1 F N
F0 "J" 0 -250 60 H V C CNN
F1 "HEADER_2x04" 0 250 60 H V C CNN
F2 "" 0 150 60 H V C CNN
F3 "" 0 150 60 H V C CNN
DRAW
C -50 -150 15 0 1 0 N
C -50 -50 15 0 1 0 N
C -50 50 15 0 1 0 N
C -50 150 15 0 1 0 N
C 50 -150 15 0 1 0 N
C 50 -50 15 0 1 0 N
C 50 50 15 0 1 0 N
C 50 150 15 0 1 0 N
S -100 200 100 -200 0 1 0 f
P 2 0 1 0 -65 -150 -100 -150 N
P 2 0 1 0 -65 -50 -100 -50 N
P 2 0 1 0 -65 50 -100 50 N
P 2 0 1 0 -65 150 -100 150 N
P 2 0 1 0 65 -150 100 -150 N
P 2 0 1 0 65 -50 100 -50 N
P 2 0 1 0 65 50 100 50 N
P 2 0 1 0 65 150 100 150 N
X ~ 1 250 150 150 L 50 50 1 1 I
X ~ 2 -250 150 150 R 50 50 1 1 I
X ~ 3 250 50 150 L 50 50 1 1 I
X ~ 4 -250 50 150 R 50 50 1 1 I
X ~ 5 250 -50 150 L 50 50 1 1 I
X ~ 6 -250 -50 150 R 50 50 1 1 I
X ~ 7 250 -150 150 L 50 50 1 1 I
X ~ 8 -250 -150 150 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.bak
0,0 → 1,569
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:U3_MLAB_ADAPTER-cache
EELAYER 24 0
EELAYER END
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encoding utf-8
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Date ""
Rev ""
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Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
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P 3600 3400
F 0 "J6" H 3600 3150 60 0000 C CNN
F 1 "IOS_PORT_#1" H 3600 3650 60 0000 C CNN
F 2 "" H 3600 3550 60 0000 C CNN
F 3 "" H 3600 3550 60 0000 C CNN
1 3600 3400
1 0 0 -1
$EndComp
$Comp
L HEADER_2x02 J11
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P 7550 3300
F 0 "J11" H 7550 3500 60 0000 C CNN
F 1 "IO_PORT_#2" H 7550 3100 60 0000 C CNN
F 2 "" H 7550 3350 60 0000 C CNN
F 3 "" H 7550 3350 60 0000 C CNN
1 7550 3300
1 0 0 -1
$EndComp
$Comp
L HEADER_2x03_PARALLEL J1
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P 1750 5900
F 0 "J1" H 1750 5700 60 0000 C CNN
F 1 "5V POWER" H 1750 6100 60 0000 C CNN
F 2 "" H 1750 6000 60 0000 C CNN
F 3 "" H 1750 6000 60 0000 C CNN
1 1750 5900
-1 0 0 -1
$EndComp
$Comp
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F 1 "GND" H 2100 6080 30 0001 C CNN
F 2 "" H 2100 6150 60 0000 C CNN
F 3 "" H 2100 6150 60 0000 C CNN
1 2100 6150
1 0 0 -1
$EndComp
$Comp
L +5V #PWR02
U 1 1 5485FEBD
P 2750 5750
F 0 "#PWR02" H 2750 5840 20 0001 C CNN
F 1 "+5V" H 2750 5840 30 0000 C CNN
F 2 "" H 2750 5750 60 0000 C CNN
F 3 "" H 2750 5750 60 0000 C CNN
1 2750 5750
1 0 0 -1
$EndComp
$Comp
L DIODESCH D1
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F 0 "D1" H 2400 6250 40 0000 C CNN
F 1 "DIODESCH" H 2400 6050 40 0000 C CNN
F 2 "" H 2400 6150 60 0000 C CNN
F 3 "" H 2400 6150 60 0000 C CNN
1 2400 6150
0 -1 -1 0
$EndComp
$Comp
L GND #PWR03
U 1 1 5485FF80
P 2400 6450
F 0 "#PWR03" H 2400 6450 30 0001 C CNN
F 1 "GND" H 2400 6380 30 0001 C CNN
F 2 "" H 2400 6450 60 0000 C CNN
F 3 "" H 2400 6450 60 0000 C CNN
1 2400 6450
1 0 0 -1
$EndComp
$Comp
L GND #PWR04
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F 0 "#PWR04" H 2750 6450 30 0001 C CNN
F 1 "GND" H 2750 6380 30 0001 C CNN
F 2 "" H 2750 6450 60 0000 C CNN
F 3 "" H 2750 6450 60 0000 C CNN
1 2750 6450
1 0 0 -1
$EndComp
$Comp
L CP2 C1
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P 2750 6150
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F 1 "CP2" H 2756 6065 40 0000 L CNN
F 2 "" H 2788 6000 30 0000 C CNN
F 3 "" H 2750 6150 60 0000 C CNN
1 2750 6150
1 0 0 -1
$EndComp
Wire Wire Line
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Wire Wire Line
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Connection ~ 2400 5900
Connection ~ 2750 5900
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
2100 5800 2000 5800
Wire Wire Line
2000 6000 2100 6000
Connection ~ 2100 6000
Wire Wire Line
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$Comp
L HEADER_2x03_PARALLEL J5
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F 0 "J5" H 3550 5700 60 0000 C CNN
F 1 "1,8V CPU Core" H 3550 6100 60 0000 C CNN
F 2 "" H 3550 6000 60 0000 C CNN
F 3 "" H 3550 6000 60 0000 C CNN
1 3550 5900
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$EndComp
$Comp
L GND #PWR05
U 1 1 548601B0
P 3900 6150
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F 1 "GND" H 3900 6080 30 0001 C CNN
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F 3 "" H 3900 6150 60 0000 C CNN
1 3900 6150
1 0 0 -1
$EndComp
$Comp
L DIODESCH D2
U 1 1 548601BC
P 4200 6150
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F 1 "DIODESCH" H 4200 6050 40 0000 C CNN
F 2 "" H 4200 6150 60 0000 C CNN
F 3 "" H 4200 6150 60 0000 C CNN
1 4200 6150
0 -1 -1 0
$EndComp
$Comp
L GND #PWR06
U 1 1 548601C2
P 4200 6450
F 0 "#PWR06" H 4200 6450 30 0001 C CNN
F 1 "GND" H 4200 6380 30 0001 C CNN
F 2 "" H 4200 6450 60 0000 C CNN
F 3 "" H 4200 6450 60 0000 C CNN
1 4200 6450
1 0 0 -1
$EndComp
$Comp
L GND #PWR07
U 1 1 548601C8
P 4550 6450
F 0 "#PWR07" H 4550 6450 30 0001 C CNN
F 1 "GND" H 4550 6380 30 0001 C CNN
F 2 "" H 4550 6450 60 0000 C CNN
F 3 "" H 4550 6450 60 0000 C CNN
1 4550 6450
1 0 0 -1
$EndComp
$Comp
L CP2 C2
U 1 1 548601CE
P 4550 6150
F 0 "C2" H 4550 6250 40 0000 L CNN
F 1 "CP2" H 4556 6065 40 0000 L CNN
F 2 "" H 4588 6000 30 0000 C CNN
F 3 "" H 4550 6150 60 0000 C CNN
1 4550 6150
1 0 0 -1
$EndComp
Wire Wire Line
3800 5900 4550 5900
Wire Wire Line
4200 5900 4200 5950
Connection ~ 4200 5900
Connection ~ 4550 5900
Wire Wire Line
4200 6350 4200 6450
Wire Wire Line
4550 6350 4550 6450
Wire Wire Line
3900 5800 3900 6150
Wire Wire Line
3900 5800 3800 5800
Wire Wire Line
3800 6000 3900 6000
Connection ~ 3900 6000
Wire Wire Line
4550 5650 4550 5950
$Comp
L +1.8V #PWR08
U 1 1 5486039E
P 4550 5650
F 0 "#PWR08" H 4550 5790 20 0001 C CNN
F 1 "+1.8V" H 4550 5760 30 0000 C CNN
F 2 "" H 4550 5650 60 0000 C CNN
F 3 "" H 4550 5650 60 0000 C CNN
1 4550 5650
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J12
U 1 1 54860610
P 8350 3100
F 0 "J12" H 8350 3200 60 0000 C CNN
F 1 "#SS" H 8600 3100 60 0000 C CNN
F 2 "" H 8350 3100 60 0000 C CNN
F 3 "" H 8350 3100 60 0000 C CNN
1 8350 3100
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J13
U 1 1 54860710
P 8350 3500
F 0 "J13" H 8350 3600 60 0000 C CNN
F 1 "MISO" H 8600 3500 60 0000 C CNN
F 2 "" H 8350 3500 60 0000 C CNN
F 3 "" H 8350 3500 60 0000 C CNN
1 8350 3500
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J10
U 1 1 54860825
P 6650 3500
F 0 "J10" H 6650 3400 60 0000 C CNN
F 1 "MOSI" H 6900 3500 60 0000 C CNN
F 2 "" H 6650 3500 60 0000 C CNN
F 3 "" H 6650 3500 60 0000 C CNN
1 6650 3500
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J9
U 1 1 5486082B
P 6650 3150
F 0 "J9" H 6650 3050 60 0000 C CNN
F 1 "SCLK" H 6900 3150 60 0000 C CNN
F 2 "" H 6650 3150 60 0000 C CNN
F 3 "" H 6650 3150 60 0000 C CNN
1 6650 3150
-1 0 0 1
$EndComp
Wire Wire Line
7800 3350 8000 3350
Wire Wire Line
8000 3350 8000 3500
Wire Wire Line
8000 3500 8100 3500
Wire Wire Line
7800 3250 8000 3250
Wire Wire Line
8000 3250 8000 3100
Wire Wire Line
8000 3100 8100 3100
Wire Wire Line
7300 3250 7150 3250
Wire Wire Line
7150 3250 7150 3150
Wire Wire Line
7150 3150 6900 3150
Wire Wire Line
6900 3500 7150 3500
Wire Wire Line
7150 3500 7150 3350
Wire Wire Line
7150 3350 7300 3350
$Comp
L +5V #PWR09
U 1 1 54860E24
P 4100 2950
F 0 "#PWR09" H 4100 3040 20 0001 C CNN
F 1 "+5V" H 4100 3040 30 0000 C CNN
F 2 "" H 4100 2950 60 0000 C CNN
F 3 "" H 4100 2950 60 0000 C CNN
1 4100 2950
1 0 0 -1
$EndComp
Wire Wire Line
4100 2950 4100 3550
Wire Wire Line
4100 3550 3850 3550
$Comp
L +1.8V #PWR010
U 1 1 54860E81
P 3950 2950
F 0 "#PWR010" H 3950 3090 20 0001 C CNN
F 1 "+1.8V" H 3950 3060 30 0000 C CNN
F 2 "" H 3950 2950 60 0000 C CNN
F 3 "" H 3950 2950 60 0000 C CNN
1 3950 2950
1 0 0 -1
$EndComp
Wire Wire Line
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Wire Wire Line
3950 3250 3950 2950
$Comp
L HEADER_2x01_PARALLEL J2
U 1 1 5486108C
P 2550 3100
F 0 "J2" H 2550 3000 60 0000 C CNN
F 1 "GPIO199" H 2900 3100 60 0000 C CNN
F 2 "" H 2550 3100 60 0000 C CNN
F 3 "" H 2550 3100 60 0000 C CNN
1 2550 3100
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J3
U 1 1 54861113
P 2550 3300
F 0 "J3" H 2550 3200 60 0000 C CNN
F 1 "GPIO200" H 2900 3300 60 0000 C CNN
F 2 "" H 2550 3300 60 0000 C CNN
F 3 "" H 2550 3300 60 0000 C CNN
1 2550 3300
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J4
U 1 1 54861163
P 2550 3500
F 0 "J4" H 2550 3400 60 0000 C CNN
F 1 "GPIO204" H 2900 3500 60 0000 C CNN
F 2 "" H 2550 3500 60 0000 C CNN
F 3 "" H 2550 3500 60 0000 C CNN
1 2550 3500
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J8
U 1 1 5486130F
P 4950 3500
F 0 "J8" H 4950 3600 60 0000 C CNN
F 1 "UART_TX" H 5300 3500 60 0000 C CNN
F 2 "" H 4950 3500 60 0000 C CNN
F 3 "" H 4950 3500 60 0000 C CNN
1 4950 3500
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J7
U 1 1 54861315
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F 1 "UART_RX" H 5300 3300 60 0000 C CNN
F 2 "" H 4950 3300 60 0000 C CNN
F 3 "" H 4950 3300 60 0000 C CNN
1 4950 3300
1 0 0 -1
$EndComp
Wire Wire Line
3850 3450 4350 3450
Wire Wire Line
2800 3100 2950 3100
Wire Wire Line
2950 3100 2950 3250
Wire Wire Line
2950 3250 3350 3250
Wire Wire Line
3350 3350 2900 3350
Wire Wire Line
2900 3350 2900 3300
Wire Wire Line
2900 3300 2800 3300
Wire Wire Line
2800 3500 2900 3500
Wire Wire Line
2900 3500 2900 3450
Wire Wire Line
2900 3450 3350 3450
Wire Wire Line
4350 3450 4350 3500
Wire Wire Line
4350 3500 4700 3500
Wire Wire Line
4700 3300 4350 3300
Wire Wire Line
4350 3300 4350 3350
Wire Wire Line
4350 3350 3850 3350
$Comp
L GND #PWR011
U 1 1 54861F1A
P 3250 3650
F 0 "#PWR011" H 3250 3650 30 0001 C CNN
F 1 "GND" H 3250 3580 30 0001 C CNN
F 2 "" H 3250 3650 60 0000 C CNN
F 3 "" H 3250 3650 60 0000 C CNN
1 3250 3650
1 0 0 -1
$EndComp
Wire Wire Line
3250 3550 3250 3650
Wire Wire Line
3350 3550 3250 3550
$Comp
L CONN1_1 J15
U 1 1 54862A8F
P 8500 4700
F 0 "J15" H 8450 4850 50 0000 C CNN
F 1 "M3" H 8550 4750 40 0000 C CNN
F 2 "" H 8550 4650 60 0000 C CNN
F 3 "" H 8550 4650 60 0000 C CNN
1 8500 4700
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J14
U 1 1 54862BF8
P 8500 4550
F 0 "J14" H 8450 4700 50 0000 C CNN
F 1 "M3" H 8550 4600 40 0000 C CNN
F 2 "" H 8550 4500 60 0000 C CNN
F 3 "" H 8550 4500 60 0000 C CNN
1 8500 4550
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J18
U 1 1 54862E2F
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F 2 "" H 8550 5100 60 0000 C CNN
F 3 "" H 8550 5100 60 0000 C CNN
1 8500 5150
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J16
U 1 1 54862E35
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F 0 "J16" H 8450 5000 50 0000 C CNN
F 1 "M3" H 8550 4900 40 0000 C CNN
F 2 "" H 8550 4800 60 0000 C CNN
F 3 "" H 8550 4800 60 0000 C CNN
1 8500 4850
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J17
U 1 1 54862E8B
P 8500 5000
F 0 "J17" H 8450 5150 50 0000 C CNN
F 1 "M3" H 8550 5050 40 0000 C CNN
F 2 "" H 8550 4950 60 0000 C CNN
F 3 "" H 8550 4950 60 0000 C CNN
1 8500 5000
1 0 0 -1
$EndComp
$Comp
L GND #PWR012
U 1 1 54863035
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F 1 "GND" H 8100 5180 30 0001 C CNN
F 2 "" H 8100 5250 60 0000 C CNN
F 3 "" H 8100 5250 60 0000 C CNN
1 8100 5250
1 0 0 -1
$EndComp
Wire Wire Line
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Wire Wire Line
8200 4650 8100 4650
Connection ~ 8100 4650
Wire Wire Line
8100 4800 8200 4800
Connection ~ 8100 4800
Wire Wire Line
8100 4950 8200 4950
Connection ~ 8100 4950
Wire Wire Line
8100 5100 8200 5100
Connection ~ 8100 5100
Wire Notes Line
7700 4200 9700 4200
Wire Notes Line
9700 4200 9700 5700
Wire Notes Line
9700 5700 7700 5700
Wire Notes Line
7700 5700 7700 4200
Text Notes 8700 4950 0 60 ~ 0
MECHANICAL HOLES \n3,2mm diameter
Wire Wire Line
8100 4500 8100 5250
Text Label 6900 3150 0 60 ~ 0
SCLK
Text Label 6900 3500 0 60 ~ 0
MOSI
Text Label 7800 3250 0 60 ~ 0
#SS
Text Label 7800 3350 0 60 ~ 0
MISO
Text Label 4350 3300 0 60 ~ 0
UART_RX
Text Label 4350 3500 0 60 ~ 0
UART_TX
Text Label 2950 3250 0 60 ~ 0
GPIO199
Text Label 2950 3350 0 60 ~ 0
GPIO200
Text Label 2950 3450 0 60 ~ 0
GPIO204
$EndSCHEMATC

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.kicad_pcb
0,0 → 1,762
(kicad_pcb (version 4) (host pcbnew "(2014-08-29 BZR 5106)-product")
(general
(links 43)
(no_connects 43)
(area 0 0 0 0)
(thickness 1.6)
(drawings 0)
(tracks 40)
(zones 0)
(modules 22)
(nets 13)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.4)
(user_trace_width 0.3)
(user_trace_width 0.4)
(user_trace_width 0.5)
(trace_clearance 0.254)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.254)
(segment_width 0.2)
(edge_width 0.1)
(via_size 0.889)
(via_drill 0.635)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.3 1.3)
(pad_drill 0.7)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(visible_elements 7FFFFF7F)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 GND)
(net 2 +5V)
(net 3 +1.8V)
(net 4 /GPIO199)
(net 5 /GPIO200)
(net 6 /GPIO204)
(net 7 /UART_TX)
(net 8 /UART_RX)
(net 9 /SCLK)
(net 10 /MOSI)
(net 11 /#SS)
(net 12 /MISO)
(net_class Default "Toto je výchozí třída sítě."
(clearance 0.254)
(trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net +1.8V)
(add_net +5V)
(add_net /#SS)
(add_net /GPIO199)
(add_net /GPIO200)
(add_net /GPIO204)
(add_net /MISO)
(add_net /MOSI)
(add_net /SCLK)
(add_net /UART_RX)
(add_net /UART_TX)
(add_net GND)
)
(module MLAB_C:TantalC_SizeC_Reflow (layer B.Cu) (tedit 54799D04) (tstamp 548711C6)
(at 69.85 1.27)
(descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
(tags "Tantal Cap. , Size C, EIA-6032, Reflow,")
(path /5485FFA7)
(attr smd)
(fp_text reference C1 (at 0 3) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value CP2 (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -4 1) (end -4 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 -1) (end -2 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 1) (end -2 1) (layer B.SilkS) (width 0.15))
(fp_text user + (at -4 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -5 3) (end -5 1) (layer B.SilkS) (width 0.15))
(fp_line (start -5 2) (end -4 2) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 2 0) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -2 0) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 2 +5V))
(model MLAB_3D/Capacitors/c_tant_C.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module MLAB_C:TantalC_SizeC_Reflow (layer B.Cu) (tedit 54799D04) (tstamp 548711CC)
(at 73.66 -10.16)
(descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
(tags "Tantal Cap. , Size C, EIA-6032, Reflow,")
(path /548601CE)
(attr smd)
(fp_text reference C2 (at 0 3) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value CP2 (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -4 1) (end -4 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 -1) (end -2 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 1) (end -2 1) (layer B.SilkS) (width 0.15))
(fp_text user + (at -4 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -5 3) (end -5 1) (layer B.SilkS) (width 0.15))
(fp_line (start -5 2) (end -4 2) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 2 0) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -2 0) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 3 +1.8V))
(model MLAB_3D/Capacitors/c_tant_C.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module MLAB_D:Diode-MiniMELF_Standard (layer B.Cu) (tedit 547999ED) (tstamp 548711D2)
(at 74.93 -15.24)
(descr "Diode Mini-MELF Standard")
(tags "Diode Mini-MELF Standard")
(path /5485FEF7)
(attr smd)
(fp_text reference D1 (at 0 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value DIODESCH (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 0) (end 0 1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -1) (end 0 0) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_text user A (at -1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_text user K (at 1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(pad 1 smd rect (at -1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 2 +5V))
(model MLAB_3D/Diodes/MiniMELF_DO213AA.wrl
(at (xyz 0 0 0))
(scale (xyz 0 0 0))
(rotate (xyz 0 0 0))
)
)
(module MLAB_D:Diode-MiniMELF_Standard (layer B.Cu) (tedit 547999ED) (tstamp 548711D8)
(at 72.39 -3.81)
(descr "Diode Mini-MELF Standard")
(tags "Diode Mini-MELF Standard")
(path /548601BC)
(attr smd)
(fp_text reference D2 (at 0 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value DIODESCH (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 0) (end 0 1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -1) (end 0 0) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_text user A (at -1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_text user K (at 1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(pad 1 smd rect (at -1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 3 +1.8V))
(model MLAB_3D/Diodes/MiniMELF_DO213AA.wrl
(at (xyz 0 0 0))
(scale (xyz 0 0 0))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x03 placed (layer F.Cu) (tedit 54870C46) (tstamp 548711E8)
(at 15.494 -7.874 90)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F9FC)
(fp_text reference J1 (at 0 -3.81 90) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "5V POWER" (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -2.54 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole rect (at 0 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 3 thru_hole rect (at 2.54 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 4 thru_hole rect (at 2.54 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole rect (at 0 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 6 thru_hole rect (at -2.54 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x03.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 548711F2)
(at 0.508 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /5486108C)
(fp_text reference J2 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO199 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 548711FC)
(at 3.048 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54861113)
(fp_text reference J3 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO200 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871206)
(at 5.588 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54861163)
(fp_text reference J4 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO204 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x03 placed (layer F.Cu) (tedit 54870C46) (tstamp 54871216)
(at 12.192 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /548601AA)
(fp_text reference J5 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "1,8V CPU Core" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -2.54 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 3 thru_hole rect (at 2.54 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 4 thru_hole rect (at 2.54 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 6 thru_hole rect (at -2.54 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x03.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:2mm_Pin_Header_Straight_2x04 (layer F.Cu) (tedit 5487093A) (tstamp 54871228)
(at 13.5 -0.6 90)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F8D0)
(fp_text reference J6 (at -0.127 -5.207 90) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value IOS_PORT_#1 (at 0 5.334 90) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -2 -4) (end 0 -4) (layer F.SilkS) (width 0.254))
(fp_line (start 0 4) (end 2 4) (layer F.SilkS) (width 0.254))
(fp_line (start 2 4) (end 2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start 0 -4) (end 2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start -2 4) (end -2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start -2 4) (end 0 4) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -1 -3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 2 thru_hole rect (at 1 -3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(pad 3 thru_hole rect (at -1 -1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(pad 4 thru_hole rect (at 1 -1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(pad 5 thru_hole rect (at -1 1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(pad 6 thru_hole rect (at 1 1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(pad 7 thru_hole rect (at -1 3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 8 thru_hole rect (at 1 3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x04.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 90))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871232)
(at -2.032 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54861315)
(fp_text reference J7 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value UART_RX (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54874B71)
(at -4.572 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /5486130F)
(fp_text reference J8 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value UART_TX (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54874ADA)
(at -14.732 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /5486082B)
(fp_text reference J9 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value SCLK (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871250)
(at -12.192 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54860825)
(fp_text reference J10 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value MOSI (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:2mm_Pin_Header_Straight_2x02 (layer F.Cu) (tedit 54870948) (tstamp 5487125E)
(at -15 -0.6)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F97F)
(fp_text reference J11 (at -0.127 -2.921) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value IO_PORT_#2 (at 0 3.302) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -2 -2) (end 0 -2) (layer F.SilkS) (width 0.254))
(fp_line (start 0 2) (end 2 2) (layer F.SilkS) (width 0.254))
(fp_line (start 2 2) (end 2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start 0 -2) (end 2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start -2 2) (end 0 2) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -1 -1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(pad 2 thru_hole rect (at 1 -1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(pad 3 thru_hole rect (at -1 1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(pad 4 thru_hole rect (at 1 1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(model Pin_Headers/Pin_Header_Straight_2x02.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871268)
(at -7.112 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54860610)
(fp_text reference J12 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "#SS" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871272)
(at -9.652 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54860710)
(fp_text reference J13 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value MISO (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 54871277)
(at 20.32 -15.44)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862BF8)
(fp_text reference J14 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 5487127C)
(at -20.32 -15.44)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862A8F)
(fp_text reference J15 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 54871281)
(at 20.5 0)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E35)
(fp_text reference J16 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 54871286)
(at -20.5 0)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E8B)
(fp_text reference J17 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 5487128B)
(at 0 -5.28)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E2F)
(fp_text reference J18 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(segment (start 10.5 -1.6) (end 10.5 -4.232) (width 0.4) (layer B.Cu) (net 4))
(segment (start 10.5 -4.232) (end 0.508 -14.224) (width 0.4) (layer B.Cu) (net 4))
(segment (start 12.5 -1.6) (end 12.5 -2.65) (width 0.4) (layer B.Cu) (net 5))
(segment (start 12.5 -2.65) (end 11.15401 -3.99599) (width 0.4) (layer B.Cu) (net 5))
(segment (start 11.15401 -3.99599) (end 11.15401 -4.502898) (width 0.4) (layer B.Cu) (net 5))
(segment (start 11.15401 -4.502898) (end 3.048 -12.608908) (width 0.4) (layer B.Cu) (net 5))
(segment (start 3.048 -12.608908) (end 3.048 -14.224) (width 0.4) (layer B.Cu) (net 5))
(segment (start 14.5 -1.6) (end 14.5 -1.756) (width 0.4) (layer B.Cu) (net 6))
(segment (start 14.5 -1.756) (end 11.80802 -4.44798) (width 0.4) (layer B.Cu) (net 6))
(segment (start 11.80802 -4.44798) (end 11.80802 -6.77848) (width 0.4) (layer B.Cu) (net 6))
(segment (start 11.80802 -6.77848) (end 5.588 -12.9985) (width 0.4) (layer B.Cu) (net 6))
(segment (start 5.588 -12.9985) (end 5.588 -14.224) (width 0.4) (layer B.Cu) (net 6))
(segment (start 14.5 0.4) (end 14.5 1.45) (width 0.4) (layer B.Cu) (net 7))
(segment (start 14.5 1.45) (end 13.791989 2.158011) (width 0.4) (layer B.Cu) (net 7))
(segment (start 13.791989 2.158011) (end 1.222009 2.158011) (width 0.4) (layer B.Cu) (net 7))
(segment (start 1.222009 2.158011) (end -4.572 -3.635998) (width 0.4) (layer B.Cu) (net 7))
(segment (start -4.572 -3.635998) (end -4.572 -12.9985) (width 0.4) (layer B.Cu) (net 7))
(segment (start -4.572 -12.9985) (end -4.572 -14.224) (width 0.4) (layer B.Cu) (net 7))
(segment (start 12.5 0.4) (end 12.5 1.45) (width 0.4) (layer B.Cu) (net 8))
(segment (start 12.5 1.45) (end 12.445999 1.504001) (width 0.4) (layer B.Cu) (net 8))
(segment (start 12.445999 1.504001) (end 9.486799 1.504001) (width 0.4) (layer B.Cu) (net 8))
(segment (start 9.486799 1.504001) (end 4.200001 -3.782797) (width 0.4) (layer B.Cu) (net 8))
(segment (start 4.200001 -3.782797) (end 4.200001 -7.991999) (width 0.4) (layer B.Cu) (net 8))
(segment (start 4.200001 -7.991999) (end -2.032 -14.224) (width 0.4) (layer B.Cu) (net 8))
(segment (start -14.732 -14.224) (end -14.732 -16.764) (width 0.4) (layer B.Cu) (net 9))
(segment (start -14.732 -14.224) (end -14.732 -2.868) (width 0.4) (layer B.Cu) (net 9))
(segment (start -14.732 -2.868) (end -16 -1.6) (width 0.4) (layer B.Cu) (net 9))
(segment (start -12.192 -14.224) (end -12.192 -16.764) (width 0.4) (layer B.Cu) (net 10))
(segment (start -14 -1.6) (end -14 -12.416) (width 0.4) (layer B.Cu) (net 10))
(segment (start -14 -12.416) (end -12.192 -14.224) (width 0.4) (layer B.Cu) (net 10))
(segment (start -16 0.4) (end -16 1.45) (width 0.4) (layer B.Cu) (net 11))
(segment (start -16 1.45) (end -15.945999 1.504001) (width 0.4) (layer B.Cu) (net 11))
(segment (start -15.945999 1.504001) (end -12.986799 1.504001) (width 0.4) (layer B.Cu) (net 11))
(segment (start -12.986799 1.504001) (end -7.112 -4.370798) (width 0.4) (layer B.Cu) (net 11))
(segment (start -7.112 -4.370798) (end -7.112 -14.224) (width 0.4) (layer B.Cu) (net 11))
(segment (start -9.652 -14.224) (end -9.652 -16.764) (width 0.4) (layer B.Cu) (net 12))
(segment (start -14 0.4) (end -12.95 0.4) (width 0.4) (layer B.Cu) (net 12))
(segment (start -12.95 0.4) (end -9.652 -2.898) (width 0.4) (layer B.Cu) (net 12))
(segment (start -9.652 -2.898) (end -9.652 -12.9985) (width 0.4) (layer B.Cu) (net 12))
(segment (start -9.652 -12.9985) (end -9.652 -14.224) (width 0.4) (layer B.Cu) (net 12))
)

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.kicad_pcb-bak
0,0 → 1,718
(kicad_pcb (version 4) (host pcbnew "(2014-08-29 BZR 5106)-product")
(general
(links 43)
(no_connects 43)
(area 0 0 0 0)
(thickness 1.6)
(drawings 0)
(tracks 0)
(zones 0)
(modules 22)
(nets 13)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.254)
(trace_clearance 0.254)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.254)
(segment_width 0.2)
(edge_width 0.1)
(via_size 0.889)
(via_drill 0.635)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.3 1.3)
(pad_drill 0.7)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 GND)
(net 2 +5V)
(net 3 +1.8V)
(net 4 /GPIO199)
(net 5 /GPIO200)
(net 6 /GPIO204)
(net 7 /UART_TX)
(net 8 /UART_RX)
(net 9 /SCLK)
(net 10 /MOSI)
(net 11 /#SS)
(net 12 /MISO)
(net_class Default "Toto je výchozí třída sítě."
(clearance 0.254)
(trace_width 0.254)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net +1.8V)
(add_net +5V)
(add_net /#SS)
(add_net /GPIO199)
(add_net /GPIO200)
(add_net /GPIO204)
(add_net /MISO)
(add_net /MOSI)
(add_net /SCLK)
(add_net /UART_RX)
(add_net /UART_TX)
(add_net GND)
)
(module MLAB_C:TantalC_SizeC_Reflow (layer B.Cu) (tedit 54799D04) (tstamp 548711C6)
(at 69.85 1.27)
(descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
(tags "Tantal Cap. , Size C, EIA-6032, Reflow,")
(path /5485FFA7)
(attr smd)
(fp_text reference C1 (at 0 3) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value CP2 (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -4 1) (end -4 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 -1) (end -2 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 1) (end -2 1) (layer B.SilkS) (width 0.15))
(fp_text user + (at -4 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -5 3) (end -5 1) (layer B.SilkS) (width 0.15))
(fp_line (start -5 2) (end -4 2) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 2 0) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -2 0) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 2 +5V))
(model MLAB_3D/Capacitors/c_tant_C.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module MLAB_C:TantalC_SizeC_Reflow (layer B.Cu) (tedit 54799D04) (tstamp 548711CC)
(at 73.66 -10.16)
(descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
(tags "Tantal Cap. , Size C, EIA-6032, Reflow,")
(path /548601CE)
(attr smd)
(fp_text reference C2 (at 0 3) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value CP2 (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -4 1) (end -4 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 -1) (end -2 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 1) (end -2 1) (layer B.SilkS) (width 0.15))
(fp_text user + (at -4 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -5 3) (end -5 1) (layer B.SilkS) (width 0.15))
(fp_line (start -5 2) (end -4 2) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 2 0) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -2 0) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 3 +1.8V))
(model MLAB_3D/Capacitors/c_tant_C.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module MLAB_D:Diode-MiniMELF_Standard (layer B.Cu) (tedit 547999ED) (tstamp 548711D2)
(at 74.93 -15.24)
(descr "Diode Mini-MELF Standard")
(tags "Diode Mini-MELF Standard")
(path /5485FEF7)
(attr smd)
(fp_text reference D1 (at 0 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value DIODESCH (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 0) (end 0 1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -1) (end 0 0) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_text user A (at -1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_text user K (at 1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(pad 1 smd rect (at -1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 2 +5V))
(model MLAB_3D/Diodes/MiniMELF_DO213AA.wrl
(at (xyz 0 0 0))
(scale (xyz 0 0 0))
(rotate (xyz 0 0 0))
)
)
(module MLAB_D:Diode-MiniMELF_Standard (layer B.Cu) (tedit 547999ED) (tstamp 548711D8)
(at 72.39 -3.81)
(descr "Diode Mini-MELF Standard")
(tags "Diode Mini-MELF Standard")
(path /548601BC)
(attr smd)
(fp_text reference D2 (at 0 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value DIODESCH (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 0) (end 0 1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -1) (end 0 0) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_text user A (at -1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_text user K (at 1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(pad 1 smd rect (at -1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 3 +1.8V))
(model MLAB_3D/Diodes/MiniMELF_DO213AA.wrl
(at (xyz 0 0 0))
(scale (xyz 0 0 0))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x03 placed (layer F.Cu) (tedit 54870C46) (tstamp 548711E8)
(at 15.494 -7.874 90)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F9FC)
(fp_text reference J1 (at 0 -3.81 90) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "5V POWER" (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -2.54 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole rect (at 0 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 3 thru_hole rect (at 2.54 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 4 thru_hole rect (at 2.54 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole rect (at 0 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 6 thru_hole rect (at -2.54 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x03.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 548711F2)
(at 0.254 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /5486108C)
(fp_text reference J2 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO199 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 548711FC)
(at 2.794 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54861113)
(fp_text reference J3 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO200 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871206)
(at 5.334 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54861163)
(fp_text reference J4 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO204 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x03 placed (layer F.Cu) (tedit 54870C46) (tstamp 54871216)
(at 12.192 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /548601AA)
(fp_text reference J5 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "1,8V CPU Core" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -2.54 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 3 thru_hole rect (at 2.54 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 4 thru_hole rect (at 2.54 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 6 thru_hole rect (at -2.54 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x03.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:2mm_Pin_Header_Straight_2x04 (layer F.Cu) (tedit 5487093A) (tstamp 54871228)
(at 13.5 -0.6 90)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F8D0)
(fp_text reference J6 (at -0.127 -5.207 90) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value IOS_PORT_#1 (at 0 5.334 90) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -2 -4) (end 0 -4) (layer F.SilkS) (width 0.254))
(fp_line (start 0 4) (end 2 4) (layer F.SilkS) (width 0.254))
(fp_line (start 2 4) (end 2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start 0 -4) (end 2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start -2 4) (end -2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start -2 4) (end 0 4) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -1 -3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 2 thru_hole rect (at 1 -3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(pad 3 thru_hole rect (at -1 -1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(pad 4 thru_hole rect (at 1 -1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(pad 5 thru_hole rect (at -1 1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(pad 6 thru_hole rect (at 1 1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(pad 7 thru_hole rect (at -1 3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 8 thru_hole rect (at 1 3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x04.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 90))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871232)
(at -4.826 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54861315)
(fp_text reference J7 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value UART_RX (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 5487123C)
(at -2.286 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /5486130F)
(fp_text reference J8 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value UART_TX (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871246)
(at -12.446 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /5486082B)
(fp_text reference J9 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value SCLK (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871250)
(at -7.366 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54860825)
(fp_text reference J10 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value MOSI (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:2mm_Pin_Header_Straight_2x02 (layer F.Cu) (tedit 54870948) (tstamp 5487125E)
(at -15 -0.6)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F97F)
(fp_text reference J11 (at -0.127 -2.921) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value IO_PORT_#2 (at 0 3.302) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -2 -2) (end 0 -2) (layer F.SilkS) (width 0.254))
(fp_line (start 0 2) (end 2 2) (layer F.SilkS) (width 0.254))
(fp_line (start 2 2) (end 2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start 0 -2) (end 2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start -2 2) (end 0 2) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -1 -1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(pad 2 thru_hole rect (at 1 -1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(pad 3 thru_hole rect (at -1 1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(pad 4 thru_hole rect (at 1 1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(model Pin_Headers/Pin_Header_Straight_2x02.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871268)
(at -14.986 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54860610)
(fp_text reference J12 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "#SS" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871272)
(at -9.906 -15.494)
(descr "1 pin")
(tags "CONN DEV")
(path /54860710)
(fp_text reference J13 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value MISO (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 54871277)
(at 20.32 -15.44)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862BF8)
(fp_text reference J14 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 5487127C)
(at -20.32 -15.44)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862A8F)
(fp_text reference J15 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 54871281)
(at 20.5 0)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E35)
(fp_text reference J16 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 54871286)
(at -20.5 0)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E8B)
(fp_text reference J17 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 5487128B)
(at 0 -5.28)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E2F)
(fp_text reference J18 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
)

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.net
0,0 → 1,258
(export (version D)
(design
(source D:/Honza/MLAB/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.sch)
(date "9.12.2014 20:10:53")
(tool "Eeschema (2014-08-29 BZR 5106)-product"))
(components
(comp (ref J6)
(value IOS_PORT_#1)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x04))
(sheetpath (names /) (tstamps /))
(tstamp 5485F8D0))
(comp (ref J11)
(value IO_PORT_#2)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x02))
(sheetpath (names /) (tstamps /))
(tstamp 5485F97F))
(comp (ref J1)
(value "5V POWER")
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x03_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 5485F9FC))
(comp (ref D1)
(value DIODESCH)
(libsource (lib device) (part DIODESCH))
(sheetpath (names /) (tstamps /))
(tstamp 5485FEF7))
(comp (ref C1)
(value CP2)
(libsource (lib device) (part CP2))
(sheetpath (names /) (tstamps /))
(tstamp 5485FFA7))
(comp (ref J5)
(value "1,8V CPU Core")
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x03_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 548601AA))
(comp (ref D2)
(value DIODESCH)
(libsource (lib device) (part DIODESCH))
(sheetpath (names /) (tstamps /))
(tstamp 548601BC))
(comp (ref C2)
(value CP2)
(libsource (lib device) (part CP2))
(sheetpath (names /) (tstamps /))
(tstamp 548601CE))
(comp (ref J12)
(value "#SS")
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 54860610))
(comp (ref J13)
(value MISO)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 54860710))
(comp (ref J10)
(value MOSI)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 54860825))
(comp (ref J9)
(value SCLK)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 5486082B))
(comp (ref J2)
(value GPIO199)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 5486108C))
(comp (ref J3)
(value GPIO200)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 54861113))
(comp (ref J4)
(value GPIO204)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 54861163))
(comp (ref J8)
(value UART_TX)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 5486130F))
(comp (ref J7)
(value UART_RX)
(libsource (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL))
(sheetpath (names /) (tstamps /))
(tstamp 54861315))
(comp (ref J15)
(value M3)
(libsource (lib U3_MLAB_ADAPTER-cache) (part CONN1_1))
(sheetpath (names /) (tstamps /))
(tstamp 54862A8F))
(comp (ref J14)
(value M3)
(libsource (lib U3_MLAB_ADAPTER-cache) (part CONN1_1))
(sheetpath (names /) (tstamps /))
(tstamp 54862BF8))
(comp (ref J18)
(value M3)
(libsource (lib U3_MLAB_ADAPTER-cache) (part CONN1_1))
(sheetpath (names /) (tstamps /))
(tstamp 54862E2F))
(comp (ref J16)
(value M3)
(libsource (lib U3_MLAB_ADAPTER-cache) (part CONN1_1))
(sheetpath (names /) (tstamps /))
(tstamp 54862E35))
(comp (ref J17)
(value M3)
(libsource (lib U3_MLAB_ADAPTER-cache) (part CONN1_1))
(sheetpath (names /) (tstamps /))
(tstamp 54862E8B)))
(libparts
(libpart (lib device) (part CP2)
(footprints
(fp SM*)
(fp C?)
(fp C1-1))
(fields
(field (name Reference) C)
(field (name Value) CP2))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
(libpart (lib device) (part DIODESCH)
(description "Diode schottky")
(footprints
(fp D?)
(fp S*))
(fields
(field (name Reference) D)
(field (name Value) DIODESCH))
(pins
(pin (num 1) (name A) (type passive))
(pin (num 2) (name K) (type passive))))
(libpart (lib U3_MLAB_ADAPTER-cache) (part CONN1_1)
(fields
(field (name Reference) J)
(field (name Value) CONN1_1))
(pins
(pin (num 1) (name P1) (type passive))))
(libpart (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x01_PARALLEL)
(fields
(field (name Reference) J)
(field (name Value) HEADER_2x01_PARALLEL))
(pins
(pin (num 1) (name ~) (type input))
(pin (num 2) (name ~) (type input))))
(libpart (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x02)
(fields
(field (name Reference) J)
(field (name Value) HEADER_2x02))
(pins
(pin (num 1) (name ~) (type input))
(pin (num 2) (name ~) (type input))
(pin (num 3) (name ~) (type input))
(pin (num 4) (name ~) (type input))))
(libpart (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x03_PARALLEL)
(fields
(field (name Reference) J)
(field (name Value) HEADER_2x03_PARALLEL))
(pins
(pin (num 1) (name ~) (type input))
(pin (num 2) (name ~) (type input))
(pin (num 3) (name ~) (type input))
(pin (num 4) (name ~) (type input))
(pin (num 5) (name ~) (type input))
(pin (num 6) (name ~) (type input))))
(libpart (lib U3_MLAB_ADAPTER-cache) (part HEADER_2x04)
(fields
(field (name Reference) J)
(field (name Value) HEADER_2x04))
(pins
(pin (num 1) (name ~) (type input))
(pin (num 2) (name ~) (type input))
(pin (num 3) (name ~) (type input))
(pin (num 4) (name ~) (type input))
(pin (num 5) (name ~) (type input))
(pin (num 6) (name ~) (type input))
(pin (num 7) (name ~) (type input))
(pin (num 8) (name ~) (type input)))))
(libraries
(library (logical device)
(uri C:\KiCad\kicad\share\library\device.lib))
(library (logical U3_MLAB_ADAPTER-cache)
(uri D:\Honza\MLAB\Modules\ARM\ODROID-U3\SCH_PCB\U3_MLAB_ADAPTER-cache.lib)))
(nets
(net (code 1) (name +1.8V)
(node (ref C2) (pin 1))
(node (ref D2) (pin 2))
(node (ref J6) (pin 1))
(node (ref J5) (pin 5))
(node (ref J5) (pin 2)))
(net (code 2) (name /GPIO199)
(node (ref J2) (pin 1))
(node (ref J6) (pin 2))
(node (ref J2) (pin 2)))
(net (code 3) (name /GPIO204)
(node (ref J6) (pin 6))
(node (ref J4) (pin 1))
(node (ref J4) (pin 2)))
(net (code 4) (name /MISO)
(node (ref J13) (pin 2))
(node (ref J13) (pin 1))
(node (ref J11) (pin 4)))
(net (code 5) (name /#SS)
(node (ref J11) (pin 3))
(node (ref J12) (pin 2))
(node (ref J12) (pin 1)))
(net (code 6) (name /SCLK)
(node (ref J9) (pin 1))
(node (ref J9) (pin 2))
(node (ref J11) (pin 1)))
(net (code 7) (name /MOSI)
(node (ref J11) (pin 2))
(node (ref J10) (pin 1))
(node (ref J10) (pin 2)))
(net (code 8) (name +5V)
(node (ref D1) (pin 2))
(node (ref C1) (pin 1))
(node (ref J6) (pin 7))
(node (ref J1) (pin 2))
(node (ref J1) (pin 5)))
(net (code 9) (name /UART_RX)
(node (ref J7) (pin 1))
(node (ref J7) (pin 2))
(node (ref J6) (pin 3)))
(net (code 10) (name /UART_TX)
(node (ref J8) (pin 1))
(node (ref J6) (pin 5))
(node (ref J8) (pin 2)))
(net (code 11) (name /GPIO200)
(node (ref J3) (pin 2))
(node (ref J3) (pin 1))
(node (ref J6) (pin 4)))
(net (code 12) (name GND)
(node (ref J5) (pin 1))
(node (ref J5) (pin 3))
(node (ref J5) (pin 4))
(node (ref J5) (pin 6))
(node (ref D2) (pin 1))
(node (ref C2) (pin 2))
(node (ref J14) (pin 1))
(node (ref D1) (pin 1))
(node (ref C1) (pin 2))
(node (ref J17) (pin 1))
(node (ref J16) (pin 1))
(node (ref J18) (pin 1))
(node (ref J15) (pin 1))
(node (ref J6) (pin 8))
(node (ref J1) (pin 1))
(node (ref J1) (pin 3))
(node (ref J1) (pin 4))
(node (ref J1) (pin 6)))))

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.sch
0,0 → 1,569
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:U3_MLAB_ADAPTER-cache
EELAYER 24 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
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F 2 "" H 3600 3550 60 0000 C CNN
F 3 "" H 3600 3550 60 0000 C CNN
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1 0 0 -1
$EndComp
$Comp
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F 1 "IO_PORT_#2" H 7550 3100 60 0000 C CNN
F 2 "" H 7550 3350 60 0000 C CNN
F 3 "" H 7550 3350 60 0000 C CNN
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$EndComp
$Comp
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$EndComp
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$EndComp
$Comp
L +5V #PWR02
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F 3 "" H 2750 5750 60 0000 C CNN
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$EndComp
$Comp
L DIODESCH D1
U 1 1 5485FEF7
P 2400 6150
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F 1 "DIODESCH" H 2400 6050 40 0000 C CNN
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$EndComp
$Comp
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$EndComp
$Comp
L GND #PWR04
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$Comp
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Wire Wire Line
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Wire Wire Line
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$Comp
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$EndComp
$Comp
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$Comp
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$Comp
L GND #PWR06
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$Comp
L GND #PWR07
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L CP2 C2
U 1 1 548601CE
P 4550 6150
F 0 "C2" H 4550 6250 40 0000 L CNN
F 1 "CP2" H 4556 6065 40 0000 L CNN
F 2 "" H 4588 6000 30 0000 C CNN
F 3 "" H 4550 6150 60 0000 C CNN
1 4550 6150
1 0 0 -1
$EndComp
Wire Wire Line
3800 5900 4550 5900
Wire Wire Line
4200 5900 4200 5950
Connection ~ 4200 5900
Connection ~ 4550 5900
Wire Wire Line
4200 6350 4200 6450
Wire Wire Line
4550 6350 4550 6450
Wire Wire Line
3900 5800 3900 6150
Wire Wire Line
3900 5800 3800 5800
Wire Wire Line
3800 6000 3900 6000
Connection ~ 3900 6000
Wire Wire Line
4550 5650 4550 5950
$Comp
L +1.8V #PWR08
U 1 1 5486039E
P 4550 5650
F 0 "#PWR08" H 4550 5790 20 0001 C CNN
F 1 "+1.8V" H 4550 5760 30 0000 C CNN
F 2 "" H 4550 5650 60 0000 C CNN
F 3 "" H 4550 5650 60 0000 C CNN
1 4550 5650
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J12
U 1 1 54860610
P 8350 3100
F 0 "J12" H 8350 3200 60 0000 C CNN
F 1 "#SS" H 8600 3100 60 0000 C CNN
F 2 "" H 8350 3100 60 0000 C CNN
F 3 "" H 8350 3100 60 0000 C CNN
1 8350 3100
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J13
U 1 1 54860710
P 8350 3500
F 0 "J13" H 8350 3600 60 0000 C CNN
F 1 "MISO" H 8600 3500 60 0000 C CNN
F 2 "" H 8350 3500 60 0000 C CNN
F 3 "" H 8350 3500 60 0000 C CNN
1 8350 3500
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J10
U 1 1 54860825
P 6650 3500
F 0 "J10" H 6650 3400 60 0000 C CNN
F 1 "MOSI" H 6900 3500 60 0000 C CNN
F 2 "" H 6650 3500 60 0000 C CNN
F 3 "" H 6650 3500 60 0000 C CNN
1 6650 3500
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J9
U 1 1 5486082B
P 6650 3150
F 0 "J9" H 6650 3050 60 0000 C CNN
F 1 "SCLK" H 6900 3150 60 0000 C CNN
F 2 "" H 6650 3150 60 0000 C CNN
F 3 "" H 6650 3150 60 0000 C CNN
1 6650 3150
-1 0 0 1
$EndComp
Wire Wire Line
7800 3350 8000 3350
Wire Wire Line
8000 3350 8000 3500
Wire Wire Line
8000 3500 8100 3500
Wire Wire Line
7800 3250 8000 3250
Wire Wire Line
8000 3250 8000 3100
Wire Wire Line
8000 3100 8100 3100
Wire Wire Line
7300 3250 7150 3250
Wire Wire Line
7150 3250 7150 3150
Wire Wire Line
7150 3150 6900 3150
Wire Wire Line
6900 3500 7150 3500
Wire Wire Line
7150 3500 7150 3350
Wire Wire Line
7150 3350 7300 3350
$Comp
L +5V #PWR09
U 1 1 54860E24
P 4100 2950
F 0 "#PWR09" H 4100 3040 20 0001 C CNN
F 1 "+5V" H 4100 3040 30 0000 C CNN
F 2 "" H 4100 2950 60 0000 C CNN
F 3 "" H 4100 2950 60 0000 C CNN
1 4100 2950
1 0 0 -1
$EndComp
Wire Wire Line
4100 2950 4100 3550
Wire Wire Line
4100 3550 3850 3550
$Comp
L +1.8V #PWR010
U 1 1 54860E81
P 3950 2950
F 0 "#PWR010" H 3950 3090 20 0001 C CNN
F 1 "+1.8V" H 3950 3060 30 0000 C CNN
F 2 "" H 3950 2950 60 0000 C CNN
F 3 "" H 3950 2950 60 0000 C CNN
1 3950 2950
1 0 0 -1
$EndComp
Wire Wire Line
3850 3250 3950 3250
Wire Wire Line
3950 3250 3950 2950
$Comp
L HEADER_2x01_PARALLEL J2
U 1 1 5486108C
P 2550 3100
F 0 "J2" H 2550 3000 60 0000 C CNN
F 1 "GPIO199" H 2900 3100 60 0000 C CNN
F 2 "" H 2550 3100 60 0000 C CNN
F 3 "" H 2550 3100 60 0000 C CNN
1 2550 3100
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J3
U 1 1 54861113
P 2550 3300
F 0 "J3" H 2550 3200 60 0000 C CNN
F 1 "GPIO200" H 2900 3300 60 0000 C CNN
F 2 "" H 2550 3300 60 0000 C CNN
F 3 "" H 2550 3300 60 0000 C CNN
1 2550 3300
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J4
U 1 1 54861163
P 2550 3500
F 0 "J4" H 2550 3400 60 0000 C CNN
F 1 "GPIO204" H 2900 3500 60 0000 C CNN
F 2 "" H 2550 3500 60 0000 C CNN
F 3 "" H 2550 3500 60 0000 C CNN
1 2550 3500
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J8
U 1 1 5486130F
P 4950 3500
F 0 "J8" H 4950 3600 60 0000 C CNN
F 1 "UART_TX" H 5300 3500 60 0000 C CNN
F 2 "" H 4950 3500 60 0000 C CNN
F 3 "" H 4950 3500 60 0000 C CNN
1 4950 3500
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J7
U 1 1 54861315
P 4950 3300
F 0 "J7" H 4950 3400 60 0000 C CNN
F 1 "UART_RX" H 5300 3300 60 0000 C CNN
F 2 "" H 4950 3300 60 0000 C CNN
F 3 "" H 4950 3300 60 0000 C CNN
1 4950 3300
1 0 0 -1
$EndComp
Wire Wire Line
3850 3450 4350 3450
Wire Wire Line
2800 3100 2950 3100
Wire Wire Line
2950 3100 2950 3250
Wire Wire Line
2950 3250 3350 3250
Wire Wire Line
3350 3350 2900 3350
Wire Wire Line
2900 3350 2900 3300
Wire Wire Line
2900 3300 2800 3300
Wire Wire Line
2800 3500 2900 3500
Wire Wire Line
2900 3500 2900 3450
Wire Wire Line
2900 3450 3350 3450
Wire Wire Line
4350 3450 4350 3500
Wire Wire Line
4350 3500 4700 3500
Wire Wire Line
4700 3300 4350 3300
Wire Wire Line
4350 3300 4350 3350
Wire Wire Line
4350 3350 3850 3350
$Comp
L GND #PWR011
U 1 1 54861F1A
P 3250 3650
F 0 "#PWR011" H 3250 3650 30 0001 C CNN
F 1 "GND" H 3250 3580 30 0001 C CNN
F 2 "" H 3250 3650 60 0000 C CNN
F 3 "" H 3250 3650 60 0000 C CNN
1 3250 3650
1 0 0 -1
$EndComp
Wire Wire Line
3250 3550 3250 3650
Wire Wire Line
3350 3550 3250 3550
$Comp
L CONN1_1 J15
U 1 1 54862A8F
P 8500 4700
F 0 "J15" H 8450 4850 50 0000 C CNN
F 1 "M3" H 8550 4750 40 0000 C CNN
F 2 "" H 8550 4650 60 0000 C CNN
F 3 "" H 8550 4650 60 0000 C CNN
1 8500 4700
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J14
U 1 1 54862BF8
P 8500 4550
F 0 "J14" H 8450 4700 50 0000 C CNN
F 1 "M3" H 8550 4600 40 0000 C CNN
F 2 "" H 8550 4500 60 0000 C CNN
F 3 "" H 8550 4500 60 0000 C CNN
1 8500 4550
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J18
U 1 1 54862E2F
P 8500 5150
F 0 "J18" H 8450 5300 50 0000 C CNN
F 1 "M3" H 8550 5200 40 0000 C CNN
F 2 "" H 8550 5100 60 0000 C CNN
F 3 "" H 8550 5100 60 0000 C CNN
1 8500 5150
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J16
U 1 1 54862E35
P 8500 4850
F 0 "J16" H 8450 5000 50 0000 C CNN
F 1 "M3" H 8550 4900 40 0000 C CNN
F 2 "" H 8550 4800 60 0000 C CNN
F 3 "" H 8550 4800 60 0000 C CNN
1 8500 4850
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J17
U 1 1 54862E8B
P 8500 5000
F 0 "J17" H 8450 5150 50 0000 C CNN
F 1 "M3" H 8550 5050 40 0000 C CNN
F 2 "" H 8550 4950 60 0000 C CNN
F 3 "" H 8550 4950 60 0000 C CNN
1 8500 5000
1 0 0 -1
$EndComp
$Comp
L GND #PWR012
U 1 1 54863035
P 8100 5250
F 0 "#PWR012" H 8100 5250 30 0001 C CNN
F 1 "GND" H 8100 5180 30 0001 C CNN
F 2 "" H 8100 5250 60 0000 C CNN
F 3 "" H 8100 5250 60 0000 C CNN
1 8100 5250
1 0 0 -1
$EndComp
Wire Wire Line
8100 4500 8200 4500
Wire Wire Line
8200 4650 8100 4650
Connection ~ 8100 4650
Wire Wire Line
8100 4800 8200 4800
Connection ~ 8100 4800
Wire Wire Line
8100 4950 8200 4950
Connection ~ 8100 4950
Wire Wire Line
8100 5100 8200 5100
Connection ~ 8100 5100
Wire Notes Line
7700 4200 9700 4200
Wire Notes Line
9700 4200 9700 5700
Wire Notes Line
9700 5700 7700 5700
Wire Notes Line
7700 5700 7700 4200
Text Notes 8700 4950 0 60 ~ 0
MECHANICAL HOLES \n3,2mm diameter
Wire Wire Line
8100 4500 8100 5250
Text Label 6900 3150 0 60 ~ 0
SCLK
Text Label 6900 3500 0 60 ~ 0
MOSI
Text Label 7800 3250 0 60 ~ 0
#SS
Text Label 7800 3350 0 60 ~ 0
MISO
Text Label 4350 3300 0 60 ~ 0
UART_RX
Text Label 4350 3500 0 60 ~ 0
UART_TX
Text Label 2950 3250 0 60 ~ 0
GPIO199
Text Label 2950 3350 0 60 ~ 0
GPIO200
Text Label 2950 3450 0 60 ~ 0
GPIO204
$EndSCHEMATC

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.cmp
0,0 → 1,157
Cmp-Mod V01 Created by Cvpcb (2014-10-14 BZR 5188)-product date = 9.12.2014 15:54:31
BeginCmp
TimeStamp = /5485FFA7;
Reference = C1;
ValeurCmp = CP2;
IdModule = MLAB_C:TantalC_SizeC_Reflow;
EndCmp
BeginCmp
TimeStamp = /548601CE;
Reference = C2;
ValeurCmp = CP2;
IdModule = MLAB_C:TantalC_SizeC_Reflow;
EndCmp
BeginCmp
TimeStamp = /5485FEF7;
Reference = D1;
ValeurCmp = DIODESCH;
IdModule = MLAB_D:Diode-MiniMELF_Standard;
EndCmp
BeginCmp
TimeStamp = /548601BC;
Reference = D2;
ValeurCmp = DIODESCH;
IdModule = MLAB_D:Diode-MiniMELF_Standard;
EndCmp
BeginCmp
TimeStamp = /5485F9FC;
Reference = J1;
ValeurCmp = 5V POWER;
IdModule = MLAB_hreb:Pin_Header_Straight_2x03;
EndCmp
BeginCmp
TimeStamp = /5486108C;
Reference = J2;
ValeurCmp = GPIO199;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54861113;
Reference = J3;
ValeurCmp = GPIO200;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54861163;
Reference = J4;
ValeurCmp = GPIO204;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /548601AA;
Reference = J5;
ValeurCmp = 1,8V CPU Core;
IdModule = MLAB_hreb:Pin_Header_Straight_2x03;
EndCmp
BeginCmp
TimeStamp = /5485F8D0;
Reference = J6;
ValeurCmp = IOS_PORT_#1;
IdModule = MLAB_hreb:2mm_Pin_Header_Straight_2x04;
EndCmp
BeginCmp
TimeStamp = /54861315;
Reference = J7;
ValeurCmp = UART_RX;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /5486130F;
Reference = J8;
ValeurCmp = UART_TX;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /5486082B;
Reference = J9;
ValeurCmp = SCLK;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54860825;
Reference = J10;
ValeurCmp = MOSI;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /5485F97F;
Reference = J11;
ValeurCmp = IO_PORT_#2;
IdModule = MLAB_hreb:2mm_Pin_Header_Straight_2x02;
EndCmp
BeginCmp
TimeStamp = /54860610;
Reference = J12;
ValeurCmp = #SS;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54860710;
Reference = J13;
ValeurCmp = MISO;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54862BF8;
Reference = J14;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
BeginCmp
TimeStamp = /54862A8F;
Reference = J15;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
BeginCmp
TimeStamp = /54862E35;
Reference = J16;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
BeginCmp
TimeStamp = /54862E8B;
Reference = J17;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
BeginCmp
TimeStamp = /54862E2F;
Reference = J18;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
EndListe

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.pro
0,0 → 1,66
update=Po 8. prosinec 2014, 20:52:01 CET
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
LibName31=header
LibName32=/home/kaklik/svn/library/KiCAD/symbols/konektory
LibName33=/home/kaklik/svn/library/KiCAD/symbols/Jumpers

/Modules/ARM/ODROID-U3/pdf/U3_mech.PDF
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/ARM/ODROID-U3/DOC/SRC/img/ODROID-U3_QRcode.png
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/ARM/ODROID-U3/DOC/SRC/img/ODROIDU3_MLAB_I2C_connection.JPG
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/ARM/ODROID-U3/PrjInfo.txt
0,0 → 1,15
[InfoShortDescription.en]
ARM computer module
[InfoShortDescription.cs]
Počítač s ARM procesorem
[InfoLongDescription.en]
Computer module for applications which needs full Linux operating system and lot of computing power.
[InfoLongDescription.cs]
Počítač s nízkou spotřebou vhodný pro kontrolní a řídící aplikace, kde je potřebný velký výpočetní výkon a plnohodnotný operační systém Linux.
[InfoBuyUST]
[End]