Subversion Repositories – MLAB

/Modules/ARM/ODROID-U3/SCH_PCB @ HEAD   →   /Modules/ARM/ODROID-U3/SCH_PCB @ 3823

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/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.kicad_pcb
0,0 → 1,926
(kicad_pcb (version 4) (host pcbnew 0.201412101631+5319~19~ubuntu14.04.1-product)
(general
(links 43)
(no_connects 0)
(area 104.4448 30.8356 164.109401 63.065)
(thickness 1.6)
(drawings 19)
(tracks 66)
(zones 0)
(modules 22)
(nets 13)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 1)
(user_trace_width 0.2)
(user_trace_width 0.3)
(user_trace_width 0.4)
(user_trace_width 0.5)
(user_trace_width 0.6)
(user_trace_width 0.8)
(user_trace_width 1)
(trace_clearance 0.15)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.1)
(via_size 0.889)
(via_drill 0.635)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 4 4)
(pad_drill 3)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(grid_origin 132.8166 55.5498)
(visible_elements 7FFFFF7F)
(pcbplotparams
(layerselection 0x01060_80000000)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory ../CAM_PROFI/))
)
(net 0 "")
(net 1 GND)
(net 2 +5V)
(net 3 +1.8V)
(net 4 /GPIO199)
(net 5 /GPIO200)
(net 6 /GPIO204)
(net 7 /UART_TX)
(net 8 /UART_RX)
(net 9 /SCLK)
(net 10 /MOSI)
(net 11 /#SS)
(net 12 /MISO)
(net_class Default "Toto je výchozí třída sítě."
(clearance 0.15)
(trace_width 0.3)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net /#SS)
(add_net /GPIO199)
(add_net /GPIO200)
(add_net /GPIO204)
(add_net /MISO)
(add_net /MOSI)
(add_net /SCLK)
(add_net /UART_RX)
(add_net /UART_TX)
)
(net_class Power ""
(clearance 0.3)
(trace_width 0.5)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net +1.8V)
(add_net +5V)
(add_net GND)
)
(module MLAB_C:TantalC_SizeC_Reflow (layer B.Cu) (tedit 54799D04) (tstamp 548711C6)
(at 147.2946 58.6232 180)
(descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
(tags "Tantal Cap. , Size C, EIA-6032, Reflow,")
(path /5485FFA7)
(attr smd)
(fp_text reference C1 (at 0.3048 -2.1336 180) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value CP2 (at 0 -3 180) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -4 1) (end -4 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 -1) (end -2 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 1) (end -2 1) (layer B.SilkS) (width 0.15))
(fp_text user + (at -4 2 180) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -5 3) (end -5 1) (layer B.SilkS) (width 0.15))
(fp_line (start -5 2) (end -4 2) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 2 0 180) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -2 0 180) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 2 +5V))
(model MLAB_3D/Capacitors/c_tant_C.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module MLAB_C:TantalC_SizeC_Reflow (layer B.Cu) (tedit 54799D04) (tstamp 548711CC)
(at 138.2522 56.1594 180)
(descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
(tags "Tantal Cap. , Size C, EIA-6032, Reflow,")
(path /548601CE)
(attr smd)
(fp_text reference C2 (at 0 3 180) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value CP2 (at 0 -3 180) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -4 1) (end -4 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 -1) (end -2 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 1) (end -2 1) (layer B.SilkS) (width 0.15))
(fp_text user + (at -4 2 180) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -5 3) (end -5 1) (layer B.SilkS) (width 0.15))
(fp_line (start -5 2) (end -4 2) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 2 0 180) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -2 0 180) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 3 +1.8V))
(model MLAB_3D/Capacitors/c_tant_C.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module MLAB_D:Diode-MiniMELF_Standard (layer B.Cu) (tedit 547999ED) (tstamp 54896DB3)
(at 152.1206 50.9778)
(descr "Diode Mini-MELF Standard")
(tags "Diode Mini-MELF Standard")
(path /5485FEF7)
(attr smd)
(fp_text reference D1 (at 0 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value DIODESCH (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 0) (end 0 1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -1) (end 0 0) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_text user A (at -1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_text user K (at 1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(pad 1 smd rect (at -1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 2 +5V))
(model MLAB_3D/Diodes/MiniMELF_DO213AA.wrl
(at (xyz 0 0 0))
(scale (xyz 0 0 0))
(rotate (xyz 0 0 0))
)
)
(module MLAB_D:Diode-MiniMELF_Standard (layer B.Cu) (tedit 547999ED) (tstamp 54896DFE)
(at 128.1176 42.9768 90)
(descr "Diode Mini-MELF Standard")
(tags "Diode Mini-MELF Standard")
(path /548601BC)
(attr smd)
(fp_text reference D2 (at 0 2 90) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value DIODESCH (at 0 -3 90) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 0) (end 0 1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -1) (end 0 0) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_text user A (at -1 -1 90) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_text user K (at 1 -1 90) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(pad 1 smd rect (at -1 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 3 +1.8V))
(model MLAB_3D/Diodes/MiniMELF_DO213AA.wrl
(at (xyz 0 0 0))
(scale (xyz 0 0 0))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x03 placed (layer F.Cu) (tedit 54870C46) (tstamp 54896DC4)
(at 153.1366 47.4218 180)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F9FC)
(fp_text reference J1 (at 1.524 0.127 180) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "5V POWER" (at 0 0 180) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -2.54 1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole rect (at 0 1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 3 thru_hole rect (at 2.54 1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 4 thru_hole rect (at 2.54 -1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole rect (at 0 -1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 6 thru_hole rect (at -2.54 -1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x03.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54896E7D)
(at 137.668 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /5486108C)
(fp_text reference J2 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO199 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54896E93)
(at 142.748 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /54861113)
(fp_text reference J3 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO200 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54896E88)
(at 147.828 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /54861163)
(fp_text reference J4 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO204 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x03 placed (layer F.Cu) (tedit 54870C46) (tstamp 5489807D)
(at 131.6736 41.5798 90)
(descr "1 pin")
(tags "CONN DEV")
(path /548601AA)
(fp_text reference J5 (at -0.127 3.683 90) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "1,8V CPU Core" (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -2.54 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole rect (at 0 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 3 thru_hole rect (at 2.54 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 4 thru_hole rect (at 2.54 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole rect (at 0 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 6 thru_hole rect (at -2.54 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x03.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:2mm_Pin_Header_Straight_2x04 (layer F.Cu) (tedit 5487093A) (tstamp 54871228)
(at 146.3166 54.9498 90)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F8D0)
(fp_text reference J6 (at -3.14 3.645 180) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value IOS_PORT_#1 (at 0 5.334 90) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -2 -4) (end 0 -4) (layer F.SilkS) (width 0.254))
(fp_line (start 0 4) (end 2 4) (layer F.SilkS) (width 0.254))
(fp_line (start 2 4) (end 2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start 0 -4) (end 2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start -2 4) (end -2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start -2 4) (end 0 4) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -1 -3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 2 thru_hole rect (at 1 -3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(pad 3 thru_hole rect (at -1 -1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(pad 4 thru_hole rect (at 1 -1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(pad 5 thru_hole rect (at -1 1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(pad 6 thru_hole rect (at 1 1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(pad 7 thru_hole rect (at -1 3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 8 thru_hole rect (at 1 3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x04.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 90))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54896E72)
(at 140.208 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /54861315)
(fp_text reference J7 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value UART_RX (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54874B71)
(at 145.288 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /5486130F)
(fp_text reference J8 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value UART_TX (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54874ADA)
(at 118.0846 40.0558)
(descr "1 pin")
(tags "CONN DEV")
(path /5486082B)
(fp_text reference J9 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value SCLK (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871250)
(at 120.6246 40.0558)
(descr "1 pin")
(tags "CONN DEV")
(path /54860825)
(fp_text reference J10 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value MOSI (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:2mm_Pin_Header_Straight_2x02 (layer F.Cu) (tedit 54870948) (tstamp 5487125E)
(at 117.8166 54.9498)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F97F)
(fp_text reference J11 (at -0.127 -2.921) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value IO_PORT_#2 (at 0 3.302) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -2 -2) (end 0 -2) (layer F.SilkS) (width 0.254))
(fp_line (start 0 2) (end 2 2) (layer F.SilkS) (width 0.254))
(fp_line (start 2 2) (end 2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start 0 -2) (end 2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start -2 2) (end 0 2) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -1 -1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(pad 2 thru_hole rect (at 1 -1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(pad 3 thru_hole rect (at -1 1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(pad 4 thru_hole rect (at 1 1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(model Pin_Headers/Pin_Header_Straight_2x02.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871268)
(at 125.7046 40.0558)
(descr "1 pin")
(tags "CONN DEV")
(path /54860610)
(fp_text reference J12 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "#SS" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871272)
(at 123.1646 40.0558)
(descr "1 pin")
(tags "CONN DEV")
(path /54860710)
(fp_text reference J13 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value MISO (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 54871277)
(at 153.1366 40.1098)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862BF8)
(fp_text reference J14 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 5487127C)
(at 112.4966 40.1098)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862A8F)
(fp_text reference J15 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 5489719A) (tstamp 54871281)
(at 153.3166 55.5498)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E35)
(fp_text reference J16 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 4 4) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 5489848E) (tstamp 54871286)
(at 112.3166 55.5498)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E8B)
(fp_text reference J17 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 4 4) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 5487128B)
(at 132.8166 50.2698)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862E2F)
(fp_text reference J18 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(gr_text "ODROID-U3 MLAB ADAPTER" (at 132.3086 58.8518) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text MLAB (at 112.6236 47.8028 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text +5V (at 152.6286 51.4858) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text POWER (at 153.3906 43.8658) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.2)))
)
(gr_text GPIO204 (at 147.9296 47.6758 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text TX (at 145.3896 44.3738 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text GPIO200 (at 142.8496 47.6758 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text RX (at 140.3096 44.5008 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text GPIO199 (at 137.7696 47.8028 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text 1.8V (at 131.5466 36.4998) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text "#SS\n" (at 125.7046 45.5168 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text MISO (at 123.2916 46.0248 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text MOSI (at 120.6246 46.0248 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text SCLK (at 118.0846 46.0248 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_line (start 106.807 34.5694) (end 106.8578 34.5694) (angle 90) (layer Edge.Cuts) (width 0.1))
(gr_line (start 107.6726 35.2858) (end 157.9606 35.2858) (angle 90) (layer Edge.Cuts) (width 0.1) (tstamp 54897BDF))
(gr_line (start 157.9606 61.0616) (end 157.9606 35.2858) (angle 90) (layer Edge.Cuts) (width 0.1))
(gr_line (start 107.6726 61.0616) (end 157.9606 61.0616) (angle 90) (layer Edge.Cuts) (width 0.1))
(gr_line (start 107.6726 35.2858) (end 107.6726 61.0616) (angle 90) (layer Edge.Cuts) (width 0.1))
(segment (start 153.1366 48.6918) (end 153.1366 46.1518) (width 1) (layer B.Cu) (net 2))
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(segment (start 142.748 42.6005) (end 145.3166 45.1691) (width 0.5) (layer B.Cu) (net 5))
(segment (start 142.748 41.275) (end 142.748 42.6005) (width 0.5) (layer B.Cu) (net 5))
(segment (start 147.3166 53.9498) (end 147.3166 53.7938) (width 0.4) (layer B.Cu) (net 6))
(segment (start 147.828 38.735) (end 147.828 41.275) (width 0.5) (layer B.Cu) (net 6))
(segment (start 147.828 53.4384) (end 147.3166 53.9498) (width 0.5) (layer B.Cu) (net 6))
(segment (start 147.828 41.275) (end 147.828 53.4384) (width 0.5) (layer B.Cu) (net 6))
(segment (start 147.3136 55.9498) (end 146.366599 55.002799) (width 0.3) (layer B.Cu) (net 7))
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(segment (start 145.288 42.6005) (end 146.366599 43.679099) (width 0.5) (layer B.Cu) (net 7))
(segment (start 145.288 41.275) (end 145.288 42.6005) (width 0.5) (layer B.Cu) (net 7))
(segment (start 145.3166 55.9498) (end 145.3166 55.839798) (width 0.3) (layer B.Cu) (net 8))
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(segment (start 140.208 42.6005) (end 144.366599 46.759099) (width 0.5) (layer B.Cu) (net 8))
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/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.kicad_pcb-bak
0,0 → 1,926
(kicad_pcb (version 4) (host pcbnew 0.201412101631+5319~19~ubuntu14.04.1-product)
(general
(links 43)
(no_connects 0)
(area 104.4448 30.8356 164.109401 63.065)
(thickness 1.6)
(drawings 19)
(tracks 66)
(zones 0)
(modules 22)
(nets 13)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 1)
(user_trace_width 0.2)
(user_trace_width 0.3)
(user_trace_width 0.4)
(user_trace_width 0.5)
(user_trace_width 0.6)
(user_trace_width 0.8)
(user_trace_width 1)
(trace_clearance 0.15)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.1)
(via_size 0.889)
(via_drill 0.635)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 4 4)
(pad_drill 3)
(pad_to_mask_clearance 0)
(aux_axis_origin 0 0)
(grid_origin 132.8166 55.5498)
(visible_elements 7FFFFF7F)
(pcbplotparams
(layerselection 0x01060_80000000)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory ../CAM_PROFI/))
)
(net 0 "")
(net 1 GND)
(net 2 +5V)
(net 3 +1.8V)
(net 4 /GPIO199)
(net 5 /GPIO200)
(net 6 /GPIO204)
(net 7 /UART_TX)
(net 8 /UART_RX)
(net 9 /SCLK)
(net 10 /MOSI)
(net 11 /#SS)
(net 12 /MISO)
(net_class Default "Toto je výchozí třída sítě."
(clearance 0.15)
(trace_width 0.3)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net /#SS)
(add_net /GPIO199)
(add_net /GPIO200)
(add_net /GPIO204)
(add_net /MISO)
(add_net /MOSI)
(add_net /SCLK)
(add_net /UART_RX)
(add_net /UART_TX)
)
(net_class Power ""
(clearance 0.3)
(trace_width 0.5)
(via_dia 0.889)
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net +1.8V)
(add_net +5V)
(add_net GND)
)
(module MLAB_C:TantalC_SizeC_Reflow (layer B.Cu) (tedit 54799D04) (tstamp 548711C6)
(at 147.2946 58.6232 180)
(descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
(tags "Tantal Cap. , Size C, EIA-6032, Reflow,")
(path /5485FFA7)
(attr smd)
(fp_text reference C1 (at 0.3048 -2.1336 180) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value CP2 (at 0 -3 180) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -4 1) (end -4 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 -1) (end -2 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 1) (end -2 1) (layer B.SilkS) (width 0.15))
(fp_text user + (at -4 2 180) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -5 3) (end -5 1) (layer B.SilkS) (width 0.15))
(fp_line (start -5 2) (end -4 2) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 2 0 180) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -2 0 180) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 2 +5V))
(model MLAB_3D/Capacitors/c_tant_C.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module MLAB_C:TantalC_SizeC_Reflow (layer B.Cu) (tedit 54799D04) (tstamp 548711CC)
(at 138.2522 56.1594 180)
(descr "Tantal Cap. , Size C, EIA-6032, Reflow,")
(tags "Tantal Cap. , Size C, EIA-6032, Reflow,")
(path /548601CE)
(attr smd)
(fp_text reference C2 (at 0 3 180) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value CP2 (at 0 -3 180) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -4 1) (end -4 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 -1) (end -2 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 2 1) (end -2 1) (layer B.SilkS) (width 0.15))
(fp_text user + (at -4 2 180) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start -5 3) (end -5 1) (layer B.SilkS) (width 0.15))
(fp_line (start -5 2) (end -4 2) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 2 0 180) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -2 0 180) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 3 +1.8V))
(model MLAB_3D/Capacitors/c_tant_C.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module MLAB_D:Diode-MiniMELF_Standard (layer B.Cu) (tedit 547999ED) (tstamp 54896DB3)
(at 152.1206 50.9778)
(descr "Diode Mini-MELF Standard")
(tags "Diode Mini-MELF Standard")
(path /5485FEF7)
(attr smd)
(fp_text reference D1 (at 0 2) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value DIODESCH (at 0 -3) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 0) (end 0 1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -1) (end 0 0) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_text user A (at -1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_text user K (at 1 -1) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(pad 1 smd rect (at -1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 2 +5V))
(model MLAB_3D/Diodes/MiniMELF_DO213AA.wrl
(at (xyz 0 0 0))
(scale (xyz 0 0 0))
(rotate (xyz 0 0 0))
)
)
(module MLAB_D:Diode-MiniMELF_Standard (layer B.Cu) (tedit 547999ED) (tstamp 54896DFE)
(at 128.1176 42.9768 90)
(descr "Diode Mini-MELF Standard")
(tags "Diode Mini-MELF Standard")
(path /548601BC)
(attr smd)
(fp_text reference D2 (at 0 2 90) (layer B.SilkS)
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_text value DIODESCH (at 0 -3 90) (layer B.SilkS) hide
(effects (font (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 0) (end 0 1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_line (start 0 -1) (end 0 0) (layer B.SilkS) (width 0.15))
(fp_line (start 0 1) (end 0 -1) (layer B.SilkS) (width 0.15))
(fp_text user A (at -1 -1 90) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_text user K (at 1 -1 90) (layer B.SilkS)
(effects (font (size 0 0) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(fp_circle (center 0 0) (end 0 0) (layer B.Adhes) (width 0.15))
(pad 1 smd rect (at -1 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 2 smd rect (at 1 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask)
(net 3 +1.8V))
(model MLAB_3D/Diodes/MiniMELF_DO213AA.wrl
(at (xyz 0 0 0))
(scale (xyz 0 0 0))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x03 placed (layer F.Cu) (tedit 54870C46) (tstamp 54896DC4)
(at 153.1366 47.4218 180)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F9FC)
(fp_text reference J1 (at 1.524 0.127 180) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "5V POWER" (at 0 0 180) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -2.54 1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole rect (at 0 1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 3 thru_hole rect (at 2.54 1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 4 thru_hole rect (at 2.54 -1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole rect (at 0 -1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 6 thru_hole rect (at -2.54 -1.27 180) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x03.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54896E7D)
(at 137.668 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /5486108C)
(fp_text reference J2 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO199 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54896E93)
(at 142.748 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /54861113)
(fp_text reference J3 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO200 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54896E88)
(at 147.828 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /54861163)
(fp_text reference J4 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value GPIO204 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x03 placed (layer F.Cu) (tedit 54870C46) (tstamp 5489807D)
(at 131.6736 41.5798 90)
(descr "1 pin")
(tags "CONN DEV")
(path /548601AA)
(fp_text reference J5 (at -0.127 3.683 90) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "1,8V CPU Core" (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -2.54 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 2 thru_hole rect (at 0 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 3 thru_hole rect (at 2.54 1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 4 thru_hole rect (at 2.54 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(pad 5 thru_hole rect (at 0 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 6 thru_hole rect (at -2.54 -1.27 90) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x03.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:2mm_Pin_Header_Straight_2x04 (layer F.Cu) (tedit 5487093A) (tstamp 54871228)
(at 146.3166 54.9498 90)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F8D0)
(fp_text reference J6 (at -3.394 -0.038 180) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value IOS_PORT_#1 (at 0 5.334 90) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -2 -4) (end 0 -4) (layer F.SilkS) (width 0.254))
(fp_line (start 0 4) (end 2 4) (layer F.SilkS) (width 0.254))
(fp_line (start 2 4) (end 2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start 0 -4) (end 2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start -2 4) (end -2 -4) (layer F.SilkS) (width 0.254))
(fp_line (start -2 4) (end 0 4) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -1 -3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 3 +1.8V))
(pad 2 thru_hole rect (at 1 -3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 4 /GPIO199))
(pad 3 thru_hole rect (at -1 -1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(pad 4 thru_hole rect (at 1 -1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 5 /GPIO200))
(pad 5 thru_hole rect (at -1 1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(pad 6 thru_hole rect (at 1 1 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 6 /GPIO204))
(pad 7 thru_hole rect (at -1 3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 2 +5V))
(pad 8 thru_hole rect (at 1 3 90) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Pin_Headers/Pin_Header_Straight_2x04.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 90))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54896E72)
(at 140.208 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /54861315)
(fp_text reference J7 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value UART_RX (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 8 /UART_RX))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54874B71)
(at 145.288 40.005)
(descr "1 pin")
(tags "CONN DEV")
(path /5486130F)
(fp_text reference J8 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value UART_TX (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 7 /UART_TX))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54874ADA)
(at 118.0846 40.0558)
(descr "1 pin")
(tags "CONN DEV")
(path /5486082B)
(fp_text reference J9 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value SCLK (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871250)
(at 120.6246 40.0558)
(descr "1 pin")
(tags "CONN DEV")
(path /54860825)
(fp_text reference J10 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value MOSI (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:2mm_Pin_Header_Straight_2x02 (layer F.Cu) (tedit 54870948) (tstamp 5487125E)
(at 117.8166 54.9498)
(descr "1 pin")
(tags "CONN DEV")
(path /5485F97F)
(fp_text reference J11 (at -0.127 -2.921) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value IO_PORT_#2 (at 0 3.302) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -2 -2) (end 0 -2) (layer F.SilkS) (width 0.254))
(fp_line (start 0 2) (end 2 2) (layer F.SilkS) (width 0.254))
(fp_line (start 2 2) (end 2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start 0 -2) (end 2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start -2 2) (end -2 -2) (layer F.SilkS) (width 0.254))
(fp_line (start -2 2) (end 0 2) (layer F.SilkS) (width 0.254))
(pad 1 thru_hole rect (at -1 -1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 9 /SCLK))
(pad 2 thru_hole rect (at 1 -1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 10 /MOSI))
(pad 3 thru_hole rect (at -1 1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(pad 4 thru_hole rect (at 1 1) (size 1.3 1.3) (drill 0.7) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(model Pin_Headers/Pin_Header_Straight_2x02.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871268)
(at 125.7046 40.0558)
(descr "1 pin")
(tags "CONN DEV")
(path /54860610)
(fp_text reference J12 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value "#SS" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 11 /#SS))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_hreb:Pin_Header_Straight_2x01 placed (layer F.Cu) (tedit 5472F1F7) (tstamp 54871272)
(at 123.1646 40.0558)
(descr "1 pin")
(tags "CONN DEV")
(path /54860710)
(fp_text reference J13 (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_text value MISO (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.2032)))
)
(fp_line (start -1.27 -2.54) (end 1.27 -2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 -2.54) (end 1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.254))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254))
(pad 2 thru_hole rect (at 0 1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.651 1.651) (drill 0.9) (layers *.Cu *.Mask F.SilkS)
(net 12 /MISO))
(model Pin_Headers/Pin_Header_Straight_2x01.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 54871277)
(at 153.1366 40.1098)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(path /54862BF8)
(fp_text reference J14 (at 0 0) (layer F.SilkS)
(effects (font (thickness 0.15)))
)
(fp_text value M3 (at 1 5) (layer F.SilkS) hide
(effects (font (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0) (layer Cmts.User) (width 0.15))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 5487127C)
(at 112.4966 40.1098)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
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(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 5489719A) (tstamp 54871281)
(at 153.3166 55.5498)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
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(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 5489848E) (tstamp 54871286)
(at 112.3166 55.5498)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
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(net 1 GND) (clearance 1) (zone_connect 2))
)
(module MLAB_dira:MountingHole_3mm placed (layer F.Cu) (tedit 54345FDC) (tstamp 5487128B)
(at 132.8166 50.2698)
(descr "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
(tags "Mounting hole, Befestigungsbohrung, 3mm, No Annular, Kein Restring,")
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)
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/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER-cache.bak
0,0 → 1,210
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# +1.8V
#
DEF +1.8V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 140 20 H I C CNN
F1 "+1.8V" 0 110 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
ALIAS 1V8
DRAW
P 3 0 0 0 0 0 0 40 0 40 N
X +1.8V 1 0 0 0 U 20 20 0 0 W N
C 0 60 20 0 1 0 N
ENDDRAW
ENDDEF
#
# +5V
#
DEF +5V #PWR 0 40 Y Y 1 F P
F0 "#PWR" 0 90 20 H I C CNN
F1 "+5V" 0 90 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
X +5V 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 4 0 1 0 0 0 0 30 0 30 0 30 N
ENDDRAW
ENDDEF
#
# CONN1_1
#
DEF CONN1_1 J 0 40 Y N 1 F N
F0 "J" 50 50 50 H V C CNN
F1 "CONN1_1" 100 -50 40 H V C CNN
F2 "" 50 -50 60 H V C CNN
F3 "" 50 -50 60 H V C CNN
DRAW
X P1 1 -300 50 250 R 60 60 1 1 P I
ENDDRAW
ENDDEF
#
# CP2
#
DEF CP2 C 0 10 N Y 1 F N
F0 "C" 0 100 40 H V L CNN
F1 "CP2" 6 -85 40 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
SM*
C?
C1-1
$ENDFPLIST
DRAW
S -90 20 -90 40 0 1 0 N
S -90 20 90 20 0 1 0 N
S -70 90 -30 90 0 1 0 N
S -50 70 -50 110 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
S 90 40 -90 40 0 1 0 N
S 90 40 90 20 0 1 0 N
X ~ 1 0 200 160 D 40 40 1 1 P
X ~ 2 0 -200 160 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# DIODESCH
#
DEF DIODESCH D 0 40 N N 1 F N
F0 "D" 0 100 40 H V C CNN
F1 "DIODESCH" 0 -100 40 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
D?
S*
$ENDFPLIST
DRAW
P 3 0 1 0 -50 50 50 0 -50 -50 F
P 6 0 1 8 75 25 75 50 50 50 50 -50 25 -50 25 -25 N
X A 1 -200 0 150 R 40 40 1 1 P
X K 2 200 0 150 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF ~GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
F1 "GND" 0 -70 30 H I C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X GND 1 0 0 0 U 30 30 1 1 W N
ENDDRAW
ENDDEF
#
# HEADER_2x01_PARALLEL
#
DEF HEADER_2x01_PARALLEL J 0 40 Y Y 1 F N
F0 "J" 0 -100 60 H V C CNN
F1 "HEADER_2x01_PARALLEL" 0 100 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C -50 0 15 0 1 0 N
C 50 0 15 0 1 0 N
S -100 50 100 -50 0 1 0 f
P 2 0 1 0 -65 0 -100 0 N
P 2 0 1 0 -35 0 35 0 N
X ~ 1 -250 0 150 R 50 50 1 1 I
X ~ 2 -250 0 150 R 50 50 1 1 I N
ENDDRAW
ENDDEF
#
# HEADER_2x02
#
DEF HEADER_2x02 J 0 40 Y Y 1 F N
F0 "J" 0 -150 60 H V C CNN
F1 "HEADER_2x02" 0 150 60 H V C CNN
F2 "" 0 50 60 H V C CNN
F3 "" 0 50 60 H V C CNN
DRAW
C -50 -50 15 0 1 0 N
C -50 50 15 0 1 0 N
C 50 -50 15 0 1 0 N
C 50 50 15 0 1 0 N
S -100 100 100 -100 0 1 0 f
P 2 0 1 0 -65 -50 -100 -50 N
P 2 0 1 0 -65 50 -100 50 N
P 2 0 1 0 65 -50 100 -50 N
P 2 0 1 0 65 50 100 50 N
X ~ 1 -250 50 150 R 50 50 1 1 I
X ~ 2 -250 -50 150 R 50 50 1 1 I
X ~ 3 250 -50 150 L 50 50 1 1 I
X ~ 4 250 50 150 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# HEADER_2x03_PARALLEL
#
DEF HEADER_2x03_PARALLEL J 0 40 Y Y 1 F N
F0 "J" 0 -200 60 H V C CNN
F1 "HEADER_2x03_PARALLEL" 0 200 60 H V C CNN
F2 "" 0 100 60 H V C CNN
F3 "" 0 100 60 H V C CNN
DRAW
C -50 -100 15 0 1 0 N
C -50 0 15 0 1 0 N
C -50 100 15 0 1 0 N
C 50 -100 15 0 1 0 N
C 50 0 15 0 1 0 N
C 50 100 15 0 1 0 N
S -100 150 100 -150 0 1 0 f
P 2 0 1 0 -65 -100 -100 -100 N
P 2 0 1 0 -65 0 -100 0 N
P 2 0 1 0 -65 100 -100 100 N
P 2 0 1 0 -35 -100 35 -100 N
P 2 0 1 0 -35 0 35 0 N
P 2 0 1 0 -35 100 35 100 N
X ~ 1 -250 100 150 R 50 50 1 1 I
X ~ 2 -250 0 150 R 50 50 1 1 I
X ~ 3 -250 -100 150 R 50 50 1 1 I
X ~ 4 -250 -100 150 R 50 50 1 1 I N
X ~ 5 -250 0 150 R 50 50 1 1 I N
X ~ 6 -250 100 150 R 50 50 1 1 I N
ENDDRAW
ENDDEF
#
# HEADER_2x04
#
DEF HEADER_2x04 J 0 40 Y Y 1 F N
F0 "J" 0 -250 60 H V C CNN
F1 "HEADER_2x04" 0 250 60 H V C CNN
F2 "" 0 150 60 H V C CNN
F3 "" 0 150 60 H V C CNN
DRAW
C -50 -150 15 0 1 0 N
C -50 -50 15 0 1 0 N
C -50 50 15 0 1 0 N
C -50 150 15 0 1 0 N
C 50 -150 15 0 1 0 N
C 50 -50 15 0 1 0 N
C 50 50 15 0 1 0 N
C 50 150 15 0 1 0 N
S -100 200 100 -200 0 1 0 f
P 2 0 1 0 -65 -150 -100 -150 N
P 2 0 1 0 -65 -50 -100 -50 N
P 2 0 1 0 -65 50 -100 50 N
P 2 0 1 0 -65 150 -100 150 N
P 2 0 1 0 65 -150 100 -150 N
P 2 0 1 0 65 -50 100 -50 N
P 2 0 1 0 65 50 100 50 N
P 2 0 1 0 65 150 100 150 N
X ~ 1 250 150 150 L 50 50 1 1 I
X ~ 2 -250 150 150 R 50 50 1 1 I
X ~ 3 250 50 150 L 50 50 1 1 I
X ~ 4 -250 50 150 R 50 50 1 1 I
X ~ 5 250 -50 150 L 50 50 1 1 I
X ~ 6 -250 -50 150 R 50 50 1 1 I
X ~ 7 250 -150 150 L 50 50 1 1 I
X ~ 8 -250 -150 150 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER-cache.bck
0,0 → 1,3
EESchema-DOCLIB Version 2.0
#
#End Doc Library

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER-cache.dcm
0,0 → 1,3
EESchema-DOCLIB Version 2.0
#
#End Doc Library

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER-cache.lib
0,0 → 1,210
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# +1.8V
#
DEF +1.8V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 140 20 H I C CNN
F1 "+1.8V" 0 110 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
ALIAS 1V8
DRAW
P 3 0 0 0 0 0 0 40 0 40 N
X +1.8V 1 0 0 0 U 20 20 0 0 W N
C 0 60 20 0 1 0 N
ENDDRAW
ENDDEF
#
# +5V
#
DEF +5V #PWR 0 40 Y Y 1 F P
F0 "#PWR" 0 90 20 H I C CNN
F1 "+5V" 0 90 30 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
X +5V 1 0 0 0 U 20 20 0 0 W N
C 0 50 20 0 1 0 N
P 4 0 1 0 0 0 0 30 0 30 0 30 N
ENDDRAW
ENDDEF
#
# CONN1_1
#
DEF CONN1_1 J 0 40 Y N 1 F N
F0 "J" 50 50 50 H V C CNN
F1 "CONN1_1" 100 -50 40 H V C CNN
F2 "" 50 -50 60 H V C CNN
F3 "" 50 -50 60 H V C CNN
DRAW
X P1 1 -300 50 250 R 60 60 1 1 P I
ENDDRAW
ENDDEF
#
# CP2
#
DEF CP2 C 0 10 N Y 1 F N
F0 "C" 0 100 40 H V L CNN
F1 "CP2" 6 -85 40 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
SM*
C?
C1-1
$ENDFPLIST
DRAW
S -90 20 -90 40 0 1 0 N
S -90 20 90 20 0 1 0 N
S -70 90 -30 90 0 1 0 N
S -50 70 -50 110 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
S 90 40 -90 40 0 1 0 N
S 90 40 90 20 0 1 0 N
X ~ 1 0 200 160 D 40 40 1 1 P
X ~ 2 0 -200 160 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# DIODESCH
#
DEF DIODESCH D 0 40 N N 1 F N
F0 "D" 0 100 40 H V C CNN
F1 "DIODESCH" 0 -100 40 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
D?
S*
$ENDFPLIST
DRAW
P 3 0 1 0 -50 50 50 0 -50 -50 F
P 6 0 1 8 75 25 75 50 50 50 50 -50 25 -50 25 -25 N
X A 1 -200 0 150 R 40 40 1 1 P
X K 2 200 0 150 L 40 40 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF ~GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
F1 "GND" 0 -70 30 H I C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
X GND 1 0 0 0 U 30 30 1 1 W N
ENDDRAW
ENDDEF
#
# HEADER_2x01_PARALLEL
#
DEF HEADER_2x01_PARALLEL J 0 40 Y Y 1 F N
F0 "J" 0 -100 60 H V C CNN
F1 "HEADER_2x01_PARALLEL" 0 100 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C -50 0 15 0 1 0 N
C 50 0 15 0 1 0 N
S -100 50 100 -50 0 1 0 f
P 2 0 1 0 -65 0 -100 0 N
P 2 0 1 0 -35 0 35 0 N
X ~ 1 -250 0 150 R 50 50 1 1 I
X ~ 2 -250 0 150 R 50 50 1 1 I N
ENDDRAW
ENDDEF
#
# HEADER_2x02
#
DEF HEADER_2x02 J 0 40 Y Y 1 F N
F0 "J" 0 -150 60 H V C CNN
F1 "HEADER_2x02" 0 150 60 H V C CNN
F2 "" 0 50 60 H V C CNN
F3 "" 0 50 60 H V C CNN
DRAW
C -50 -50 15 0 1 0 N
C -50 50 15 0 1 0 N
C 50 -50 15 0 1 0 N
C 50 50 15 0 1 0 N
S -100 100 100 -100 0 1 0 f
P 2 0 1 0 -65 -50 -100 -50 N
P 2 0 1 0 -65 50 -100 50 N
P 2 0 1 0 65 -50 100 -50 N
P 2 0 1 0 65 50 100 50 N
X ~ 1 -250 50 150 R 50 50 1 1 I
X ~ 2 -250 -50 150 R 50 50 1 1 I
X ~ 3 250 50 150 L 50 50 1 1 I
X ~ 4 250 -50 150 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# HEADER_2x03_PARALLEL
#
DEF HEADER_2x03_PARALLEL J 0 40 Y Y 1 F N
F0 "J" 0 -200 60 H V C CNN
F1 "HEADER_2x03_PARALLEL" 0 200 60 H V C CNN
F2 "" 0 100 60 H V C CNN
F3 "" 0 100 60 H V C CNN
DRAW
C -50 -100 15 0 1 0 N
C -50 0 15 0 1 0 N
C -50 100 15 0 1 0 N
C 50 -100 15 0 1 0 N
C 50 0 15 0 1 0 N
C 50 100 15 0 1 0 N
S -100 150 100 -150 0 1 0 f
P 2 0 1 0 -65 -100 -100 -100 N
P 2 0 1 0 -65 0 -100 0 N
P 2 0 1 0 -65 100 -100 100 N
P 2 0 1 0 -35 -100 35 -100 N
P 2 0 1 0 -35 0 35 0 N
P 2 0 1 0 -35 100 35 100 N
X ~ 1 -250 100 150 R 50 50 1 1 I
X ~ 2 -250 0 150 R 50 50 1 1 I
X ~ 3 -250 -100 150 R 50 50 1 1 I
X ~ 4 -250 -100 150 R 50 50 1 1 I N
X ~ 5 -250 0 150 R 50 50 1 1 I N
X ~ 6 -250 100 150 R 50 50 1 1 I N
ENDDRAW
ENDDEF
#
# HEADER_2x04
#
DEF HEADER_2x04 J 0 40 Y Y 1 F N
F0 "J" 0 -250 60 H V C CNN
F1 "HEADER_2x04" 0 250 60 H V C CNN
F2 "" 0 150 60 H V C CNN
F3 "" 0 150 60 H V C CNN
DRAW
C -50 -150 15 0 1 0 N
C -50 -50 15 0 1 0 N
C -50 50 15 0 1 0 N
C -50 150 15 0 1 0 N
C 50 -150 15 0 1 0 N
C 50 -50 15 0 1 0 N
C 50 50 15 0 1 0 N
C 50 150 15 0 1 0 N
S -100 200 100 -200 0 1 0 f
P 2 0 1 0 -65 -150 -100 -150 N
P 2 0 1 0 -65 -50 -100 -50 N
P 2 0 1 0 -65 50 -100 50 N
P 2 0 1 0 -65 150 -100 150 N
P 2 0 1 0 65 -150 100 -150 N
P 2 0 1 0 65 -50 100 -50 N
P 2 0 1 0 65 50 100 50 N
P 2 0 1 0 65 150 100 150 N
X ~ 1 250 150 150 L 50 50 1 1 I
X ~ 2 -250 150 150 R 50 50 1 1 I
X ~ 3 250 50 150 L 50 50 1 1 I
X ~ 4 -250 50 150 R 50 50 1 1 I
X ~ 5 250 -50 150 L 50 50 1 1 I
X ~ 6 -250 -50 150 R 50 50 1 1 I
X ~ 7 250 -150 150 L 50 50 1 1 I
X ~ 8 -250 -150 150 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.sch
0,0 → 1,569
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:U3_MLAB_ADAPTER-cache
EELAYER 24 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L HEADER_2x04 J6
U 1 1 5485F8D0
P 3600 3400
F 0 "J6" H 3600 3150 60 0000 C CNN
F 1 "IOS_PORT_#1" H 3600 3650 60 0000 C CNN
F 2 "" H 3600 3550 60 0000 C CNN
F 3 "" H 3600 3550 60 0000 C CNN
1 3600 3400
1 0 0 -1
$EndComp
$Comp
L HEADER_2x02 J11
U 1 1 5485F97F
P 7550 3300
F 0 "J11" H 7550 3500 60 0000 C CNN
F 1 "IO_PORT_#2" H 7550 3100 60 0000 C CNN
F 2 "" H 7550 3350 60 0000 C CNN
F 3 "" H 7550 3350 60 0000 C CNN
1 7550 3300
1 0 0 -1
$EndComp
$Comp
L HEADER_2x03_PARALLEL J1
U 1 1 5485F9FC
P 1750 5900
F 0 "J1" H 1750 5700 60 0000 C CNN
F 1 "5V POWER" H 1750 6100 60 0000 C CNN
F 2 "" H 1750 6000 60 0000 C CNN
F 3 "" H 1750 6000 60 0000 C CNN
1 1750 5900
-1 0 0 -1
$EndComp
$Comp
L GND #PWR01
U 1 1 5485FDDC
P 2100 6150
F 0 "#PWR01" H 2100 6150 30 0001 C CNN
F 1 "GND" H 2100 6080 30 0001 C CNN
F 2 "" H 2100 6150 60 0000 C CNN
F 3 "" H 2100 6150 60 0000 C CNN
1 2100 6150
1 0 0 -1
$EndComp
$Comp
L +5V #PWR02
U 1 1 5485FEBD
P 2750 5750
F 0 "#PWR02" H 2750 5840 20 0001 C CNN
F 1 "+5V" H 2750 5840 30 0000 C CNN
F 2 "" H 2750 5750 60 0000 C CNN
F 3 "" H 2750 5750 60 0000 C CNN
1 2750 5750
1 0 0 -1
$EndComp
$Comp
L DIODESCH D1
U 1 1 5485FEF7
P 2400 6150
F 0 "D1" H 2400 6250 40 0000 C CNN
F 1 "DIODESCH" H 2400 6050 40 0000 C CNN
F 2 "" H 2400 6150 60 0000 C CNN
F 3 "" H 2400 6150 60 0000 C CNN
1 2400 6150
0 -1 -1 0
$EndComp
$Comp
L GND #PWR03
U 1 1 5485FF80
P 2400 6450
F 0 "#PWR03" H 2400 6450 30 0001 C CNN
F 1 "GND" H 2400 6380 30 0001 C CNN
F 2 "" H 2400 6450 60 0000 C CNN
F 3 "" H 2400 6450 60 0000 C CNN
1 2400 6450
1 0 0 -1
$EndComp
$Comp
L GND #PWR04
U 1 1 5485FF9A
P 2750 6450
F 0 "#PWR04" H 2750 6450 30 0001 C CNN
F 1 "GND" H 2750 6380 30 0001 C CNN
F 2 "" H 2750 6450 60 0000 C CNN
F 3 "" H 2750 6450 60 0000 C CNN
1 2750 6450
1 0 0 -1
$EndComp
$Comp
L CP2 C1
U 1 1 5485FFA7
P 2750 6150
F 0 "C1" H 2750 6250 40 0000 L CNN
F 1 "CP2" H 2756 6065 40 0000 L CNN
F 2 "" H 2788 6000 30 0000 C CNN
F 3 "" H 2750 6150 60 0000 C CNN
1 2750 6150
1 0 0 -1
$EndComp
Wire Wire Line
2000 5900 2750 5900
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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$Comp
L HEADER_2x03_PARALLEL J5
U 1 1 548601AA
P 3550 5900
F 0 "J5" H 3550 5700 60 0000 C CNN
F 1 "1,8V CPU Core" H 3550 6100 60 0000 C CNN
F 2 "" H 3550 6000 60 0000 C CNN
F 3 "" H 3550 6000 60 0000 C CNN
1 3550 5900
-1 0 0 -1
$EndComp
$Comp
L GND #PWR05
U 1 1 548601B0
P 3900 6150
F 0 "#PWR05" H 3900 6150 30 0001 C CNN
F 1 "GND" H 3900 6080 30 0001 C CNN
F 2 "" H 3900 6150 60 0000 C CNN
F 3 "" H 3900 6150 60 0000 C CNN
1 3900 6150
1 0 0 -1
$EndComp
$Comp
L DIODESCH D2
U 1 1 548601BC
P 4200 6150
F 0 "D2" H 4200 6250 40 0000 C CNN
F 1 "DIODESCH" H 4200 6050 40 0000 C CNN
F 2 "" H 4200 6150 60 0000 C CNN
F 3 "" H 4200 6150 60 0000 C CNN
1 4200 6150
0 -1 -1 0
$EndComp
$Comp
L GND #PWR06
U 1 1 548601C2
P 4200 6450
F 0 "#PWR06" H 4200 6450 30 0001 C CNN
F 1 "GND" H 4200 6380 30 0001 C CNN
F 2 "" H 4200 6450 60 0000 C CNN
F 3 "" H 4200 6450 60 0000 C CNN
1 4200 6450
1 0 0 -1
$EndComp
$Comp
L GND #PWR07
U 1 1 548601C8
P 4550 6450
F 0 "#PWR07" H 4550 6450 30 0001 C CNN
F 1 "GND" H 4550 6380 30 0001 C CNN
F 2 "" H 4550 6450 60 0000 C CNN
F 3 "" H 4550 6450 60 0000 C CNN
1 4550 6450
1 0 0 -1
$EndComp
$Comp
L CP2 C2
U 1 1 548601CE
P 4550 6150
F 0 "C2" H 4550 6250 40 0000 L CNN
F 1 "CP2" H 4556 6065 40 0000 L CNN
F 2 "" H 4588 6000 30 0000 C CNN
F 3 "" H 4550 6150 60 0000 C CNN
1 4550 6150
1 0 0 -1
$EndComp
Wire Wire Line
3800 5900 4550 5900
Wire Wire Line
4200 5900 4200 5950
Connection ~ 4200 5900
Connection ~ 4550 5900
Wire Wire Line
4200 6350 4200 6450
Wire Wire Line
4550 6350 4550 6450
Wire Wire Line
3900 5800 3900 6150
Wire Wire Line
3900 5800 3800 5800
Wire Wire Line
3800 6000 3900 6000
Connection ~ 3900 6000
Wire Wire Line
4550 5650 4550 5950
$Comp
L +1.8V #PWR08
U 1 1 5486039E
P 4550 5650
F 0 "#PWR08" H 4550 5790 20 0001 C CNN
F 1 "+1.8V" H 4550 5760 30 0000 C CNN
F 2 "" H 4550 5650 60 0000 C CNN
F 3 "" H 4550 5650 60 0000 C CNN
1 4550 5650
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J12
U 1 1 54860610
P 8350 3100
F 0 "J12" H 8350 3200 60 0000 C CNN
F 1 "#SS" H 8600 3100 60 0000 C CNN
F 2 "" H 8350 3100 60 0000 C CNN
F 3 "" H 8350 3100 60 0000 C CNN
1 8350 3100
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J13
U 1 1 54860710
P 8350 3500
F 0 "J13" H 8350 3600 60 0000 C CNN
F 1 "MISO" H 8600 3500 60 0000 C CNN
F 2 "" H 8350 3500 60 0000 C CNN
F 3 "" H 8350 3500 60 0000 C CNN
1 8350 3500
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J10
U 1 1 54860825
P 6650 3500
F 0 "J10" H 6650 3400 60 0000 C CNN
F 1 "MOSI" H 6900 3500 60 0000 C CNN
F 2 "" H 6650 3500 60 0000 C CNN
F 3 "" H 6650 3500 60 0000 C CNN
1 6650 3500
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J9
U 1 1 5486082B
P 6650 3150
F 0 "J9" H 6650 3050 60 0000 C CNN
F 1 "SCLK" H 6900 3150 60 0000 C CNN
F 2 "" H 6650 3150 60 0000 C CNN
F 3 "" H 6650 3150 60 0000 C CNN
1 6650 3150
-1 0 0 1
$EndComp
Wire Wire Line
7800 3350 8000 3350
Wire Wire Line
8000 3350 8000 3500
Wire Wire Line
8000 3500 8100 3500
Wire Wire Line
7800 3250 8000 3250
Wire Wire Line
8000 3250 8000 3100
Wire Wire Line
8000 3100 8100 3100
Wire Wire Line
7300 3250 7150 3250
Wire Wire Line
7150 3250 7150 3150
Wire Wire Line
7150 3150 6900 3150
Wire Wire Line
6900 3500 7150 3500
Wire Wire Line
7150 3500 7150 3350
Wire Wire Line
7150 3350 7300 3350
$Comp
L +5V #PWR09
U 1 1 54860E24
P 4100 2950
F 0 "#PWR09" H 4100 3040 20 0001 C CNN
F 1 "+5V" H 4100 3040 30 0000 C CNN
F 2 "" H 4100 2950 60 0000 C CNN
F 3 "" H 4100 2950 60 0000 C CNN
1 4100 2950
1 0 0 -1
$EndComp
Wire Wire Line
4100 2950 4100 3550
Wire Wire Line
4100 3550 3850 3550
$Comp
L +1.8V #PWR010
U 1 1 54860E81
P 3950 2950
F 0 "#PWR010" H 3950 3090 20 0001 C CNN
F 1 "+1.8V" H 3950 3060 30 0000 C CNN
F 2 "" H 3950 2950 60 0000 C CNN
F 3 "" H 3950 2950 60 0000 C CNN
1 3950 2950
1 0 0 -1
$EndComp
Wire Wire Line
3850 3250 3950 3250
Wire Wire Line
3950 3250 3950 2950
$Comp
L HEADER_2x01_PARALLEL J2
U 1 1 5486108C
P 2550 3100
F 0 "J2" H 2550 3000 60 0000 C CNN
F 1 "GPIO199" H 2900 3100 60 0000 C CNN
F 2 "" H 2550 3100 60 0000 C CNN
F 3 "" H 2550 3100 60 0000 C CNN
1 2550 3100
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J3
U 1 1 54861113
P 2550 3300
F 0 "J3" H 2550 3200 60 0000 C CNN
F 1 "GPIO200" H 2900 3300 60 0000 C CNN
F 2 "" H 2550 3300 60 0000 C CNN
F 3 "" H 2550 3300 60 0000 C CNN
1 2550 3300
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J4
U 1 1 54861163
P 2550 3500
F 0 "J4" H 2550 3400 60 0000 C CNN
F 1 "GPIO204" H 2900 3500 60 0000 C CNN
F 2 "" H 2550 3500 60 0000 C CNN
F 3 "" H 2550 3500 60 0000 C CNN
1 2550 3500
-1 0 0 1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J8
U 1 1 5486130F
P 4950 3500
F 0 "J8" H 4950 3600 60 0000 C CNN
F 1 "UART_TX" H 5300 3500 60 0000 C CNN
F 2 "" H 4950 3500 60 0000 C CNN
F 3 "" H 4950 3500 60 0000 C CNN
1 4950 3500
1 0 0 -1
$EndComp
$Comp
L HEADER_2x01_PARALLEL J7
U 1 1 54861315
P 4950 3300
F 0 "J7" H 4950 3400 60 0000 C CNN
F 1 "UART_RX" H 5300 3300 60 0000 C CNN
F 2 "" H 4950 3300 60 0000 C CNN
F 3 "" H 4950 3300 60 0000 C CNN
1 4950 3300
1 0 0 -1
$EndComp
Wire Wire Line
3850 3450 4350 3450
Wire Wire Line
2800 3100 2950 3100
Wire Wire Line
2950 3100 2950 3250
Wire Wire Line
2950 3250 3350 3250
Wire Wire Line
3350 3350 2900 3350
Wire Wire Line
2900 3350 2900 3300
Wire Wire Line
2900 3300 2800 3300
Wire Wire Line
2800 3500 2900 3500
Wire Wire Line
2900 3500 2900 3450
Wire Wire Line
2900 3450 3350 3450
Wire Wire Line
4350 3450 4350 3500
Wire Wire Line
4350 3500 4700 3500
Wire Wire Line
4700 3300 4350 3300
Wire Wire Line
4350 3300 4350 3350
Wire Wire Line
4350 3350 3850 3350
$Comp
L GND #PWR011
U 1 1 54861F1A
P 3250 3650
F 0 "#PWR011" H 3250 3650 30 0001 C CNN
F 1 "GND" H 3250 3580 30 0001 C CNN
F 2 "" H 3250 3650 60 0000 C CNN
F 3 "" H 3250 3650 60 0000 C CNN
1 3250 3650
1 0 0 -1
$EndComp
Wire Wire Line
3250 3550 3250 3650
Wire Wire Line
3350 3550 3250 3550
$Comp
L CONN1_1 J15
U 1 1 54862A8F
P 8500 4700
F 0 "J15" H 8450 4850 50 0000 C CNN
F 1 "M3" H 8550 4750 40 0000 C CNN
F 2 "" H 8550 4650 60 0000 C CNN
F 3 "" H 8550 4650 60 0000 C CNN
1 8500 4700
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J14
U 1 1 54862BF8
P 8500 4550
F 0 "J14" H 8450 4700 50 0000 C CNN
F 1 "M3" H 8550 4600 40 0000 C CNN
F 2 "" H 8550 4500 60 0000 C CNN
F 3 "" H 8550 4500 60 0000 C CNN
1 8500 4550
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J18
U 1 1 54862E2F
P 8500 5150
F 0 "J18" H 8450 5300 50 0000 C CNN
F 1 "M3" H 8550 5200 40 0000 C CNN
F 2 "" H 8550 5100 60 0000 C CNN
F 3 "" H 8550 5100 60 0000 C CNN
1 8500 5150
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J16
U 1 1 54862E35
P 8500 4850
F 0 "J16" H 8450 5000 50 0000 C CNN
F 1 "M3" H 8550 4900 40 0000 C CNN
F 2 "" H 8550 4800 60 0000 C CNN
F 3 "" H 8550 4800 60 0000 C CNN
1 8500 4850
1 0 0 -1
$EndComp
$Comp
L CONN1_1 J17
U 1 1 54862E8B
P 8500 5000
F 0 "J17" H 8450 5150 50 0000 C CNN
F 1 "M3" H 8550 5050 40 0000 C CNN
F 2 "" H 8550 4950 60 0000 C CNN
F 3 "" H 8550 4950 60 0000 C CNN
1 8500 5000
1 0 0 -1
$EndComp
$Comp
L GND #PWR012
U 1 1 54863035
P 8100 5250
F 0 "#PWR012" H 8100 5250 30 0001 C CNN
F 1 "GND" H 8100 5180 30 0001 C CNN
F 2 "" H 8100 5250 60 0000 C CNN
F 3 "" H 8100 5250 60 0000 C CNN
1 8100 5250
1 0 0 -1
$EndComp
Wire Wire Line
8100 4500 8200 4500
Wire Wire Line
8200 4650 8100 4650
Connection ~ 8100 4650
Wire Wire Line
8100 4800 8200 4800
Connection ~ 8100 4800
Wire Wire Line
8100 4950 8200 4950
Connection ~ 8100 4950
Wire Wire Line
8100 5100 8200 5100
Connection ~ 8100 5100
Wire Notes Line
7700 4200 9700 4200
Wire Notes Line
9700 4200 9700 5700
Wire Notes Line
9700 5700 7700 5700
Wire Notes Line
7700 5700 7700 4200
Text Notes 8700 4950 0 60 ~ 0
MECHANICAL HOLES \n3,2mm diameter
Wire Wire Line
8100 4500 8100 5250
Text Label 6900 3150 0 60 ~ 0
SCLK
Text Label 6900 3500 0 60 ~ 0
MOSI
Text Label 7800 3250 0 60 ~ 0
#SS
Text Label 7800 3350 0 60 ~ 0
MISO
Text Label 4350 3300 0 60 ~ 0
UART_RX
Text Label 4350 3500 0 60 ~ 0
UART_TX
Text Label 2950 3250 0 60 ~ 0
GPIO199
Text Label 2950 3350 0 60 ~ 0
GPIO200
Text Label 2950 3450 0 60 ~ 0
GPIO204
$EndSCHEMATC

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.cmp
0,0 → 1,157
Cmp-Mod V01 Created by Cvpcb (2014-10-14 BZR 5188)-product date = 9.12.2014 15:54:31
BeginCmp
TimeStamp = /5485FFA7;
Reference = C1;
ValeurCmp = CP2;
IdModule = MLAB_C:TantalC_SizeC_Reflow;
EndCmp
BeginCmp
TimeStamp = /548601CE;
Reference = C2;
ValeurCmp = CP2;
IdModule = MLAB_C:TantalC_SizeC_Reflow;
EndCmp
BeginCmp
TimeStamp = /5485FEF7;
Reference = D1;
ValeurCmp = DIODESCH;
IdModule = MLAB_D:Diode-MiniMELF_Standard;
EndCmp
BeginCmp
TimeStamp = /548601BC;
Reference = D2;
ValeurCmp = DIODESCH;
IdModule = MLAB_D:Diode-MiniMELF_Standard;
EndCmp
BeginCmp
TimeStamp = /5485F9FC;
Reference = J1;
ValeurCmp = 5V POWER;
IdModule = MLAB_hreb:Pin_Header_Straight_2x03;
EndCmp
BeginCmp
TimeStamp = /5486108C;
Reference = J2;
ValeurCmp = GPIO199;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54861113;
Reference = J3;
ValeurCmp = GPIO200;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54861163;
Reference = J4;
ValeurCmp = GPIO204;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /548601AA;
Reference = J5;
ValeurCmp = 1,8V CPU Core;
IdModule = MLAB_hreb:Pin_Header_Straight_2x03;
EndCmp
BeginCmp
TimeStamp = /5485F8D0;
Reference = J6;
ValeurCmp = IOS_PORT_#1;
IdModule = MLAB_hreb:2mm_Pin_Header_Straight_2x04;
EndCmp
BeginCmp
TimeStamp = /54861315;
Reference = J7;
ValeurCmp = UART_RX;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /5486130F;
Reference = J8;
ValeurCmp = UART_TX;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /5486082B;
Reference = J9;
ValeurCmp = SCLK;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54860825;
Reference = J10;
ValeurCmp = MOSI;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /5485F97F;
Reference = J11;
ValeurCmp = IO_PORT_#2;
IdModule = MLAB_hreb:2mm_Pin_Header_Straight_2x02;
EndCmp
BeginCmp
TimeStamp = /54860610;
Reference = J12;
ValeurCmp = #SS;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54860710;
Reference = J13;
ValeurCmp = MISO;
IdModule = MLAB_hreb:Pin_Header_Straight_2x01;
EndCmp
BeginCmp
TimeStamp = /54862BF8;
Reference = J14;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
BeginCmp
TimeStamp = /54862A8F;
Reference = J15;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
BeginCmp
TimeStamp = /54862E35;
Reference = J16;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
BeginCmp
TimeStamp = /54862E8B;
Reference = J17;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
BeginCmp
TimeStamp = /54862E2F;
Reference = J18;
ValeurCmp = M3;
IdModule = MLAB_dira:MountingHole_3mm;
EndCmp
EndListe

/Modules/ARM/ODROID-U3/SCH_PCB/U3_MLAB_ADAPTER.pro
0,0 → 1,66
update=Po 8. prosinec 2014, 20:52:01 CET
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
LibName31=header
LibName32=/home/kaklik/svn/library/KiCAD/symbols/konektory
LibName33=/home/kaklik/svn/library/KiCAD/symbols/Jumpers