/Modules/Audio/POWERDAC01A/SCH_PCB/POWERDAC-cache.lib
302,6 → 302,7
X VDD_DIG 36 550 1500 200 D 50 50 1 1 W
X OUT3B/FFX3B 17 1300 400 200 L 50 50 1 1 O
X XTI 27 -1300 0 200 R 50 50 1 1 I C
X EP 37 400 -1450 200 U 50 50 1 1 W
X OUT3A/FFX3A 18 1300 500 200 L 50 50 1 1 O
X BICKI 28 -1300 -150 200 R 50 50 1 1 I C
X EAPD/OUT4B 19 1300 100 200 L 50 50 1 1 O
323,4 → 324,18
ENDDRAW
ENDDEF
#
# VDD
#
DEF VDD #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VDD" 0 150 50 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VDD 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library