Subversion Repositories – MLAB

/Modules/CPLD_FPGA/XILINX_XVC/ @ HEAD   →   /Modules/CPLD_FPGA/XILINX_XVC @ 2878

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/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/T2_AMA.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
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Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_AMA.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_AMA/V1_REAL.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
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+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O1.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
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Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/O2.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/V1.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_DOC/drill.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/M1.PHO
0,0 → 1,210
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD011C,0.06*%
%ADD012R,0.07X0.07*%
%ADD016C,0.04*%
%ADD024C,0.001*%
%ADD032R,0.08X0.08*%
%ADD033C,0.24622*%
%ADD041C,0.08*%
%ADD044R,0.05X0.05*%
%ADD066R,0.066X0.049*%
%ADD067R,0.049X0.066*%
%ADD068R,0.06X0.085*%
%ADD069C,0.075*%
%ADD070C,0.15*%
%ADD071R,0.049X0.061*%
%ADD072R,0.061X0.049*%
%ADD073O,0.022X0.07*%
%ADD074R,0.0415X0.07299*%
%ADD075C,0.0415*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D11*
G01X120000Y145000D03*
X246000D03*
G54D12*
X120000Y175000D03*
X246000D03*
G54D16*
X197000Y179000D03*
X212500Y141500D03*
X216500Y142000D03*
G54D24*
G54D32*
X218000Y211000D03*
X230000Y155000D03*
Y165000D03*
Y175000D03*
X191000Y169000D03*
Y179000D03*
X181000Y169000D03*
Y179000D03*
X171000Y169000D03*
Y179000D03*
G54D33*
X120000Y120000D03*
X240000D03*
Y200000D03*
X120000D03*
G54D41*
X208000Y211000D03*
X188000D03*
X168000D03*
X158000D03*
X138000D03*
G54D44*
X216000Y110000D03*
X224000D03*
X220000Y118000D03*
X222000Y135000D03*
X214000D03*
X218000Y127000D03*
G54D66*
X161500Y140200D03*
Y147800D03*
X153000Y140200D03*
Y147800D03*
X205000Y132200D03*
Y139800D03*
X196000Y132200D03*
Y139800D03*
X222000Y157200D03*
Y164800D03*
G54D67*
X172200Y187000D03*
X179800D03*
X192800Y159000D03*
X185200D03*
G54D68*
X215900Y202500D03*
X202100D03*
G54D69*
X161000Y165000D03*
Y155000D03*
X153000D03*
Y165000D03*
G54D70*
X142000Y136000D03*
Y184000D03*
G54D71*
X170200Y141000D03*
X177800D03*
X170200Y151000D03*
X177800D03*
X184300Y202000D03*
X176700D03*
X165800D03*
X158200D03*
X176800Y124000D03*
X169200D03*
X161800D03*
X154200D03*
X170200Y159000D03*
X177800D03*
G54D72*
X232000Y136200D03*
Y143800D03*
X222000Y149800D03*
Y142200D03*
X218000Y181200D03*
Y188800D03*
X203000Y180700D03*
Y188300D03*
X189000Y122800D03*
Y115200D03*
X186000Y143200D03*
Y150800D03*
G54D73*
X215750Y172500D03*
X213250D03*
X210750D03*
X208250D03*
X205750D03*
X203250D03*
X200750D03*
X198250D03*
Y149500D03*
X200750D03*
X203250D03*
X205750D03*
X208250D03*
X210750D03*
X213250D03*
X215750D03*
G54D74*
X210087Y114000D03*
X195913D03*
X181087D03*
X166913D03*
X152087D03*
X137913D03*
G54D75*
X203000D03*
X174000D03*
X145000D03*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/P1.pho
0,0 → 1,161
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD024C,0.001*%
%ADD040R,0.06X0.06*%
%ADD076R,0.052X0.035*%
%ADD077R,0.035X0.052*%
%ADD078R,0.046X0.071*%
%ADD079R,0.036X0.036*%
%ADD080R,0.035X0.047*%
%ADD081R,0.047X0.035*%
%ADD082O,0.01X0.06*%
%ADD083R,0.02559X0.05709*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D24*
G54D40*
G01X120000Y175000D03*
X246000D03*
G54D76*
X161500Y140200D03*
Y147800D03*
X153000Y140200D03*
Y147800D03*
X205000Y132200D03*
Y139800D03*
X196000Y132200D03*
Y139800D03*
X222000Y157200D03*
Y164800D03*
G54D77*
X172200Y187000D03*
X179800D03*
X192800Y159000D03*
X185200D03*
G54D78*
X215900Y202500D03*
X202100D03*
G54D79*
X216000Y110000D03*
X224000D03*
X220000Y118000D03*
X222000Y135000D03*
X214000D03*
X218000Y127000D03*
G54D80*
X170200Y141000D03*
X177800D03*
X170200Y151000D03*
X177800D03*
X184300Y202000D03*
X176700D03*
X165800D03*
X158200D03*
X176800Y124000D03*
X169200D03*
X161800D03*
X154200D03*
X170200Y159000D03*
X177800D03*
G54D81*
X232000Y136200D03*
Y143800D03*
X222000Y149800D03*
Y142200D03*
X218000Y181200D03*
Y188800D03*
X203000Y180700D03*
Y188300D03*
X189000Y122800D03*
Y115200D03*
X186000Y143200D03*
Y150800D03*
G54D82*
X215750Y172500D03*
X213250D03*
X210750D03*
X208250D03*
X205750D03*
X203250D03*
X200750D03*
X198250D03*
Y149500D03*
X200750D03*
X203250D03*
X205750D03*
X208250D03*
X210750D03*
X213250D03*
X215750D03*
G54D83*
X210087Y114000D03*
X195913D03*
X181087D03*
X166913D03*
X152087D03*
X137913D03*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/V1.PHO
0,0 → 1,2033
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD012R,0.07X0.07*%
%ADD013C,0.23622*%
%ADD014C,0.05*%
%ADD017C,0.02*%
%ADD019C,0.03*%
%ADD020C,0.012*%
%ADD024C,0.001*%
%ADD025C,0.01*%
%ADD031C,0.07*%
%ADD035C,0.065*%
%ADD036C,0.008*%
%ADD040R,0.06X0.06*%
%ADD055R,0.056X0.039*%
%ADD056R,0.039X0.056*%
%ADD057R,0.05X0.075*%
%ADD058C,0.14*%
%ADD059R,0.04X0.04*%
%ADD060R,0.039X0.051*%
%ADD061R,0.051X0.039*%
%ADD062O,0.012X0.06*%
%ADD063R,0.0315X0.06299*%
%ADD064C,0.0315*%
%ADD065C,0.016*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D12*
G01X218000Y211000D03*
X230000Y155000D03*
Y165000D03*
Y175000D03*
X191000Y169000D03*
Y179000D03*
X181000Y169000D03*
Y179000D03*
X171000Y169000D03*
Y179000D03*
G54D13*
X120000Y120000D03*
X240000D03*
Y200000D03*
X120000D03*
G54D14*
Y145000D03*
X246000D03*
G54D17*
X179800Y187000D02*
Y180200D01*
X181000Y179000*
X172200Y187000D02*
Y187850D01*
X176150Y191800*
X182578*
X184875Y189503*
Y185125*
X191000Y179000*
X177800Y159000D02*
Y165800D01*
X181000Y169000*
X174000Y147000D02*
X175000Y146000D01*
X181050*
X181550Y146500*
X182100*
X185400Y143200*
X186000*
X171000Y179000D02*
Y185800D01*
X172200Y187000*
X171000Y169000D02*
Y179000D01*
X161000Y165000D02*
X164800D01*
X170200Y159600*
Y159000*
X174000Y155000D02*
X177800Y158800D01*
Y159000*
X186000Y150800D02*
Y154000D01*
X186000*
X196000*
X197000Y155000*
X204300*
X204600Y154700*
X181000Y169000D02*
Y179000D01*
X191000D02*
Y169000D01*
X229750Y164750D02*
X230000Y165000D01*
X222000Y164800D02*
X229550D01*
X229600Y164750*
X185200Y159000D02*
X186000D01*
Y150800*
X138000Y211000D02*
X154150Y194850D01*
X186622*
X193172Y188300*
X203000*
X158000Y211000D02*
Y202000D01*
X168000Y211000D02*
X172500Y206500D01*
X172800*
X176700Y202600*
Y202000*
X202100Y202500D02*
Y203750D01*
X208000Y209650*
Y211000*
X215900Y202500D02*
Y208900D01*
X218000Y211000*
X215900Y202500D02*
Y201250D01*
X229800Y187350*
Y175200*
X230000Y175000*
X188000Y211000D02*
X194603Y204397D01*
Y200918*
X198872Y196650*
X209550*
X217400Y188800*
X218000*
G54D19*
X197000Y179000D03*
X212500Y141500D03*
X216500Y142000D03*
G54D20*
X137913Y114000D02*
Y119000D01*
X142913Y124000*
X154200*
X166913Y114000D02*
Y119000D01*
X166913*
X168200*
X169200Y120000*
Y124000*
X181087Y114000D02*
Y115575D01*
X184512Y119000*
X192000*
X198000Y125000*
X211000*
X213000Y127000*
X218000*
X210087Y114000D02*
X216000D01*
X220000Y118000*
X189000Y115200D02*
X193000D01*
Y114000*
X195913*
X216000Y110000D02*
X220000Y114000D01*
X223000*
X225000Y116000*
Y125000*
X232000Y132000*
Y136200*
X161500Y147800D02*
X162350D01*
X165650Y144500*
X167300*
X170200Y141600*
Y141000*
X161800Y124000D02*
Y124600D01*
X166200Y129000*
X172400*
X176800Y124600*
Y124000*
X182000*
X183200Y122800*
X189000*
X177800Y151000D02*
Y151600D01*
X181500Y155300*
Y162313*
X182837Y163650*
X194913*
X198250Y166987*
Y172500*
X177800Y141000D02*
X181000D01*
X183000Y139000*
X189000*
X191000Y141000*
Y142000*
X193000Y144000*
X195150*
X198250Y147100*
Y149500*
X153000Y155000D02*
X158000Y160000D01*
X163000*
X166000Y157000*
Y155800*
X170200Y151600*
Y151000*
X153000Y155000D02*
Y147800D01*
X161000Y155000D02*
Y148300D01*
X161500Y147800*
X203000Y180700D02*
Y177500D01*
X203250Y177250*
Y172500*
X197000Y179000D02*
X197500D01*
X200750Y175750*
Y172500*
X191000Y128000D02*
Y135650D01*
X195150Y139800*
X196000*
X191000Y128000D02*
X210000D01*
X213000Y131000*
X225000*
X227000Y133000*
Y147000*
X230000Y150000*
Y155000*
X209400Y135750D02*
X210150Y135000D01*
X214000*
X204600Y154700D02*
X205050D01*
X205750Y154000*
Y149500*
X200750D02*
Y143800D01*
X203000*
X203250Y144050*
Y149500*
X191000Y179000D02*
X196500Y184500D01*
X206000*
X207500Y183000*
Y180700*
X229600Y164750D02*
X229750D01*
X208250Y149500D02*
Y157100D01*
X208350Y157200*
X222000*
X206000Y160700D02*
X208250Y158450D01*
Y157100*
X215750Y149500D02*
Y147100D01*
X217550Y145300*
X218300*
X221400Y142200*
X222000*
X213250Y149500D02*
Y146250D01*
X216500Y143000*
Y142000*
X210750Y149500D02*
Y145250D01*
X212500Y143500*
Y141500*
X208250Y149500D02*
Y144450D01*
X209400Y143300*
Y135750*
X205750Y172500D02*
Y160950D01*
X206000Y160700*
X205750Y172500D02*
Y176700D01*
X205975Y176925*
X205988*
X207500Y178437*
Y180700*
X208250Y172500D02*
Y175794D01*
X209700Y177244*
Y180700*
X210750Y172500D02*
Y168300D01*
X214250Y164800*
X222000*
X215750Y172500D02*
Y176700D01*
X216350Y177300*
X217300*
X218000Y178000*
Y181200*
X189000Y122800D02*
Y126000D01*
X191000Y128000*
X232000Y143800D02*
Y147000D01*
X236000Y151000*
Y165000*
X222000Y135000D02*
Y142200D01*
X230000Y175000D02*
X236000Y169000D01*
Y165000*
X222000Y157200D02*
Y149800D01*
X196000Y139800D02*
X196850D01*
X200750Y143700*
Y143800*
X196000Y132200D02*
X205000D01*
X192800Y159000D02*
X204300D01*
X206000Y160700*
X205000Y139800D02*
X205750Y140550D01*
Y149500*
X205000Y132200D02*
X205850D01*
X209400Y135750*
X165800Y202000D02*
Y201400D01*
X169750Y197450*
X187699*
X193299Y191850*
X206213*
X209700Y188363*
Y180700*
X184300Y202000D02*
X187450D01*
X195400Y194050*
X207124*
X213250Y187924*
Y172500*
G54D24*
G54D25*
X218677Y138068D02*
G75*
G03X218552Y138806I-389J314D01*
G01X218317Y138983D02*
G03X218552Y138806I1133J1267D01*
G01X218317Y138983D02*
G03X217783Y139068I-334J-373D01*
G01X215103Y139121D02*
G03X217783Y139068I1397J2879D01*
G01X215103Y139121D02*
G03X214563Y139053I-218J-450D01*
G01X210338Y139141D02*
G03X214563Y139053I2162J2359D01*
G01X210338Y139141D02*
G03X209500Y138772I-338J-369D01*
G01Y137850*
X207800Y136150D02*
G03X209500Y137850I0J1700D01*
G01X207800Y136150D02*
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X217791D01*
X197314Y162799D02*
X213116D01*
X198214Y163699D02*
X212099D01*
X199114Y164599D02*
X211199D01*
X200003Y165499D02*
X210299D01*
X200473Y166399D02*
X209399D01*
X200550Y167299D02*
X208679D01*
X188850Y157399D02*
X195760D01*
X213610Y138499D02*
X218774D01*
X209481Y137599D02*
X218409D01*
X209051Y136699D02*
X218300D01*
X194401Y135799D02*
X218300D01*
X193501Y134899D02*
X218300D01*
X193300Y133999D02*
X218300D01*
X193300Y133099D02*
X212059D01*
X209500Y138499D02*
X211390D01*
X193300Y132199D02*
X210946D01*
X193300Y131299D02*
X210046D01*
X193502Y130399D02*
X209138D01*
X200051Y136699D02*
X200949D01*
G54D31*
X208000Y211000D03*
X188000D03*
X168000D03*
X158000D03*
X138000D03*
G54D35*
X161000Y165000D03*
Y155000D03*
X153000D03*
Y165000D03*
G54D36*
X103750Y135000D02*
X109000Y137545D01*
X103750D02*
X109000Y135000D01*
X103750Y139182D02*
X109000Y140636D01*
X103750Y142091D02*
X109000Y140636D01*
X105000Y146455D02*
X104500Y146273D01*
X104000Y145909*
X103750Y145545*
Y144818*
X104000Y144455*
X104500Y144091*
X105000Y143909*
X105750Y143727*
X107000*
X107750Y143909*
X108250Y144091*
X108750Y144455*
X109000Y144818*
Y145545*
X108750Y145909*
X108250Y146273*
X107750Y146455*
X110000Y148091D02*
Y151909D01*
X103750Y153000D02*
X109000D01*
X103750D02*
Y155364D01*
X106250Y153000D02*
Y154455D01*
X103750Y158273D02*
X109000D01*
X103750Y157000D02*
Y159545D01*
X105000Y161364D02*
X104750D01*
X104250Y161545*
X104000Y161727*
X103750Y162091*
Y162818*
X104000Y163182*
X104250Y163364*
X104750Y163545*
X105250*
X105750Y163364*
X106500Y163000*
X109000Y161182*
Y163727*
X105000Y165545D02*
X104750D01*
X104250Y165727*
X104000Y165909*
X103750Y166273*
Y167000*
X104000Y167364*
X104250Y167545*
X104750Y167727*
X105250*
X105750Y167545*
X106500Y167182*
X109000Y165364*
Y167909*
X103750Y170636D02*
X104000Y170091D01*
X104750Y169727*
X106000Y169545*
X106750*
X108000Y169727*
X108750Y170091*
X109000Y170636*
Y171000*
X108750Y171545*
X108000Y171909*
X106750Y172091*
X106000*
X104750Y171909*
X104000Y171545*
X103750Y171000*
Y170636*
Y173727D02*
X109000Y176273D01*
X103750D02*
X109000Y173727D01*
X103750Y179000D02*
X104000Y178455D01*
X104750Y178091*
X106000Y177909*
X106750*
X108000Y178091*
X108750Y178455*
X109000Y179000*
Y179364*
X108750Y179909*
X108000Y180273*
X106750Y180455*
X106000*
X104750Y180273*
X104000Y179909*
X103750Y179364*
Y179000*
X105000Y182273D02*
X104750D01*
X104250Y182455*
X104000Y182636*
X103750Y183000*
Y183727*
X104000Y184091*
X104250Y184273*
X104750Y184455*
X105250*
X105750Y184273*
X106500Y183909*
X109000Y182091*
Y184636*
X103750Y187727D02*
X109000Y186273D01*
X103750Y187727D02*
X109000Y189182D01*
X107250Y186818D02*
Y188636D01*
X223188Y172000D02*
X223375Y171727D01*
X223938Y171318*
X223938D02*
X220000D01*
G54D40*
X120000Y175000D03*
X246000D03*
G54D55*
X161500Y140200D03*
Y147800D03*
X153000Y140200D03*
Y147800D03*
X205000Y132200D03*
Y139800D03*
X196000Y132200D03*
Y139800D03*
X222000Y157200D03*
Y164800D03*
G54D56*
X172200Y187000D03*
X179800D03*
X192800Y159000D03*
X185200D03*
G54D57*
X215900Y202500D03*
X202100D03*
G54D58*
X142000Y136000D03*
Y184000D03*
G54D59*
X216000Y110000D03*
X224000D03*
X220000Y118000D03*
X222000Y135000D03*
X214000D03*
X218000Y127000D03*
G54D60*
X170200Y141000D03*
X177800D03*
X170200Y151000D03*
X177800D03*
X184300Y202000D03*
X176700D03*
X165800D03*
X158200D03*
X176800Y124000D03*
X169200D03*
X161800D03*
X154200D03*
X170200Y159000D03*
X177800D03*
G54D61*
X232000Y136200D03*
Y143800D03*
X222000Y149800D03*
Y142200D03*
X218000Y181200D03*
Y188800D03*
X203000Y180700D03*
Y188300D03*
X189000Y122800D03*
Y115200D03*
X186000Y143200D03*
Y150800D03*
G54D62*
X215750Y172500D03*
X213250D03*
X210750D03*
X208250D03*
X205750D03*
X203250D03*
X200750D03*
X198250D03*
Y149500D03*
X200750D03*
X203250D03*
X205750D03*
X208250D03*
X210750D03*
X213250D03*
X215750D03*
G54D63*
X210087Y114000D03*
X195913D03*
X181087D03*
X166913D03*
X152087D03*
X137913D03*
G54D64*
X203000D03*
X174000D03*
X145000D03*
G54D65*
X174000Y155000D02*
Y147000D01*
G74*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/XVC_FT220X02A.gvp
0,0 → 1,8
(gerbv-file-version! "2.0A")
(define-layer! 4 (cons 'filename "V1.PHO")(cons 'visible #t)(cons 'color #(0 50115 50115)))
(define-layer! 3 (cons 'filename "T2.PHO")(cons 'visible #t)(cons 'color #(30069 62194 26471)))
(define-layer! 2 (cons 'filename "M1.PHO")(cons 'visible #t)(cons 'color #(49601 0 57568)))
(define-layer! 1 (cons 'filename "DRILL.DRL")(cons 'visible #f)(cons 'color #(65535 32639 29555))(cons 'attribs (list (list 'autodetect 'Boolean 1) (list 'zero_supression 'Enum 0) (list 'units 'Enum 0) (list 'digits 'Integer 4))))
(define-layer! 0 (cons 'filename "BOARD.PHO")(cons 'visible #t)(cons 'color #(29555 29555 57054)))
(define-layer! -1 (cons 'filename "/home/kaklik/svnMLAB/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI")(cons 'visible #f)(cons 'color #(0 0 0)))
(set-render-type! 3)

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/BOARD.PHO
0,0 → 1,347
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD024C,0.001*%
%ADD025C,0.01*%
%ADD029C,0.005*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D24*
G01X101000Y101000D02*
X101003D01*
X259000D02*
X259003D01*
X259000D02*
X259003D01*
X259000Y219000D02*
X259003D01*
G54D25*
X101000Y90000D02*
X162227D01*
X101000D02*
X111000Y92500D01*
Y87500*
X101000Y90000*
X259000D02*
X197773D01*
X259000D02*
X249000Y87500D01*
Y92500*
X259000Y90000*
X101000Y96000D02*
Y85000D01*
X259000Y96000D02*
Y85000D01*
X165227Y91563D02*
X165682Y91875D01*
X166364Y92813*
X166364D02*
Y86250D01*
X171364Y92813D02*
X169091D01*
X169091D02*
X168864Y90000D01*
X169091Y90313*
X169091D02*
X169773Y90625D01*
X170455*
X171136Y90313*
X171136D02*
X171591Y89688D01*
X171591D02*
X171818Y88750D01*
X171591Y88125*
X171364Y87188*
X171364D02*
X170909Y86563D01*
X170909D02*
X170227Y86250D01*
X169545*
X168864Y86563*
X168864D02*
X168636Y86875D01*
X168409Y87500*
X175000Y92813D02*
X174318Y92500D01*
X174091Y91875*
Y91250*
X174318Y90625*
X174773Y90313*
X174773D02*
X175682Y90000D01*
X176364Y89688*
X176364D02*
X176818Y89063D01*
X176818D02*
X177045Y88438D01*
X177045D02*
Y87500D01*
X176818Y86875*
X176591Y86563*
X176591D02*
X175909Y86250D01*
X175000*
X174318Y86563*
X174318D02*
X174091Y86875D01*
X173864Y87500*
Y88438*
X173864D02*
X174091Y89063D01*
X174091D02*
X174545Y89688D01*
X174545D02*
X175227Y90000D01*
X176136Y90313*
X176136D02*
X176591Y90625D01*
X176818Y91250*
Y91875*
X176591Y92500*
X175909Y92813*
X175909D02*
X175000D01*
X180455D02*
X179773Y92500D01*
X179318Y91563*
X179318D02*
X179091Y90000D01*
Y89063*
X179091D02*
X179318Y87500D01*
X179773Y86563*
X179773D02*
X180455Y86250D01*
X180909*
X181591Y86563*
X181591D02*
X182045Y87500D01*
X182273Y89063*
X182273D02*
Y90000D01*
X182045Y91563*
X182045D02*
X181591Y92500D01*
X180909Y92813*
X180909D02*
X180455D01*
X184318Y90625D02*
Y86250D01*
Y89375D02*
X185000Y90313D01*
X185000D02*
X185455Y90625D01*
X186136*
X186591Y90313*
X186591D02*
X186818Y89375D01*
Y86250*
Y89375D02*
X187500Y90313D01*
X187500D02*
X187955Y90625D01*
X188636*
X189091Y90313*
X189091D02*
X189318Y89375D01*
Y86250*
X191364Y92813D02*
X191591Y92500D01*
X191818Y92813*
X191818D02*
X191591Y93125D01*
X191364Y92813*
X191591Y90625D02*
Y86250D01*
X193864Y92813D02*
Y86250D01*
X270000Y101000D02*
Y143364D01*
Y101000D02*
X267500Y111000D01*
X272500*
X270000Y101000*
Y219000D02*
Y176636D01*
Y219000D02*
X272500Y209000D01*
X267500*
X270000Y219000*
X264000Y101000D02*
X275000D01*
X264000Y219000D02*
X275000D01*
X268437Y146364D02*
X268125Y146818D01*
X267187Y147500*
X267187D02*
X273750D01*
X268437Y149545D02*
X268125Y150000D01*
X267187Y150682*
X267187D02*
X273750D01*
X267187Y153864D02*
X267500Y153182D01*
X268125Y152955*
X268750*
X269375Y153182*
X269687Y153636*
X269687D02*
X270000Y154545D01*
X270312Y155227*
X270312D02*
X270937Y155682D01*
X270937D02*
X271562Y155909D01*
X271562D02*
X272500D01*
X273125Y155682*
X273437Y155455*
X273437D02*
X273750Y154773D01*
Y153864*
X273437Y153182*
X273437D02*
X273125Y152955D01*
X272500Y152727*
X271562*
X271562D02*
X270937Y152955D01*
X270937D02*
X270312Y153409D01*
X270312D02*
X270000Y154091D01*
X269687Y155000*
X269687D02*
X269375Y155455D01*
X268750Y155682*
X268125*
X267500Y155455*
X267187Y154773*
X267187D02*
Y153864D01*
Y159318D02*
X267500Y158636D01*
X268437Y158182*
X268437D02*
X270000Y157955D01*
X270937*
X270937D02*
X272500Y158182D01*
X273437Y158636*
X273437D02*
X273750Y159318D01*
Y159773*
X273437Y160455*
X273437D02*
X272500Y160909D01*
X270937Y161136*
X270937D02*
X270000D01*
X268437Y160909*
X268437D02*
X267500Y160455D01*
X267187Y159773*
X267187D02*
Y159318D01*
X269375Y163182D02*
X273750D01*
X270625D02*
X269687Y163864D01*
X269687D02*
X269375Y164318D01*
Y165000*
X269687Y165455*
X269687D02*
X270625Y165682D01*
X273750*
X270625D02*
X269687Y166364D01*
X269687D02*
X269375Y166818D01*
Y167500*
X269687Y167955*
X269687D02*
X270625Y168182D01*
X273750*
X267187Y170227D02*
X267500Y170455D01*
X267187Y170682*
X267187D02*
X266875Y170455D01*
X267187Y170227*
X269375Y170455D02*
X273750D01*
X267187Y172727D02*
X273750D01*
G54D29*
X101000Y101000D02*
X259000D01*
Y219000*
X101000*
Y101000*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/DRILL.DRL
0,0 → 1,35
%
T1C.035F197S55
X0138Y0211
X0168Y0211
X0158Y0211
X0188Y0211
X0191Y0179
X0181Y0179
X0171Y0179
X0191Y0169
X0171Y0169
X0181Y0169
X023Y0155
X023Y0165
X023Y0175
X0208Y0211
X0218Y0211
T2C.037F197S55
X0161Y0155
X0153Y0155
X0161Y0165
X0153Y0165
T3C.09F066S55
X0142Y0136
X0142Y0184
T4C.10433F069S658
X0145Y0114
X0174Y0114
X0203Y0114
T5C.12598F035S794
X012Y012
X012Y02
X024Y02
X024Y012
M30

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/DRILL.rep
0,0 → 1,16
Drill Sizes Report
==================
Tool Size Pltd Feed Speed Qty
==== ==== ==== ==== ===== ===
1 35 - 197 550 15
2 37 - 197 550 4
3 90 - 66 550 2
4 104.33 - 69 658 3
5 125.98 - 35 794 4

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/CAM_PROFI/T2.PHO
0,0 → 1,1300
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD020C,0.012*%
%ADD024C,0.001*%
%ADD025C,0.01*%
%ADD029C,0.005*%
%ADD036C,0.008*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D20*
G01X219875Y167727D02*
X213875D01*
X212750Y167455*
X212375Y167182*
X212000Y166636*
Y166091*
X212375Y165545*
X212750Y165273*
X213875Y165000*
X214625*
X219875Y172091D02*
X212000D01*
X219875Y170182D02*
Y174000D01*
Y178636D02*
X212000Y176455D01*
X219875Y178636D02*
X212000Y180818D01*
X214625Y177273D02*
Y180000D01*
X218000Y187364D02*
X218750Y187091D01*
X219500Y186545*
X219875Y186000*
Y184909*
X219500Y184364*
X218750Y183818*
X218000Y183545*
X216875Y183273*
X215000*
X213875Y183545*
X213125Y183818*
X212375Y184364*
X212000Y184909*
Y186000*
X212375Y186545*
X213125Y187091*
X213875Y187364*
X215000*
Y186000D02*
Y187364D01*
G54D24*
G54D25*
X247000Y147563D02*
X243818Y141000D01*
Y147563D02*
X247000Y141000D01*
X241773Y147563D02*
X241545Y147250D01*
X241318Y147563*
X241318D02*
X241545Y147875D01*
X241773Y147563*
X241545Y145375D02*
Y141000D01*
X239273Y147563D02*
Y141000D01*
X237227Y147563D02*
X237000Y147250D01*
X236773Y147563*
X236773D02*
X237000Y147875D01*
X237227Y147563*
X237000Y145375D02*
Y141000D01*
X234727Y145375D02*
Y141000D01*
Y144125D02*
X234045Y145063D01*
X234045D02*
X233591Y145375D01*
X232909*
X232455Y145063*
X232455D02*
X232227Y144125D01*
Y141000*
X230182Y145375D02*
X227682Y141000D01*
Y145375D02*
X230182Y141000D01*
X220409Y147563D02*
X218591Y141000D01*
X216773Y147563D02*
X218591Y141000D01*
X214727Y147563D02*
X214500Y147250D01*
X214273Y147563*
X214273D02*
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X177909Y152000*
X177545Y151250*
X177000Y151000*
X176636*
X176091Y151250*
X175727Y152000*
X175545Y153250*
Y154000*
X175727Y155250*
X176091Y156000*
X176636Y156250*
X177000*
X173727Y155000D02*
Y155250D01*
X173545Y155750*
X173364Y156000*
X173000Y156250*
X172273*
X171909Y156000*
X171727Y155750*
X171545Y155250*
Y154750*
X171727Y154250*
X172091Y153500*
X173909Y151000*
X171364*
X168273Y156250D02*
X169727Y151000D01*
X168273Y156250D02*
X166818Y151000D01*
X169182Y152750D02*
X167364D01*
X212000Y137250D02*
X211091Y132000D01*
X210182Y137250D02*
X211091Y132000D01*
X210182Y137250D02*
X209273Y132000D01*
X208364Y137250D02*
X209273Y132000D01*
X206727Y137250D02*
X205818Y132000D01*
X204909Y137250D02*
X205818Y132000D01*
X204909Y137250D02*
X204000Y132000D01*
X203091Y137250D02*
X204000Y132000D01*
X201455Y137250D02*
X200545Y132000D01*
X199636Y137250D02*
X200545Y132000D01*
X199636Y137250D02*
X198727Y132000D01*
X197818Y137250D02*
X198727Y132000D01*
X196000Y132500D02*
X196182Y132250D01*
X196000Y132000*
X195818Y132250*
X196000Y132500*
X194182Y137250D02*
Y132000D01*
Y137250D02*
X192727Y132000D01*
X191273Y137250D02*
X192727Y132000D01*
X191273Y137250D02*
Y132000D01*
X189636Y137250D02*
Y132000D01*
X187455*
X184364Y137250D02*
X185818Y132000D01*
X184364Y137250D02*
X182909Y132000D01*
X185273Y133750D02*
X183455D01*
X181273Y137250D02*
Y132000D01*
Y137250D02*
X179636D01*
X179091Y137000*
X178909Y136750*
X178727Y136250*
Y135750*
X178909Y135250*
X179091Y135000*
X179636Y134750*
X181273D02*
X179636D01*
X179091Y134500*
X178909Y134250*
X178727Y133750*
Y133000*
X178909Y132500*
X179091Y132250*
X179636Y132000*
X181273*
X176909Y132500D02*
X177091Y132250D01*
X176909Y132000*
X176727Y132250*
X176909Y132500*
X172364Y136000D02*
X172545Y136500D01*
X172909Y137000*
X173273Y137250*
X174000*
X174364Y137000*
X174727Y136500*
X174909Y136000*
X175091Y135250*
Y134000*
X174909Y133250*
X174727Y132750*
X174364Y132250*
X174000Y132000*
X173273*
X172909Y132250*
X172545Y132750*
X172364Y133250*
X168182Y137250D02*
X170727Y132000D01*
Y137250D02*
X168182D01*
X170727Y132000D02*
X168182D01*
X253727Y138250D02*
X254091Y137750D01*
X254455Y137000*
X254818Y136000*
X255000Y134750*
Y133750*
X254818Y132500*
X254455Y131500*
X254091Y130750*
X253727Y130250*
X249909Y134750D02*
X250273Y135250D01*
X250636Y135500*
X251182*
X251545Y135250*
X251909Y134750*
X252091Y134000*
Y133500*
X251909Y132750*
X251545Y132250*
X251182Y132000*
X250636*
X250273Y132250*
X249909Y132750*
X248273Y138250D02*
X247909Y137750D01*
X247545Y137000*
X247182Y136000*
X247000Y134750*
Y133750*
X247182Y132500*
X247545Y131500*
X247909Y130750*
X248273Y130250*
X245364Y135500D02*
Y132000D01*
Y134500D02*
X244818Y135250D01*
X244455Y135500*
X243909*
X243545Y135250*
X243364Y134500*
Y132000*
Y134500D02*
X242818Y135250D01*
X242455Y135500*
X241909*
X241545Y135250*
X241364Y134500*
Y132000*
X239727Y137250D02*
X239545Y137000D01*
X239364Y137250*
X239545Y137500*
X239727Y137250*
X239545Y135500D02*
Y132000D01*
X237727Y137250D02*
Y132000D01*
Y134500D02*
X237182Y135250D01*
X236818Y135500*
X236273*
X235909Y135250*
X235727Y134500*
Y132000*
X233182Y135500D02*
X233545Y135250D01*
X233909Y134750*
X234091Y134000*
Y133500*
X233909Y132750*
X233545Y132250*
X233182Y132000*
X232636*
X232273Y132250*
X231909Y132750*
X231727Y133500*
Y134000*
X231909Y134750*
X232273Y135250*
X232636Y135500*
X233182*
X229909Y136000D02*
Y136250D01*
X229727Y136750*
X229545Y137000*
X229182Y137250*
X228455*
X228091Y137000*
X227909Y136750*
X227727Y136250*
Y135750*
X227909Y135250*
X228273Y134500*
X230091Y132000*
X227545*
X224818Y137250D02*
X225364Y137000D01*
X225727Y136250*
X225909Y135000*
Y134250*
X225727Y133000*
X225364Y132250*
X224818Y132000*
X224455*
X223909Y132250*
X223545Y133000*
X223364Y134250*
Y135000*
X223545Y136250*
X223909Y137000*
X224455Y137250*
X224818*
X221727Y136250D02*
X221364Y136500D01*
X220818Y137250*
Y132000*
X218818Y137250D02*
X216818D01*
X217909Y135250*
X217364*
X217000Y135000*
X216818Y134750*
X216636Y134000*
Y133500*
X216818Y132750*
X217182Y132250*
X217727Y132000*
X218273*
X218818Y132250*
X219000Y132500*
X219182Y133000*
X236000Y174000D02*
X238000D01*
Y166000*
X236000*
Y163000D02*
X238000D01*
Y155000*
X236000*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PCB/XVC_FT220X02A.pcb
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/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/TODO.txt
0,0 → 1,2
Nektere soucasky maji moc malou mezeru v odmaskovanych ploskach. a asi bude dochazet k jejich slevani pri letovani

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/PrjInfo.txt
0,0 → 1,26
//
// Toto je popisný soubor pro popis obsahu adresáře (příklad)
//
[InfoShortDescription.en]
Xilinx Virtual (JTAG) Cable with FTDI FT220X chip
[InfoShortDescription.cs]
Xilinx Virtual (JTAG) Cable s obvodem FTDI FT220X
[InfoLongDescription.en]
XVC JTAG programming cable for downloading and debug projects
with XILINX FPGA/CPLD device. It is directly supported by ISE
design software (and Chipscope as well). The design software
sends commands across network to the computer with this cable
attached to it and supporting software sends data to JTAG
interface. This XVC cable is based on a cheap FTDI FT220X chip.
[InfoLongDescription.cs]
XVC JTAG programovací kabel pro nahrávání konfigurace a ladění
zařízení s obvody FPGA/CPLD firmy XILINX. Návrhový systém ISE
komunikuje po síti s obslužným programem, který přijaté JTAG
příkazy odesílá prostřednictvím obvodu FTDI FT220X do obvodu
XILINX.
[End]

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.ASC
0,0 → 1,121
*PADS-PCB*
*PART*
C1 C,47pF@C0805
C2 C,47pF@C0805
C3 C,10nF@C0805
C4 C,100nF@C0805
C5 C,10uF@C0805
C6 C,100nF@C0805
C7 C,100nF@C0805
D1 LED,HCL-1508ABD-A(BLUE)@LED1206REV
D2 LED,HCL-1508ABD-A(BLUE)@LED1206REV
D3 LED,HCL-1508ABD-A(BLUE)@LED1206REV
D4 D,BZV55-B3V6@MINIMELF
F1 R0805,SR075_SMD0805@R0805
J1 USB_B,USB_B_01@USB_B_01
J2 JUMP9_X3_X5_X8,JUMP9_X3_X5_X8@JUMP9_X3_X5_X8
J3 JUMP3,JUMP3@JUMP3
J4 JUMP2X3,JUMP2X3@JUMP2X3
L1 R0805,MI0805K400R-10@R0805
M1 PAD,HOLE_M3@HOLE_M3
M100 No_PCB_Device,Screw M3x12@No_PCB_Footprint
M101 No_PCB_Device,Screw M3x12@No_PCB_Footprint
M102 No_PCB_Device,Screw M3x12@No_PCB_Footprint
M103 No_PCB_Device,Screw M3x12@No_PCB_Footprint
M104 No_PCB_Device,Washer M3@No_PCB_Footprint
M105 No_PCB_Device,Washer M3@No_PCB_Footprint
M106 No_PCB_Device,Washer M3@No_PCB_Footprint
M107 No_PCB_Device,Washer M3@No_PCB_Footprint
M108 No_PCB_Device,Standoff M3x5@No_PCB_Footprint
M109 No_PCB_Device,Standoff M3x5@No_PCB_Footprint
M110 No_PCB_Device,Standoff M3x5@No_PCB_Footprint
M111 No_PCB_Device,Standoff M3x5@No_PCB_Footprint
M112 No_PCB_Device,JUMPER@No_PCB_Footprint
M2 PAD,HOLE_M3@HOLE_M3
M3 PAD,HOLE_M3@HOLE_M3
M4 PAD,HOLE_M3@HOLE_M3
M5 FIDU,FIDU@FIDU
M6 FIDU,FIDU@FIDU
M7 FIDU_PASTE,FIDU_PASTE@FIDU_PASTE
M8 FIDU_PASTE,FIDU_PASTE@FIDU_PASTE
Q1 T-FET-GSD,2N7000SMD@SOT23
Q2 T-FET-GSD,2N7000SMD@SOT23
R1 R,27@R0805
R10 R,10k@R0805
R11 R,10k@R0805
R2 R,27@R0805
R3 R,100@R0805
R4 R,100@R0805
R5 R,100@R0805
R6 R,100@R0805
R7 R,330@R0805
R8 R,330@R0805
R9 R,330@R0805
TP1 TP,TPS@TPS
TP2 TP,TPS@TPS
TP3 TP,TPS@TPS
U1 SSO16_154,FT220XS@SSO16_154
*NET*
*SIGNAL* TMS
U1.6 R6.1
*SIGNAL* N00894
D1.C Q1.D
*SIGNAL* GND
J2.2 J1.4 C1.1 C2.1 C4.1 C5.1 C6.1 C7.1
D3.C Q1.S Q2.S R11.1 U1.13 U1.5 J1.6 J1.5
D4.A M1.1 M2.1 M3.1 M4.1 J4.1 J4.2 J4.5
J4.6 C3.1
*SIGNAL* VCC
L1.2 C4.2 C5.2 U1.12
*SIGNAL* N00158
J1.1 F1.1
*SIGNAL* N00742
R6.2 J2.9
*SIGNAL* N01042
R8.2 D2.A
*SIGNAL* VCC_3V3
C6.2 U1.10 U1.11 R7.1 R8.1 R9.1 J3.1
*SIGNAL* VCC_IO
C7.2 U1.3 J3.2
*SIGNAL* USBDM
J1.2 C1.2 R1.1
*SIGNAL* USBDP
J1.3 C2.2 R2.1
*SIGNAL* N00252
R1.2 U1.9
*SIGNAL* VCC_TARGET
J2.1 R10.2 J3.3 D4.C
*SIGNAL* TDI
U1.4 R5.1
*SIGNAL* N01044
Q2.D D2.C
*SIGNAL* CBUS3
Q2.G R11.2 U1.16
*SIGNAL* N00821
R9.2 D3.A
*SIGNAL* N00733
R3.2 J2.4
*SIGNAL* N00739
R5.2 J2.7
*SIGNAL* N00830
R7.2 D1.A
*SIGNAL* N00736
R4.2 J2.6
*SIGNAL* N00254
R2.2 U1.8
*SIGNAL* TCK
U1.1 R3.1
*SIGNAL* N0000914
U1.14 TP2.1
*SIGNAL* N000094
U1.7 TP1.1
*SIGNAL* N0000915
U1.15 TP3.1
*SIGNAL* N00353
F1.2 L1.1 C3.2 J4.3 J4.4
*SIGNAL* N00934
Q1.G R10.1
*SIGNAL* TDO
U1.2 R4.1
*END*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A.DSN
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/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/SCH/XVC_FT220X02A_SCH.PDF
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/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/PrjInfo.txt
0,0 → 1,29
//
// Toto je popisný soubor pro popis obsahu adresáře (příklad)
//
[InfoShortDescription.en]
Xilinx Virtual Cable Sofware (program mlab_xvcd)
[InfoShortDescription.cs]
Xilinx Virtual Cable Sofware (program mlab_xvcd)
[InfoLongDescription.en]
The mlab_xvcd program converts JTAG commands received across TCP/IP
network via XVC protocol to outputs of the programming
cable (module) which is based on FTDI's USB chips like
popular FT232R, FT220X etc.
Used XVC protocol is directly supported by XILINX development
tools (both configuration tool IMPACT and debugging
embedded logic analyzer ChipScope Analyzer).
[InfoLongDescription.cs]
Program mlab_xvcd je obslužný program, který převádí JTAG příkazy
zasílané prostřednictvím XVC protokolu přes TCP/IP síť
na příslušné výstupy JTAG kabelu (modulku) založeného
na USB převodnících firmy FTDI (FT232R, FT220X, ...).
Protokol XVC přímo podporují vývojové nástroje XILINX
(nahrávání konfigurace program IMPACT a ladění pomocí
logického analyzátoru ChipScope Analyzer).
[End]

/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/!____!.txt
0,0 → 1,14
FTDI D2XX library, use latest version from http://www.ftdichip.com
ftd2xx.h
ftd2xx.lib
Main program, pin configuration is here (in .h file)
mlab_xvcd.h
mlab_xvcd.cpp
Hardware layer, uses FTDI D2XX library
mlab_xvcd_port_FTDI.h
mlab_xvcd_port_FTDI.cpp

/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/BIN/mlab_xvcd.exe
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/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ftd2xx.h
0,0 → 1,1341
/*++
Copyright © 2001-2011 Future Technology Devices International Limited
THIS SOFTWARE IS PROVIDED BY FUTURE TECHNOLOGY DEVICES INTERNATIONAL LIMITED "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
FUTURE TECHNOLOGY DEVICES INTERNATIONAL LIMITED BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
OF SUBSTITUTE GOODS OR SERVICES LOSS OF USE, DATA, OR PROFITS OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
FTDI DRIVERS MAY BE USED ONLY IN CONJUNCTION WITH PRODUCTS BASED ON FTDI PARTS.
FTDI DRIVERS MAY BE DISTRIBUTED IN ANY FORM AS LONG AS LICENSE INFORMATION IS NOT MODIFIED.
IF A CUSTOM VENDOR ID AND/OR PRODUCT ID OR DESCRIPTION STRING ARE USED, IT IS THE
RESPONSIBILITY OF THE PRODUCT MANUFACTURER TO MAINTAIN ANY CHANGES AND SUBSEQUENT WHQL
RE-CERTIFICATION AS A RESULT OF MAKING THESE CHANGES.
Module Name:
ftd2xx.h
Abstract:
Native USB device driver for FTDI FT232x, FT245x, FT2232x and FT4232x devices
FTD2XX library definitions
Environment:
kernel & user mode
--*/
#ifndef FTD2XX_H
#define FTD2XX_H
// The following ifdef block is the standard way of creating macros
// which make exporting from a DLL simpler. All files within this DLL
// are compiled with the FTD2XX_EXPORTS symbol defined on the command line.
// This symbol should not be defined on any project that uses this DLL.
// This way any other project whose source files include this file see
// FTD2XX_API functions as being imported from a DLL, whereas this DLL
// sees symbols defined with this macro as being exported.
#ifdef FTD2XX_EXPORTS
#define FTD2XX_API __declspec(dllexport)
#else
#define FTD2XX_API __declspec(dllimport)
#endif
typedef PVOID FT_HANDLE;
typedef ULONG FT_STATUS;
//
// Device status
//
enum {
FT_OK,
FT_INVALID_HANDLE,
FT_DEVICE_NOT_FOUND,
FT_DEVICE_NOT_OPENED,
FT_IO_ERROR,
FT_INSUFFICIENT_RESOURCES,
FT_INVALID_PARAMETER,
FT_INVALID_BAUD_RATE,
FT_DEVICE_NOT_OPENED_FOR_ERASE,
FT_DEVICE_NOT_OPENED_FOR_WRITE,
FT_FAILED_TO_WRITE_DEVICE,
FT_EEPROM_READ_FAILED,
FT_EEPROM_WRITE_FAILED,
FT_EEPROM_ERASE_FAILED,
FT_EEPROM_NOT_PRESENT,
FT_EEPROM_NOT_PROGRAMMED,
FT_INVALID_ARGS,
FT_NOT_SUPPORTED,
FT_OTHER_ERROR,
FT_DEVICE_LIST_NOT_READY,
};
#define FT_SUCCESS(status) ((status) == FT_OK)
//
// FT_OpenEx Flags
//
#define FT_OPEN_BY_SERIAL_NUMBER 1
#define FT_OPEN_BY_DESCRIPTION 2
#define FT_OPEN_BY_LOCATION 4
//
// FT_ListDevices Flags (used in conjunction with FT_OpenEx Flags
//
#define FT_LIST_NUMBER_ONLY 0x80000000
#define FT_LIST_BY_INDEX 0x40000000
#define FT_LIST_ALL 0x20000000
#define FT_LIST_MASK (FT_LIST_NUMBER_ONLY|FT_LIST_BY_INDEX|FT_LIST_ALL)
//
// Baud Rates
//
#define FT_BAUD_300 300
#define FT_BAUD_600 600
#define FT_BAUD_1200 1200
#define FT_BAUD_2400 2400
#define FT_BAUD_4800 4800
#define FT_BAUD_9600 9600
#define FT_BAUD_14400 14400
#define FT_BAUD_19200 19200
#define FT_BAUD_38400 38400
#define FT_BAUD_57600 57600
#define FT_BAUD_115200 115200
#define FT_BAUD_230400 230400
#define FT_BAUD_460800 460800
#define FT_BAUD_921600 921600
//
// Word Lengths
//
#define FT_BITS_8 (UCHAR) 8
#define FT_BITS_7 (UCHAR) 7
//
// Stop Bits
//
#define FT_STOP_BITS_1 (UCHAR) 0
#define FT_STOP_BITS_2 (UCHAR) 2
//
// Parity
//
#define FT_PARITY_NONE (UCHAR) 0
#define FT_PARITY_ODD (UCHAR) 1
#define FT_PARITY_EVEN (UCHAR) 2
#define FT_PARITY_MARK (UCHAR) 3
#define FT_PARITY_SPACE (UCHAR) 4
//
// Flow Control
//
#define FT_FLOW_NONE 0x0000
#define FT_FLOW_RTS_CTS 0x0100
#define FT_FLOW_DTR_DSR 0x0200
#define FT_FLOW_XON_XOFF 0x0400
//
// Purge rx and tx buffers
//
#define FT_PURGE_RX 1
#define FT_PURGE_TX 2
//
// Events
//
typedef void (*PFT_EVENT_HANDLER)(DWORD,DWORD);
#define FT_EVENT_RXCHAR 1
#define FT_EVENT_MODEM_STATUS 2
#define FT_EVENT_LINE_STATUS 4
//
// Timeouts
//
#define FT_DEFAULT_RX_TIMEOUT 300
#define FT_DEFAULT_TX_TIMEOUT 300
//
// Device types
//
typedef ULONG FT_DEVICE;
enum {
FT_DEVICE_BM,
FT_DEVICE_AM,
FT_DEVICE_100AX,
FT_DEVICE_UNKNOWN,
FT_DEVICE_2232C,
FT_DEVICE_232R,
FT_DEVICE_2232H,
FT_DEVICE_4232H,
FT_DEVICE_232H,
FT_DEVICE_X_SERIES
};
//
// Bit Modes
//
#define FT_BITMODE_RESET 0x00
#define FT_BITMODE_ASYNC_BITBANG 0x01
#define FT_BITMODE_MPSSE 0x02
#define FT_BITMODE_SYNC_BITBANG 0x04
#define FT_BITMODE_MCU_HOST 0x08
#define FT_BITMODE_FAST_SERIAL 0x10
#define FT_BITMODE_CBUS_BITBANG 0x20
#define FT_BITMODE_SYNC_FIFO 0x40
//
// FT232R CBUS Options EEPROM values
//
#define FT_232R_CBUS_TXDEN 0x00 // Tx Data Enable
#define FT_232R_CBUS_PWRON 0x01 // Power On
#define FT_232R_CBUS_RXLED 0x02 // Rx LED
#define FT_232R_CBUS_TXLED 0x03 // Tx LED
#define FT_232R_CBUS_TXRXLED 0x04 // Tx and Rx LED
#define FT_232R_CBUS_SLEEP 0x05 // Sleep
#define FT_232R_CBUS_CLK48 0x06 // 48MHz clock
#define FT_232R_CBUS_CLK24 0x07 // 24MHz clock
#define FT_232R_CBUS_CLK12 0x08 // 12MHz clock
#define FT_232R_CBUS_CLK6 0x09 // 6MHz clock
#define FT_232R_CBUS_IOMODE 0x0A // IO Mode for CBUS bit-bang
#define FT_232R_CBUS_BITBANG_WR 0x0B // Bit-bang write strobe
#define FT_232R_CBUS_BITBANG_RD 0x0C // Bit-bang read strobe
//
// FT232H CBUS Options EEPROM values
//
#define FT_232H_CBUS_TRISTATE 0x00 // Tristate
#define FT_232H_CBUS_TXLED 0x01 // Tx LED
#define FT_232H_CBUS_RXLED 0x02 // Rx LED
#define FT_232H_CBUS_TXRXLED 0x03 // Tx and Rx LED
#define FT_232H_CBUS_PWREN 0x04 // Power Enable
#define FT_232H_CBUS_SLEEP 0x05 // Sleep
#define FT_232H_CBUS_DRIVE_0 0x06 // Drive pin to logic 0
#define FT_232H_CBUS_DRIVE_1 0x07 // Drive pin to logic 1
#define FT_232H_CBUS_IOMODE 0x08 // IO Mode for CBUS bit-bang
#define FT_232H_CBUS_TXDEN 0x09 // Tx Data Enable
#define FT_232H_CBUS_CLK30 0x0A // 30MHz clock
#define FT_232H_CBUS_CLK15 0x0B // 15MHz clock
#define FT_232H_CBUS_CLK7_5 0x0C // 7.5MHz clock
//
// FT X Series CBUS Options EEPROM values
//
#define FT_X_SERIES_CBUS_TRISTATE 0x00 // Tristate
#define FT_X_SERIES_CBUS_RXLED 0x01 // Tx LED
#define FT_X_SERIES_CBUS_TXLED 0x02 // Rx LED
#define FT_X_SERIES_CBUS_TXRXLED 0x03 // Tx and Rx LED
#define FT_X_SERIES_CBUS_PWREN 0x04 // Power Enable
#define FT_X_SERIES_CBUS_SLEEP 0x05 // Sleep
#define FT_X_SERIES_CBUS_DRIVE_0 0x06 // Drive pin to logic 0
#define FT_X_SERIES_CBUS_DRIVE_1 0x07 // Drive pin to logic 1
#define FT_X_SERIES_CBUS_IOMODE 0x08 // IO Mode for CBUS bit-bang
#define FT_X_SERIES_CBUS_TXDEN 0x09 // Tx Data Enable
#define FT_X_SERIES_CBUS_CLK24 0x0A // 24MHz clock
#define FT_X_SERIES_CBUS_CLK12 0x0B // 12MHz clock
#define FT_X_SERIES_CBUS_CLK6 0x0C // 6MHz clock
#define FT_X_SERIES_CBUS_BCD_CHARGER 0x0D // Battery charger detected
#define FT_X_SERIES_CBUS_BCD_CHARGER_N 0x0E // Battery charger detected inverted
#define FT_X_SERIES_CBUS_I2C_TXE 0x0F // I2C Tx empty
#define FT_X_SERIES_CBUS_I2C_RXF 0x10 // I2C Rx full
#define FT_X_SERIES_CBUS_VBUS_SENSE 0x11 // Detect VBUS
#define FT_X_SERIES_CBUS_BITBANG_WR 0x12 // Bit-bang write strobe
#define FT_X_SERIES_CBUS_BITBANG_RD 0x13 // Bit-bang read strobe
#define FT_X_SERIES_CBUS_TIMESTAMP 0x14 // Toggle output when a USB SOF token is received
#define FT_X_SERIES_CBUS_KEEP_AWAKE 0x15 //
// Driver types
#define FT_DRIVER_TYPE_D2XX 0
#define FT_DRIVER_TYPE_VCP 1
#ifdef __cplusplus
extern "C" {
#endif
FTD2XX_API
FT_STATUS WINAPI FT_Open(
int deviceNumber,
FT_HANDLE *pHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_OpenEx(
PVOID pArg1,
DWORD Flags,
FT_HANDLE *pHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_ListDevices(
PVOID pArg1,
PVOID pArg2,
DWORD Flags
);
FTD2XX_API
FT_STATUS WINAPI FT_Close(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_Read(
FT_HANDLE ftHandle,
LPVOID lpBuffer,
DWORD dwBytesToRead,
LPDWORD lpBytesReturned
);
FTD2XX_API
FT_STATUS WINAPI FT_Write(
FT_HANDLE ftHandle,
LPVOID lpBuffer,
DWORD dwBytesToWrite,
LPDWORD lpBytesWritten
);
FTD2XX_API
FT_STATUS WINAPI FT_IoCtl(
FT_HANDLE ftHandle,
DWORD dwIoControlCode,
LPVOID lpInBuf,
DWORD nInBufSize,
LPVOID lpOutBuf,
DWORD nOutBufSize,
LPDWORD lpBytesReturned,
LPOVERLAPPED lpOverlapped
);
FTD2XX_API
FT_STATUS WINAPI FT_SetBaudRate(
FT_HANDLE ftHandle,
ULONG BaudRate
);
FTD2XX_API
FT_STATUS WINAPI FT_SetDivisor(
FT_HANDLE ftHandle,
USHORT Divisor
);
FTD2XX_API
FT_STATUS WINAPI FT_SetDataCharacteristics(
FT_HANDLE ftHandle,
UCHAR WordLength,
UCHAR StopBits,
UCHAR Parity
);
FTD2XX_API
FT_STATUS WINAPI FT_SetFlowControl(
FT_HANDLE ftHandle,
USHORT FlowControl,
UCHAR XonChar,
UCHAR XoffChar
);
FTD2XX_API
FT_STATUS WINAPI FT_ResetDevice(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_SetDtr(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_ClrDtr(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_SetRts(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_ClrRts(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_GetModemStatus(
FT_HANDLE ftHandle,
ULONG *pModemStatus
);
FTD2XX_API
FT_STATUS WINAPI FT_SetChars(
FT_HANDLE ftHandle,
UCHAR EventChar,
UCHAR EventCharEnabled,
UCHAR ErrorChar,
UCHAR ErrorCharEnabled
);
FTD2XX_API
FT_STATUS WINAPI FT_Purge(
FT_HANDLE ftHandle,
ULONG Mask
);
FTD2XX_API
FT_STATUS WINAPI FT_SetTimeouts(
FT_HANDLE ftHandle,
ULONG ReadTimeout,
ULONG WriteTimeout
);
FTD2XX_API
FT_STATUS WINAPI FT_GetQueueStatus(
FT_HANDLE ftHandle,
DWORD *dwRxBytes
);
FTD2XX_API
FT_STATUS WINAPI FT_SetEventNotification(
FT_HANDLE ftHandle,
DWORD Mask,
PVOID Param
);
FTD2XX_API
FT_STATUS WINAPI FT_GetStatus(
FT_HANDLE ftHandle,
DWORD *dwRxBytes,
DWORD *dwTxBytes,
DWORD *dwEventDWord
);
FTD2XX_API
FT_STATUS WINAPI FT_SetBreakOn(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_SetBreakOff(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_SetWaitMask(
FT_HANDLE ftHandle,
DWORD Mask
);
FTD2XX_API
FT_STATUS WINAPI FT_WaitOnMask(
FT_HANDLE ftHandle,
DWORD *Mask
);
FTD2XX_API
FT_STATUS WINAPI FT_GetEventStatus(
FT_HANDLE ftHandle,
DWORD *dwEventDWord
);
FTD2XX_API
FT_STATUS WINAPI FT_ReadEE(
FT_HANDLE ftHandle,
DWORD dwWordOffset,
LPWORD lpwValue
);
FTD2XX_API
FT_STATUS WINAPI FT_WriteEE(
FT_HANDLE ftHandle,
DWORD dwWordOffset,
WORD wValue
);
FTD2XX_API
FT_STATUS WINAPI FT_EraseEE(
FT_HANDLE ftHandle
);
//
// structure to hold program data for FT_EE_Program, FT_EE_ProgramEx, FT_EE_Read
// and FT_EE_ReadEx functions
//
typedef struct ft_program_data {
DWORD Signature1; // Header - must be 0x00000000
DWORD Signature2; // Header - must be 0xffffffff
DWORD Version; // Header - FT_PROGRAM_DATA version
// 0 = original
// 1 = FT2232 extensions
// 2 = FT232R extensions
// 3 = FT2232H extensions
// 4 = FT4232H extensions
// 5 = FT232H extensions
WORD VendorId; // 0x0403
WORD ProductId; // 0x6001
char *Manufacturer; // "FTDI"
char *ManufacturerId; // "FT"
char *Description; // "USB HS Serial Converter"
char *SerialNumber; // "FT000001" if fixed, or NULL
WORD MaxPower; // 0 < MaxPower <= 500
WORD PnP; // 0 = disabled, 1 = enabled
WORD SelfPowered; // 0 = bus powered, 1 = self powered
WORD RemoteWakeup; // 0 = not capable, 1 = capable
//
// Rev4 (FT232B) extensions
//
UCHAR Rev4; // non-zero if Rev4 chip, zero otherwise
UCHAR IsoIn; // non-zero if in endpoint is isochronous
UCHAR IsoOut; // non-zero if out endpoint is isochronous
UCHAR PullDownEnable; // non-zero if pull down enabled
UCHAR SerNumEnable; // non-zero if serial number to be used
UCHAR USBVersionEnable; // non-zero if chip uses USBVersion
WORD USBVersion; // BCD (0x0200 => USB2)
//
// Rev 5 (FT2232) extensions
//
UCHAR Rev5; // non-zero if Rev5 chip, zero otherwise
UCHAR IsoInA; // non-zero if in endpoint is isochronous
UCHAR IsoInB; // non-zero if in endpoint is isochronous
UCHAR IsoOutA; // non-zero if out endpoint is isochronous
UCHAR IsoOutB; // non-zero if out endpoint is isochronous
UCHAR PullDownEnable5; // non-zero if pull down enabled
UCHAR SerNumEnable5; // non-zero if serial number to be used
UCHAR USBVersionEnable5; // non-zero if chip uses USBVersion
WORD USBVersion5; // BCD (0x0200 => USB2)
UCHAR AIsHighCurrent; // non-zero if interface is high current
UCHAR BIsHighCurrent; // non-zero if interface is high current
UCHAR IFAIsFifo; // non-zero if interface is 245 FIFO
UCHAR IFAIsFifoTar; // non-zero if interface is 245 FIFO CPU target
UCHAR IFAIsFastSer; // non-zero if interface is Fast serial
UCHAR AIsVCP; // non-zero if interface is to use VCP drivers
UCHAR IFBIsFifo; // non-zero if interface is 245 FIFO
UCHAR IFBIsFifoTar; // non-zero if interface is 245 FIFO CPU target
UCHAR IFBIsFastSer; // non-zero if interface is Fast serial
UCHAR BIsVCP; // non-zero if interface is to use VCP drivers
//
// Rev 6 (FT232R) extensions
//
UCHAR UseExtOsc; // Use External Oscillator
UCHAR HighDriveIOs; // High Drive I/Os
UCHAR EndpointSize; // Endpoint size
UCHAR PullDownEnableR; // non-zero if pull down enabled
UCHAR SerNumEnableR; // non-zero if serial number to be used
UCHAR InvertTXD; // non-zero if invert TXD
UCHAR InvertRXD; // non-zero if invert RXD
UCHAR InvertRTS; // non-zero if invert RTS
UCHAR InvertCTS; // non-zero if invert CTS
UCHAR InvertDTR; // non-zero if invert DTR
UCHAR InvertDSR; // non-zero if invert DSR
UCHAR InvertDCD; // non-zero if invert DCD
UCHAR InvertRI; // non-zero if invert RI
UCHAR Cbus0; // Cbus Mux control
UCHAR Cbus1; // Cbus Mux control
UCHAR Cbus2; // Cbus Mux control
UCHAR Cbus3; // Cbus Mux control
UCHAR Cbus4; // Cbus Mux control
UCHAR RIsD2XX; // non-zero if using D2XX driver
//
// Rev 7 (FT2232H) Extensions
//
UCHAR PullDownEnable7; // non-zero if pull down enabled
UCHAR SerNumEnable7; // non-zero if serial number to be used
UCHAR ALSlowSlew; // non-zero if AL pins have slow slew
UCHAR ALSchmittInput; // non-zero if AL pins are Schmitt input
UCHAR ALDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR AHSlowSlew; // non-zero if AH pins have slow slew
UCHAR AHSchmittInput; // non-zero if AH pins are Schmitt input
UCHAR AHDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR BLSlowSlew; // non-zero if BL pins have slow slew
UCHAR BLSchmittInput; // non-zero if BL pins are Schmitt input
UCHAR BLDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR BHSlowSlew; // non-zero if BH pins have slow slew
UCHAR BHSchmittInput; // non-zero if BH pins are Schmitt input
UCHAR BHDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR IFAIsFifo7; // non-zero if interface is 245 FIFO
UCHAR IFAIsFifoTar7; // non-zero if interface is 245 FIFO CPU target
UCHAR IFAIsFastSer7; // non-zero if interface is Fast serial
UCHAR AIsVCP7; // non-zero if interface is to use VCP drivers
UCHAR IFBIsFifo7; // non-zero if interface is 245 FIFO
UCHAR IFBIsFifoTar7; // non-zero if interface is 245 FIFO CPU target
UCHAR IFBIsFastSer7; // non-zero if interface is Fast serial
UCHAR BIsVCP7; // non-zero if interface is to use VCP drivers
UCHAR PowerSaveEnable; // non-zero if using BCBUS7 to save power for self-powered designs
//
// Rev 8 (FT4232H) Extensions
//
UCHAR PullDownEnable8; // non-zero if pull down enabled
UCHAR SerNumEnable8; // non-zero if serial number to be used
UCHAR ASlowSlew; // non-zero if A pins have slow slew
UCHAR ASchmittInput; // non-zero if A pins are Schmitt input
UCHAR ADriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR BSlowSlew; // non-zero if B pins have slow slew
UCHAR BSchmittInput; // non-zero if B pins are Schmitt input
UCHAR BDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR CSlowSlew; // non-zero if C pins have slow slew
UCHAR CSchmittInput; // non-zero if C pins are Schmitt input
UCHAR CDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR DSlowSlew; // non-zero if D pins have slow slew
UCHAR DSchmittInput; // non-zero if D pins are Schmitt input
UCHAR DDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR ARIIsTXDEN; // non-zero if port A uses RI as RS485 TXDEN
UCHAR BRIIsTXDEN; // non-zero if port B uses RI as RS485 TXDEN
UCHAR CRIIsTXDEN; // non-zero if port C uses RI as RS485 TXDEN
UCHAR DRIIsTXDEN; // non-zero if port D uses RI as RS485 TXDEN
UCHAR AIsVCP8; // non-zero if interface is to use VCP drivers
UCHAR BIsVCP8; // non-zero if interface is to use VCP drivers
UCHAR CIsVCP8; // non-zero if interface is to use VCP drivers
UCHAR DIsVCP8; // non-zero if interface is to use VCP drivers
//
// Rev 9 (FT232H) Extensions
//
UCHAR PullDownEnableH; // non-zero if pull down enabled
UCHAR SerNumEnableH; // non-zero if serial number to be used
UCHAR ACSlowSlewH; // non-zero if AC pins have slow slew
UCHAR ACSchmittInputH; // non-zero if AC pins are Schmitt input
UCHAR ACDriveCurrentH; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR ADSlowSlewH; // non-zero if AD pins have slow slew
UCHAR ADSchmittInputH; // non-zero if AD pins are Schmitt input
UCHAR ADDriveCurrentH; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR Cbus0H; // Cbus Mux control
UCHAR Cbus1H; // Cbus Mux control
UCHAR Cbus2H; // Cbus Mux control
UCHAR Cbus3H; // Cbus Mux control
UCHAR Cbus4H; // Cbus Mux control
UCHAR Cbus5H; // Cbus Mux control
UCHAR Cbus6H; // Cbus Mux control
UCHAR Cbus7H; // Cbus Mux control
UCHAR Cbus8H; // Cbus Mux control
UCHAR Cbus9H; // Cbus Mux control
UCHAR IsFifoH; // non-zero if interface is 245 FIFO
UCHAR IsFifoTarH; // non-zero if interface is 245 FIFO CPU target
UCHAR IsFastSerH; // non-zero if interface is Fast serial
UCHAR IsFT1248H; // non-zero if interface is FT1248
UCHAR FT1248CpolH; // FT1248 clock polarity - clock idle high (1) or clock idle low (0)
UCHAR FT1248LsbH; // FT1248 data is LSB (1) or MSB (0)
UCHAR FT1248FlowControlH; // FT1248 flow control enable
UCHAR IsVCPH; // non-zero if interface is to use VCP drivers
UCHAR PowerSaveEnableH; // non-zero if using ACBUS7 to save power for self-powered designs
} FT_PROGRAM_DATA, *PFT_PROGRAM_DATA;
FTD2XX_API
FT_STATUS WINAPI FT_EE_Program(
FT_HANDLE ftHandle,
PFT_PROGRAM_DATA pData
);
FTD2XX_API
FT_STATUS WINAPI FT_EE_ProgramEx(
FT_HANDLE ftHandle,
PFT_PROGRAM_DATA pData,
char *Manufacturer,
char *ManufacturerId,
char *Description,
char *SerialNumber
);
FTD2XX_API
FT_STATUS WINAPI FT_EE_Read(
FT_HANDLE ftHandle,
PFT_PROGRAM_DATA pData
);
FTD2XX_API
FT_STATUS WINAPI FT_EE_ReadEx(
FT_HANDLE ftHandle,
PFT_PROGRAM_DATA pData,
char *Manufacturer,
char *ManufacturerId,
char *Description,
char *SerialNumber
);
FTD2XX_API
FT_STATUS WINAPI FT_EE_UASize(
FT_HANDLE ftHandle,
LPDWORD lpdwSize
);
FTD2XX_API
FT_STATUS WINAPI FT_EE_UAWrite(
FT_HANDLE ftHandle,
PUCHAR pucData,
DWORD dwDataLen
);
FTD2XX_API
FT_STATUS WINAPI FT_EE_UARead(
FT_HANDLE ftHandle,
PUCHAR pucData,
DWORD dwDataLen,
LPDWORD lpdwBytesRead
);
typedef struct ft_eeprom_header {
FT_DEVICE deviceType; // FTxxxx device type to be programmed
// Device descriptor options
WORD VendorId; // 0x0403
WORD ProductId; // 0x6001
UCHAR SerNumEnable; // non-zero if serial number to be used
// Config descriptor options
WORD MaxPower; // 0 < MaxPower <= 500
UCHAR SelfPowered; // 0 = bus powered, 1 = self powered
UCHAR RemoteWakeup; // 0 = not capable, 1 = capable
// Hardware options
UCHAR PullDownEnable; // non-zero if pull down in suspend enabled
} FT_EEPROM_HEADER, *PFT_EEPROM_HEADER;
// FT232B EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
typedef struct ft_eeprom_232b {
// Common header
FT_EEPROM_HEADER common; // common elements for all device EEPROMs
} FT_EEPROM_232B, *PFT_EEPROM_232B;
// FT2232 EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
typedef struct ft_eeprom_2232 {
// Common header
FT_EEPROM_HEADER common; // common elements for all device EEPROMs
// Drive options
UCHAR AIsHighCurrent; // non-zero if interface is high current
UCHAR BIsHighCurrent; // non-zero if interface is high current
// Hardware options
UCHAR AIsFifo; // non-zero if interface is 245 FIFO
UCHAR AIsFifoTar; // non-zero if interface is 245 FIFO CPU target
UCHAR AIsFastSer; // non-zero if interface is Fast serial
UCHAR BIsFifo; // non-zero if interface is 245 FIFO
UCHAR BIsFifoTar; // non-zero if interface is 245 FIFO CPU target
UCHAR BIsFastSer; // non-zero if interface is Fast serial
// Driver option
UCHAR ADriverType; //
UCHAR BDriverType; //
} FT_EEPROM_2232, *PFT_EEPROM_2232;
// FT232R EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
typedef struct ft_eeprom_232r {
// Common header
FT_EEPROM_HEADER common; // common elements for all device EEPROMs
// Drive options
UCHAR IsHighCurrent; // non-zero if interface is high current
// Hardware options
UCHAR UseExtOsc; // Use External Oscillator
UCHAR InvertTXD; // non-zero if invert TXD
UCHAR InvertRXD; // non-zero if invert RXD
UCHAR InvertRTS; // non-zero if invert RTS
UCHAR InvertCTS; // non-zero if invert CTS
UCHAR InvertDTR; // non-zero if invert DTR
UCHAR InvertDSR; // non-zero if invert DSR
UCHAR InvertDCD; // non-zero if invert DCD
UCHAR InvertRI; // non-zero if invert RI
UCHAR Cbus0; // Cbus Mux control
UCHAR Cbus1; // Cbus Mux control
UCHAR Cbus2; // Cbus Mux control
UCHAR Cbus3; // Cbus Mux control
UCHAR Cbus4; // Cbus Mux control
// Driver option
UCHAR DriverType; //
} FT_EEPROM_232R, *PFT_EEPROM_232R;
// FT2232H EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
typedef struct ft_eeprom_2232h {
// Common header
FT_EEPROM_HEADER common; // common elements for all device EEPROMs
// Drive options
UCHAR ALSlowSlew; // non-zero if AL pins have slow slew
UCHAR ALSchmittInput; // non-zero if AL pins are Schmitt input
UCHAR ALDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR AHSlowSlew; // non-zero if AH pins have slow slew
UCHAR AHSchmittInput; // non-zero if AH pins are Schmitt input
UCHAR AHDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR BLSlowSlew; // non-zero if BL pins have slow slew
UCHAR BLSchmittInput; // non-zero if BL pins are Schmitt input
UCHAR BLDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR BHSlowSlew; // non-zero if BH pins have slow slew
UCHAR BHSchmittInput; // non-zero if BH pins are Schmitt input
UCHAR BHDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
// Hardware options
UCHAR AIsFifo; // non-zero if interface is 245 FIFO
UCHAR AIsFifoTar; // non-zero if interface is 245 FIFO CPU target
UCHAR AIsFastSer; // non-zero if interface is Fast serial
UCHAR BIsFifo; // non-zero if interface is 245 FIFO
UCHAR BIsFifoTar; // non-zero if interface is 245 FIFO CPU target
UCHAR BIsFastSer; // non-zero if interface is Fast serial
UCHAR PowerSaveEnable; // non-zero if using BCBUS7 to save power for self-powered designs
// Driver option
UCHAR ADriverType; //
UCHAR BDriverType; //
} FT_EEPROM_2232H, *PFT_EEPROM_2232H;
// FT4232H EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
typedef struct ft_eeprom_4232h {
// Common header
FT_EEPROM_HEADER common; // common elements for all device EEPROMs
// Drive options
UCHAR ASlowSlew; // non-zero if A pins have slow slew
UCHAR ASchmittInput; // non-zero if A pins are Schmitt input
UCHAR ADriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR BSlowSlew; // non-zero if B pins have slow slew
UCHAR BSchmittInput; // non-zero if B pins are Schmitt input
UCHAR BDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR CSlowSlew; // non-zero if C pins have slow slew
UCHAR CSchmittInput; // non-zero if C pins are Schmitt input
UCHAR CDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR DSlowSlew; // non-zero if D pins have slow slew
UCHAR DSchmittInput; // non-zero if D pins are Schmitt input
UCHAR DDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
// Hardware options
UCHAR ARIIsTXDEN; // non-zero if port A uses RI as RS485 TXDEN
UCHAR BRIIsTXDEN; // non-zero if port B uses RI as RS485 TXDEN
UCHAR CRIIsTXDEN; // non-zero if port C uses RI as RS485 TXDEN
UCHAR DRIIsTXDEN; // non-zero if port D uses RI as RS485 TXDEN
// Driver option
UCHAR ADriverType; //
UCHAR BDriverType; //
UCHAR CDriverType; //
UCHAR DDriverType; //
} FT_EEPROM_4232H, *PFT_EEPROM_4232H;
// FT232H EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
typedef struct ft_eeprom_232h {
// Common header
FT_EEPROM_HEADER common; // common elements for all device EEPROMs
// Drive options
UCHAR ACSlowSlew; // non-zero if AC bus pins have slow slew
UCHAR ACSchmittInput; // non-zero if AC bus pins are Schmitt input
UCHAR ACDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR ADSlowSlew; // non-zero if AD bus pins have slow slew
UCHAR ADSchmittInput; // non-zero if AD bus pins are Schmitt input
UCHAR ADDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
// CBUS options
UCHAR Cbus0; // Cbus Mux control
UCHAR Cbus1; // Cbus Mux control
UCHAR Cbus2; // Cbus Mux control
UCHAR Cbus3; // Cbus Mux control
UCHAR Cbus4; // Cbus Mux control
UCHAR Cbus5; // Cbus Mux control
UCHAR Cbus6; // Cbus Mux control
UCHAR Cbus7; // Cbus Mux control
UCHAR Cbus8; // Cbus Mux control
UCHAR Cbus9; // Cbus Mux control
// FT1248 options
UCHAR FT1248Cpol; // FT1248 clock polarity - clock idle high (1) or clock idle low (0)
UCHAR FT1248Lsb; // FT1248 data is LSB (1) or MSB (0)
UCHAR FT1248FlowControl; // FT1248 flow control enable
// Hardware options
UCHAR IsFifo; // non-zero if interface is 245 FIFO
UCHAR IsFifoTar; // non-zero if interface is 245 FIFO CPU target
UCHAR IsFastSer; // non-zero if interface is Fast serial
UCHAR IsFT1248 ; // non-zero if interface is FT1248
UCHAR PowerSaveEnable; //
// Driver option
UCHAR DriverType; //
} FT_EEPROM_232H, *PFT_EEPROM_232H;
// FT X Series EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
typedef struct ft_eeprom_x_series {
// Common header
FT_EEPROM_HEADER common; // common elements for all device EEPROMs
// Drive options
UCHAR ACSlowSlew; // non-zero if AC bus pins have slow slew
UCHAR ACSchmittInput; // non-zero if AC bus pins are Schmitt input
UCHAR ACDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
UCHAR ADSlowSlew; // non-zero if AD bus pins have slow slew
UCHAR ADSchmittInput; // non-zero if AD bus pins are Schmitt input
UCHAR ADDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
// CBUS options
UCHAR Cbus0; // Cbus Mux control
UCHAR Cbus1; // Cbus Mux control
UCHAR Cbus2; // Cbus Mux control
UCHAR Cbus3; // Cbus Mux control
UCHAR Cbus4; // Cbus Mux control
UCHAR Cbus5; // Cbus Mux control
UCHAR Cbus6; // Cbus Mux control
// UART signal options
UCHAR InvertTXD; // non-zero if invert TXD
UCHAR InvertRXD; // non-zero if invert RXD
UCHAR InvertRTS; // non-zero if invert RTS
UCHAR InvertCTS; // non-zero if invert CTS
UCHAR InvertDTR; // non-zero if invert DTR
UCHAR InvertDSR; // non-zero if invert DSR
UCHAR InvertDCD; // non-zero if invert DCD
UCHAR InvertRI; // non-zero if invert RI
// Battery Charge Detect options
UCHAR BCDEnable; // Enable Battery Charger Detection
UCHAR BCDForceCbusPWREN; // asserts the power enable signal on CBUS when charging port detected
UCHAR BCDDisableSleep; // forces the device never to go into sleep mode
// I2C options
WORD I2CSlaveAddress; // I2C slave device address
DWORD I2CDeviceId; // I2C device ID
UCHAR I2CDisableSchmitt; // Disable I2C Schmitt trigger
// FT1248 options
UCHAR FT1248Cpol; // FT1248 clock polarity - clock idle high (1) or clock idle low (0)
UCHAR FT1248Lsb; // FT1248 data is LSB (1) or MSB (0)
UCHAR FT1248FlowControl; // FT1248 flow control enable
// Hardware options
UCHAR RS485EchoSuppress; //
UCHAR PowerSaveEnable; //
// Driver option
UCHAR DriverType; //
} FT_EEPROM_X_SERIES, *PFT_EEPROM_X_SERIES;
FTD2XX_API
FT_STATUS WINAPI FT_EEPROM_Read(
FT_HANDLE ftHandle,
void *eepromData,
DWORD eepromDataSize,
char *Manufacturer,
char *ManufacturerId,
char *Description,
char *SerialNumber
);
FTD2XX_API
FT_STATUS WINAPI FT_EEPROM_Program(
FT_HANDLE ftHandle,
void *eepromData,
DWORD eepromDataSize,
char *Manufacturer,
char *ManufacturerId,
char *Description,
char *SerialNumber
);
FTD2XX_API
FT_STATUS WINAPI FT_SetLatencyTimer(
FT_HANDLE ftHandle,
UCHAR ucLatency
);
FTD2XX_API
FT_STATUS WINAPI FT_GetLatencyTimer(
FT_HANDLE ftHandle,
PUCHAR pucLatency
);
FTD2XX_API
FT_STATUS WINAPI FT_SetBitMode(
FT_HANDLE ftHandle,
UCHAR ucMask,
UCHAR ucEnable
);
FTD2XX_API
FT_STATUS WINAPI FT_GetBitMode(
FT_HANDLE ftHandle,
PUCHAR pucMode
);
FTD2XX_API
FT_STATUS WINAPI FT_SetUSBParameters(
FT_HANDLE ftHandle,
ULONG ulInTransferSize,
ULONG ulOutTransferSize
);
FTD2XX_API
FT_STATUS WINAPI FT_SetDeadmanTimeout(
FT_HANDLE ftHandle,
ULONG ulDeadmanTimeout
);
FTD2XX_API
FT_STATUS WINAPI FT_GetDeviceInfo(
FT_HANDLE ftHandle,
FT_DEVICE *lpftDevice,
LPDWORD lpdwID,
PCHAR SerialNumber,
PCHAR Description,
LPVOID Dummy
);
FTD2XX_API
FT_STATUS WINAPI FT_StopInTask(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_RestartInTask(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_SetResetPipeRetryCount(
FT_HANDLE ftHandle,
DWORD dwCount
);
FTD2XX_API
FT_STATUS WINAPI FT_ResetPort(
FT_HANDLE ftHandle
);
FTD2XX_API
FT_STATUS WINAPI FT_CyclePort(
FT_HANDLE ftHandle
);
//
// Win32-type functions
//
FTD2XX_API
FT_HANDLE WINAPI FT_W32_CreateFile(
LPCTSTR lpszName,
DWORD dwAccess,
DWORD dwShareMode,
LPSECURITY_ATTRIBUTES lpSecurityAttributes,
DWORD dwCreate,
DWORD dwAttrsAndFlags,
HANDLE hTemplate
);
FTD2XX_API
BOOL WINAPI FT_W32_CloseHandle(
FT_HANDLE ftHandle
);
FTD2XX_API
BOOL WINAPI FT_W32_ReadFile(
FT_HANDLE ftHandle,
LPVOID lpBuffer,
DWORD nBufferSize,
LPDWORD lpBytesReturned,
LPOVERLAPPED lpOverlapped
);
FTD2XX_API
BOOL WINAPI FT_W32_WriteFile(
FT_HANDLE ftHandle,
LPVOID lpBuffer,
DWORD nBufferSize,
LPDWORD lpBytesWritten,
LPOVERLAPPED lpOverlapped
);
FTD2XX_API
DWORD WINAPI FT_W32_GetLastError(
FT_HANDLE ftHandle
);
FTD2XX_API
BOOL WINAPI FT_W32_GetOverlappedResult(
FT_HANDLE ftHandle,
LPOVERLAPPED lpOverlapped,
LPDWORD lpdwBytesTransferred,
BOOL bWait
);
FTD2XX_API
BOOL WINAPI FT_W32_CancelIo(
FT_HANDLE ftHandle
);
//
// Win32 COMM API type functions
//
typedef struct _FTCOMSTAT {
DWORD fCtsHold : 1;
DWORD fDsrHold : 1;
DWORD fRlsdHold : 1;
DWORD fXoffHold : 1;
DWORD fXoffSent : 1;
DWORD fEof : 1;
DWORD fTxim : 1;
DWORD fReserved : 25;
DWORD cbInQue;
DWORD cbOutQue;
} FTCOMSTAT, *LPFTCOMSTAT;
typedef struct _FTDCB {
DWORD DCBlength; /* sizeof(FTDCB) */
DWORD BaudRate; /* Baudrate at which running */
DWORD fBinary: 1; /* Binary Mode (skip EOF check) */
DWORD fParity: 1; /* Enable parity checking */
DWORD fOutxCtsFlow:1; /* CTS handshaking on output */
DWORD fOutxDsrFlow:1; /* DSR handshaking on output */
DWORD fDtrControl:2; /* DTR Flow control */
DWORD fDsrSensitivity:1; /* DSR Sensitivity */
DWORD fTXContinueOnXoff: 1; /* Continue TX when Xoff sent */
DWORD fOutX: 1; /* Enable output X-ON/X-OFF */
DWORD fInX: 1; /* Enable input X-ON/X-OFF */
DWORD fErrorChar: 1; /* Enable Err Replacement */
DWORD fNull: 1; /* Enable Null stripping */
DWORD fRtsControl:2; /* Rts Flow control */
DWORD fAbortOnError:1; /* Abort all reads and writes on Error */
DWORD fDummy2:17; /* Reserved */
WORD wReserved; /* Not currently used */
WORD XonLim; /* Transmit X-ON threshold */
WORD XoffLim; /* Transmit X-OFF threshold */
BYTE ByteSize; /* Number of bits/byte, 4-8 */
BYTE Parity; /* 0-4=None,Odd,Even,Mark,Space */
BYTE StopBits; /* 0,1,2 = 1, 1.5, 2 */
char XonChar; /* Tx and Rx X-ON character */
char XoffChar; /* Tx and Rx X-OFF character */
char ErrorChar; /* Error replacement char */
char EofChar; /* End of Input character */
char EvtChar; /* Received Event character */
WORD wReserved1; /* Fill for now. */
} FTDCB, *LPFTDCB;
typedef struct _FTTIMEOUTS {
DWORD ReadIntervalTimeout; /* Maximum time between read chars. */
DWORD ReadTotalTimeoutMultiplier; /* Multiplier of characters. */
DWORD ReadTotalTimeoutConstant; /* Constant in milliseconds. */
DWORD WriteTotalTimeoutMultiplier; /* Multiplier of characters. */
DWORD WriteTotalTimeoutConstant; /* Constant in milliseconds. */
} FTTIMEOUTS,*LPFTTIMEOUTS;
FTD2XX_API
BOOL WINAPI FT_W32_ClearCommBreak(
FT_HANDLE ftHandle
);
FTD2XX_API
BOOL WINAPI FT_W32_ClearCommError(
FT_HANDLE ftHandle,
LPDWORD lpdwErrors,
LPFTCOMSTAT lpftComstat
);
FTD2XX_API
BOOL WINAPI FT_W32_EscapeCommFunction(
FT_HANDLE ftHandle,
DWORD dwFunc
);
FTD2XX_API
BOOL WINAPI FT_W32_GetCommModemStatus(
FT_HANDLE ftHandle,
LPDWORD lpdwModemStatus
);
FTD2XX_API
BOOL WINAPI FT_W32_GetCommState(
FT_HANDLE ftHandle,
LPFTDCB lpftDcb
);
FTD2XX_API
BOOL WINAPI FT_W32_GetCommTimeouts(
FT_HANDLE ftHandle,
FTTIMEOUTS *pTimeouts
);
FTD2XX_API
BOOL WINAPI FT_W32_PurgeComm(
FT_HANDLE ftHandle,
DWORD dwMask
);
FTD2XX_API
BOOL WINAPI FT_W32_SetCommBreak(
FT_HANDLE ftHandle
);
FTD2XX_API
BOOL WINAPI FT_W32_SetCommMask(
FT_HANDLE ftHandle,
ULONG ulEventMask
);
FTD2XX_API
BOOL WINAPI FT_W32_GetCommMask(
FT_HANDLE ftHandle,
LPDWORD lpdwEventMask
);
FTD2XX_API
BOOL WINAPI FT_W32_SetCommState(
FT_HANDLE ftHandle,
LPFTDCB lpftDcb
);
FTD2XX_API
BOOL WINAPI FT_W32_SetCommTimeouts(
FT_HANDLE ftHandle,
FTTIMEOUTS *pTimeouts
);
FTD2XX_API
BOOL WINAPI FT_W32_SetupComm(
FT_HANDLE ftHandle,
DWORD dwReadBufferSize,
DWORD dwWriteBufferSize
);
FTD2XX_API
BOOL WINAPI FT_W32_WaitCommEvent(
FT_HANDLE ftHandle,
PULONG pulEvent,
LPOVERLAPPED lpOverlapped
);
//
// Device information
//
typedef struct _ft_device_list_info_node {
ULONG Flags;
ULONG Type;
ULONG ID;
DWORD LocId;
char SerialNumber[16];
char Description[64];
FT_HANDLE ftHandle;
} FT_DEVICE_LIST_INFO_NODE;
// Device information flags
enum {
FT_FLAGS_OPENED = 1,
FT_FLAGS_HISPEED = 2
};
FTD2XX_API
FT_STATUS WINAPI FT_CreateDeviceInfoList(
LPDWORD lpdwNumDevs
);
FTD2XX_API
FT_STATUS WINAPI FT_GetDeviceInfoList(
FT_DEVICE_LIST_INFO_NODE *pDest,
LPDWORD lpdwNumDevs
);
FTD2XX_API
FT_STATUS WINAPI FT_GetDeviceInfoDetail(
DWORD dwIndex,
LPDWORD lpdwFlags,
LPDWORD lpdwType,
LPDWORD lpdwID,
LPDWORD lpdwLocId,
LPVOID lpSerialNumber,
LPVOID lpDescription,
FT_HANDLE *pftHandle
);
//
// Version information
//
FTD2XX_API
FT_STATUS WINAPI FT_GetDriverVersion(
FT_HANDLE ftHandle,
LPDWORD lpdwVersion
);
FTD2XX_API
FT_STATUS WINAPI FT_GetLibraryVersion(
LPDWORD lpdwVersion
);
FTD2XX_API
FT_STATUS WINAPI FT_Rescan(
void
);
FTD2XX_API
FT_STATUS WINAPI FT_Reload(
WORD wVid,
WORD wPid
);
FTD2XX_API
FT_STATUS WINAPI FT_GetComPortNumber(
FT_HANDLE ftHandle,
LPLONG lpdwComPortNumber
);
//
// FT232H additional EEPROM functions
//
FTD2XX_API
FT_STATUS WINAPI FT_EE_ReadConfig(
FT_HANDLE ftHandle,
UCHAR ucAddress,
PUCHAR pucValue
);
FTD2XX_API
FT_STATUS WINAPI FT_EE_WriteConfig(
FT_HANDLE ftHandle,
UCHAR ucAddress,
UCHAR ucValue
);
FTD2XX_API
FT_STATUS WINAPI FT_EE_ReadECC(
FT_HANDLE ftHandle,
UCHAR ucOption,
LPWORD lpwValue
);
FTD2XX_API
FT_STATUS WINAPI FT_GetQueueStatusEx(
FT_HANDLE ftHandle,
DWORD *dwRxBytes
);
#ifdef __cplusplus
}
#endif
#endif /* FTD2XX_H */

/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/ftd2xx.lib
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/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.cpp
0,0 → 1,577
// MLAB Xilinx Virtual Cable Network Server
// ----------------------------------------
//
// (c) miho 2012 http://www.mlab.cz/PermaLink/XVC_SOFTWARE
//
// This program if free.
//
//
// History:
//
// 1.00 2012_09 Proof of concept (no configuration, not for public release)
// 1.01 2012_09 Added parameter for device selection
// 1.02 2012_12 Error handling and debugged
// 1.03 2012_12 Release version ready to publish
//
//
// Purpose:
//
// XILINX development software (ISE, WebPack) supports several types of JTAG programming
// cables. Among them there is one particularly interesting. It is Xilinx Virtual Cable
// which uses (documented) XVC network protocol to send JTAG commands across TCP/IP network.
// So it is possible to realize own hardware/software and have it directly supported by
// XILINX development software (both IMPACT and ChipScope).
//
// This program listens TCP data send by XILINX ISE IMAPACT (or ChipScope) and sends it
// to the JTAG device (typically FPGA) connected to FTDI USB Chip. You can use ordinary
// USB/RS232 translator based on FT232R chip or you can use our own module from
// http://www.mlab.cz/PermaLink/XVC_FT220X
//
// Target device JTAG port is connected to pins on FTDI USB chip. Program writes to standard
// output Which pins are used. Program writes what to set in ISE to enable XVC plugin.
//
//
// Environment:
//
// This is Win32 Console Application and run in WinXP / Win7 / Win8 both 32 and 64 bit.
//
// Program needs to listen to the network so it is necessary to allow doing so. In Windows
// firewall configuration enable networking for the exe file.
// WinXP: run as Administrator c:\WINDOWS\System32\firewall.cpl and add the exe file
// Win7: the system asks directly to do so
//
//
// Technology:
//
// The program uses Windows WINSOCK2 library for network communication
// and FTDI ftd2xx library for communication with FTDI USB chip.
// It can be staticly linked to minimize dependencies on libraries.
// Program requires FTDI drivers installed.
// Because of the usage of standard libraries you don't need to solve how to sign drivers.
//
// The program was debug with FT232R and FT220X device.
// It should work with any similar FTDI USB chip.
//
// XVC protocol is documented (you have to ask XILINX support to gain access).
// The program is inspired by the work http://debugmo.de/2012/02/xvcd-the-xilinx-virtual-cable-daemon/
// Ask Google about Xilinx Virtual Cable.
//
//
// Translation:
//
// MS Visual C++ 2010 Express (free, registration required)
// Create new empty project for Win32 Console Application and name project mlab_xvcd (to build mlab_xvcd.exe)
// Header Files / Add / Existing Items - all .h files
// Resource Files / Add / Existing Items - all .lib files
// Source Files / Add / Existing Items - all .cpp files
// Select Release version (no debug info)
// Set static linkage Project Properties / Configuration Release / Configuration Properties
// / Code Generation / Runtime Library = Multithreaded (/MT)
//
//
// Problems:
//
// Programming of SPI FLASH configuration memory connected to FPGA does not work. No idea why.
// It does not work for internal FLASH of Spartan XC3SxxAN either.
//
//
// Possible improvements:
//
// Linux version (Winsock library differs).
// External definition of JTAG pins.
// Library Definitions
// -------------------
#undef UNICODE
#define WIN32_LEAN_AND_MEAN
#include "mlab_xvcd.h" // Program Configuration
#include <windows.h> // Windows Console Application
#include <winsock2.h> // Windows WinSock2
#include <ws2tcpip.h> // Windows WinSock2
#include <stdlib.h> // Standard Library (exit, atoi, ...)
#include <stdio.h> // Standard IO (printf, ...)
#include <signal.h> // CTRL+C handling
// Link with library
#pragma comment (lib, "Ws2_32.lib")
#define XVC_RX_BUFLEN (XVC_JTAG_LEN/8*2+20) // Length of receive buffer in bytes (command+length+TMSbuffer+TDIbuffer)
#define XVC_TX_BUFLEN (XVC_JTAG_LEN/8) // Length of transmit buffer in bytes (TDObuffer)
// JTAG state machine
// ------------------
// JTAG States
enum
{
test_logic_reset, run_test_idle, // Starts from 0
select_dr_scan, capture_dr, shift_dr,
exit1_dr, pause_dr, exit2_dr, update_dr,
select_ir_scan, capture_ir, shift_ir,
exit1_ir, pause_ir, exit2_ir, update_ir,
num_states
};
// JTAG State Machine transfer Function
static int jtagStep(int state, int tms)
{
static const int next_state[num_states][2] =
{
/* JTAG State -->> New State */
/* -------------------------------------------------------------*/
/* | TMS=0 | TMS=1 */
/* -------------------------------------------------------------*/
/* [test_logic_reset] -> */ { run_test_idle, test_logic_reset },
/* [run_test_idle] -> */ { run_test_idle, select_dr_scan },
/* [select_dr_scan] -> */ { capture_dr, select_ir_scan },
/* [capture_dr] -> */ { shift_dr, exit1_dr },
/* [shift_dr] -> */ { shift_dr, exit1_dr },
/* [exit1_dr] -> */ { pause_dr, update_dr },
/* [pause_dr] -> */ { pause_dr, exit2_dr },
/* [exit2_dr] -> */ { shift_dr, update_dr },
/* [update_dr] -> */ { run_test_idle, select_dr_scan },
/* [select_ir_scan] -> */ { capture_ir, test_logic_reset },
/* [capture_ir] -> */ { shift_ir, exit1_ir },
/* [shift_ir] -> */ { shift_ir, exit1_ir },
/* [exit1_ir] -> */ { pause_ir, update_ir },
/* [pause_ir] -> */ { pause_ir, exit2_ir },
/* [exit2_ir] -> */ { shift_ir, update_ir },
/* [update_ir] -> */ { run_test_idle, select_dr_scan }
};
return next_state[state][tms];
}
int handleData(SOCKET ClientSocket)
{
bool seen_tlr = false;
bool jtagError = false;
static int jtag_state;
do
{
int iResult;
// Read Command
char command[16];
int commandLen = 0;
// Read String terminated by ':'
do
{
iResult = recv(ClientSocket, command+commandLen, 1, 0);
if (iResult==0)
{
printf("\n Connection Closed\n\n");
return -1;
}
else if (iResult==1)
{
commandLen++;
}
else
{
fprintf(stderr, "Error Reading Command\n");
return -2;
}
}
while (command[commandLen-1]!=':' && commandLen<sizeof(command)-1 );
command[commandLen] = char(0);
if (0==strncmp(command, "shift:", sizeof(command)))
{
}
else
{
fprintf(stderr, "Invalid Command '%s'\n", command);
return -2;
}
// Read Length (in bits, 32bit integer)
int len;
iResult = recv(ClientSocket, (char *)&len, 4, 0); // pøepsat pøenositelnì
if (iResult==0)
{
printf("\n Connection Closed\n\n");
return -1;
}
if (iResult != 4)
{
fprintf(stderr, "Reading Length Failed\n");
return -2;
}
char buffer[2048];
// Read Data (data string for TMS and TDI)
int nr_bytes = (len + 7) / 8;
if (nr_bytes * 2 > sizeof(buffer))
{
fprintf(stderr, "Buffer Size Exceeded\n");
return -2;
}
int iReceivedBytes=0;
while (iReceivedBytes<nr_bytes * 2)
{
iResult = recv(ClientSocket, buffer+iReceivedBytes, nr_bytes * 2 - iReceivedBytes, 0);
if (iResult==0)
{
printf("\n Connection Closed\n\n");
return -1;
}
if (iResult<=0)
{
fprintf(stderr, "Reading Data Failed %d %d\n", iResult, nr_bytes * 2);
return -2;
}
iReceivedBytes += iResult;
}
char result[1024];
memset(result, 0, nr_bytes);
// Deal with JTAG
// Only allow exiting if the state is rti and the IR
// has the default value (IDCODE) by going through test_logic_reset.
// As soon as going through capture_dr or capture_ir no exit is
// allowed as this will change DR/IR.
seen_tlr = (seen_tlr || jtag_state == test_logic_reset) && (jtag_state != capture_dr) && (jtag_state != capture_ir);
// Due to a weird bug(??) xilinx impacts goes through another "capture_ir"/"capture_dr" cycle after
// reading IR/DR which unfortunately sets IR to the read-out IR value.
// Just ignore these transactions.
if ((jtag_state == exit1_ir && len == 5 && buffer[0] == 0x17) || (jtag_state == exit1_dr && len == 4 && buffer[0] == 0x0b))
{
// printf("Ignoring Bogus jtag State movement at jtag_state %d\n", jtag_state);
}
else
{
for (int i = 0; i < len; ++i)
{
//
// Do the actual cycle.
//
int tms = !!(buffer[i/8] & (1<<(i&7)));
//
// Track the state.
//
jtag_state = jtagStep(jtag_state, tms);
}
if (jtagScan((unsigned char *) buffer, (unsigned char *) buffer + nr_bytes, (unsigned char *) result, len) < 0)
{
//fprintf(stderr, "jtagScan failed\n");
// Can't stop now, have to sent (any) answer not to hung the IMPACT
jtagError = true;
}
}
// Send the Ansver
iResult = send(ClientSocket, result, nr_bytes, 0 );
if (iResult == SOCKET_ERROR)
{
printf("Send Failed with Error: %d\n", WSAGetLastError());
closesocket(ClientSocket);
WSACleanup();
return -2;
}
// printf("Bytes Sent: %d\n", iSendResult);
// printf("jtag state %d\n", jtag_state);
}
while (!(seen_tlr && jtag_state == run_test_idle));
return jtagError ? -2 : 0;
}
// Stop Handler - switch JTAG port off and stop program
void stopHandler(int sig)
{
jtagClosePort();
exit(1);
}
// Print help and stop program with error
void Help(char *progName)
{
fprintf(stderr, "Bad Parameters\n");
fprintf(stderr, "\n");
fprintf(stderr, "Usage: %s [arg]\n", progName);
fprintf(stderr, "\n");
fprintf(stderr, " Where [arg] is one of: \n");
fprintf(stderr, " -d Description Fing FTDI device by Description\n");
fprintf(stderr, " -l Location Fing FTDI device by Loaction\n");
fprintf(stderr, " -s Serial_number Fing FTDI device by it's SN\n");
fprintf(stderr, " -n Number Use N-th FTDI device\n");
fprintf(stderr, " The first FTDI device is used if no argument\n");
exit(2);
}
int __cdecl main(int argc, char *argv[])
{
// Variables
bool verbose = true;
// Program Info
printf("\n");
printf("Xilinx Virtual Cable Network Server\n");
printf("===================================\n");
printf("(c) miho 2012 v " VERSION "\n\n");
// Get program name
char *cp;
char *progName;
cp = argv[0];
progName=cp;
while (cp[0]!='\0')
{
if (cp[0]=='/' || cp[0]=='\\')
progName=cp+1;
cp++;
}
// Process command line params
char *findDeviceByStr = 0; // String parameter
int findDeviceBy = 0; // What does the string means
if (argc>1)
{
if (argc==3)
{
findDeviceByStr = argv[2];
if (strcmp(argv[1], "-d")==0)
{
findDeviceBy = OPEN_BY_DESCRIPTION;
}
else if (strcmp(argv[1], "-l")==0)
{
findDeviceBy = OPEN_BY_LOCATION;
}
else if (strcmp(argv[1], "-s")==0)
{
findDeviceBy = OPEN_BY_SERIAL_NUMBER;
}
else if (strcmp(argv[1], "-n")==0)
{
findDeviceBy = 0;
}
else
{
Help(progName);
}
}
else
{
Help(progName);
}
}
else
{
// Empty String - find device by number and number is empty
findDeviceBy = 0;
findDeviceByStr = "";
}
// Find, Init and Open FTDI USB Chip
if (jtagOpenPort(findDeviceBy, findDeviceByStr)<0) {
// No Device Found
fprintf(stderr, "ERROR: No Device Found\n");
return -1;
}
// Signal Handler (for CRTL+C)
signal(SIGINT, &stopHandler);
printf("Starting Network Server\n");
WSADATA wsaData;
int iResult;
SOCKET ListenSocket = INVALID_SOCKET;
SOCKET ClientSocket = INVALID_SOCKET;
// Initialize Winsock
iResult = WSAStartup(MAKEWORD(2,2), &wsaData);
if (iResult != 0)
{
fprintf(stderr, "WSAStartup failed with error: %d\n", iResult);
jtagClosePort();
return -2;
}
// Display HostName and Address
char sMyName[255];
gethostname(sMyName, sizeof(sMyName));
printf(" Host Name %s\n", sMyName);
hostent * pHostInfo;
pHostInfo = gethostbyname(sMyName);
printf(" Network Name %s\n", pHostInfo->h_name);
if (pHostInfo->h_length>0 && pHostInfo->h_length<=16)
{
printf(" Host Address ");
for (int i=0; i<pHostInfo->h_length-1; i++)
{
printf("%d.", (unsigned char)pHostInfo->h_addr_list[0][i]);
}
printf("%d\n", (unsigned char)pHostInfo->h_addr_list[0][pHostInfo->h_length-1]);
}
// Create Protocol Structure
struct addrinfo hints;
ZeroMemory(&hints, sizeof(hints));
hints.ai_family = AF_INET; // IP6
hints.ai_socktype = SOCK_STREAM; // Reliable two-way connection
hints.ai_protocol = IPPROTO_TCP; // Protocol TCP
hints.ai_flags = AI_PASSIVE;
// Resolve the server address and port (allocate structure "result")
struct addrinfo *result = NULL;
iResult = getaddrinfo(NULL, XVC_TCP_PORT, &hints, &result);
if ( iResult != 0 )
{
fprintf(stderr, "getaddrinfo failed with error: %d\n", iResult);
WSACleanup();
jtagClosePort();
return -2;
}
// Create a SOCKET
ListenSocket = socket(result->ai_family, result->ai_socktype, result->ai_protocol);
if (ListenSocket == INVALID_SOCKET)
{
fprintf(stderr, "socket failed with error: %ld\n", WSAGetLastError());
freeaddrinfo(result);
WSACleanup();
jtagClosePort();
return -2;
}
// Bind the SOCKED (assign the address)
iResult = bind(ListenSocket, result->ai_addr, (int)result->ai_addrlen);
if (iResult == SOCKET_ERROR)
{
fprintf(stderr, "Bind failed with error: %d\n", WSAGetLastError());
freeaddrinfo(result);
closesocket(ListenSocket);
WSACleanup();
jtagClosePort();
return -2;
}
if (verbose)
{
printf(" Bound Socket %s\n", XVC_TCP_PORT);
}
// Help for user
printf(" Set in IMPACT xilinx_xvc host=%s:%s disableversioncheck=true\n", sMyName, XVC_TCP_PORT);
freeaddrinfo(result);
// Listen SOCKET
iResult = listen(ListenSocket, SOMAXCONN);
if (iResult == SOCKET_ERROR)
{
printf("listen failed with error: %d\n", WSAGetLastError());
closesocket(ListenSocket);
WSACleanup();
jtagClosePort();
return -2;
}
printf("\n");
do
{
printf(" Listen\n");
jtagSetLED(true);
// Accept a client SOCKET
sockaddr ClientSocetAddr;
int ClientSocetAddrLen = sizeof(sockaddr);
ClientSocket = accept(ListenSocket, &ClientSocetAddr, &ClientSocetAddrLen);
if (ClientSocket == INVALID_SOCKET)
{
printf("accept failed with error: %d\n", WSAGetLastError());
closesocket(ListenSocket);
WSACleanup();
jtagClosePort();
return -2;
}
// Print Accepted + Address
printf(" Accepted ");
jtagSetLED(false);
for (int i=2; i<2+4-1; i++)
{
printf("%d.", (unsigned char)ClientSocetAddr.sa_data[i]);
}
printf("%d:%d\n", (unsigned char)ClientSocetAddr.sa_data[2+4-1], (unsigned char)ClientSocetAddr.sa_data[0]*256+(unsigned char)ClientSocetAddr.sa_data[1]);
// Process Data until the peer shuts down the connection
int Cnt = 0;
printf(" Handle Data ");
do
{
iResult = handleData(ClientSocket);
if (iResult>=0)
{
printf(".");
Cnt++;
if (Cnt>40)
{
Cnt = 0;
printf("\n ");
}
}
}
while (iResult >= 0);
// Connection Closed by peer
if (iResult==-1)
{
// JTAG port
jtagSetIdle();
}
// Error - shutdown the connection
if (iResult==-2)
{
fprintf(stderr, " Disconnect\n");
iResult = shutdown(ClientSocket, SD_SEND);
if (iResult == SOCKET_ERROR)
{
fprintf(stderr, "shutdown failed with error: %d\n", WSAGetLastError());
}
iResult=-2; // Error
}
// cleanup
closesocket(ClientSocket);
}
// If not Error Listen Again
while (iResult!=-2);
// cleanup
closesocket(ListenSocket);
WSACleanup();
jtagClosePort();
return 1;
}

/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd.h
0,0 → 1,37
// Program Version
// ---------------
#define VERSION "1.03" // Program version
// JTAG Port Definitions
// ---------------------
// Use FTDI as Port Interface
#include "mlab_xvcd_port_FTDI.h"
// JTAG Port Pin Masks (look at mlab_xvcd_port_FTDI.h for pin names)
#define PORT_TCK FTDI_TXD // JTAG TCK (output)
#define PORT_TDI FTDI_RXD // JTAG TDI (output)
#define PORT_TDO FTDI_RTS // JTAG TDO (input)
#define PORT_TMS FTDI_CTS // JTAG TMS (output)
#define PORT_LED FTDI_RI | CBUS3 // Activituy LED (output)
// FTDI Settings
#define BAUD_RATE 1000000 // Baoud Rate (mult it by 16)
#define USB_LATENCY 1 // FTDI USB Latency Timer in ms (FT232R 0, FT2232 1)
// Performance Data (configuring XC3S50AN)
// ----------------
// BAUD_RATE USB_LATENCY --> FT220X FT232R
// 1000000 1 3s 2s
// 10000000 1 3s
// 1000000 0 2.8s
// Network Definitions
// -------------------
// TCP/IP
#define XVC_TCP_PORT "2542" // TCP Port Number to Listen to (string!)
#define XVC_JTAG_LEN (1024*8) // JTAG String Length in bits

/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.cpp
0,0 → 1,471
// Include FTDI library
#include "mlab_xvcd_port_FTDI.h"
// JTAG Output Pin Mask
#define IO_OUTPUT_MASK (PORT_TCK|PORT_TDI|PORT_TMS|PORT_LED) // Mask for all Output Pins
// Global Variables
FT_HANDLE ftHandle; // Handle for FTDI device
bool ftHandleValid = false; // Valid Handle
unsigned char PinStatus = 0; // Status of DBUS pins
unsigned char LedMask = 0; // LED Mask for DBUS data transfer
// Convert string to int (both decimal and hex string)
int atoiEx(char *s)
{
if (s[0]=='0' && (s[1]=='x' || s[1]=='X'))
{
// Hex Value
int i;
#pragma warning(disable: 4996) // Disable MS warning about scanf
sscanf(s, "%x", &i);
return i;
}
else
{
// Decimal Value
return atoi(s);
}
}
// Print FTDI Pin Names (from mask value)
void jtagPrintPinNames(int pinMask)
{
// 16bit (MSB is CBUS, LSB is DBUS)
int bit=15;
bool useDelimiter=false;
do
{
int mask = 1 << bit;
if (pinMask & mask)
{
if (useDelimiter)
{
printf("+");
}
if (bit > 7)
{
printf("CBUS%c", '0' + bit - 8);
}
else
{
printf("DBUS%c", '0' + bit);
switch (mask)
{
case FTDI_TXD: printf("(TXD)"); break;
case FTDI_RXD: printf("(RXD)"); break;
case FTDI_RTS: printf("(RTS)"); break;
case FTDI_CTS: printf("(CTS)"); break;
case FTDI_DTR: printf("(DTR)"); break;
case FTDI_DSR: printf("(DSR)"); break;
case FTDI_DCD: printf("(DCD)"); break;
case FTDI_RI: printf("(RI) "); break;
}
}
useDelimiter = true;
}
}
while (bit-- > 0);
}
// Verify pin usage
void jtagCheckPinConfig()
{
// Check CBUS usage
if ( (PORT_TCK) > 0x00FF )
fprintf(stderr, "\nFTDI: INTERNAL ERROR: TCK can't use CBUS signal"), exit(2);
if ( (PORT_TCK) == 0 )
fprintf(stderr, "\nFTDI: INTERNAL ERROR: TCK not defined"), exit(2);
if ( (PORT_TDI) > 0x00FF )
fprintf(stderr, "\nFTDI: INTERNAL ERROR: TDI can't use CBUS signal"), exit(2);
if ( (PORT_TDI) == 0 )
fprintf(stderr, "\nFTDI: INTERNAL ERROR: TDI not defined"), exit(2);
if ( (PORT_TDO) > 0x00FF )
fprintf(stderr, "\nFTDI: INTERNAL ERROR: TDO can't use CBUS signal"), exit(2);
if ( (PORT_TDO) == 0 )
fprintf(stderr, "\nFTDI: INTERNAL ERROR: TDO not defined"), exit(2);
if ( (PORT_TMS) > 0x00FF)
fprintf(stderr, "\nFTDI: INTERNAL ERROR: TMS can't use CBUS signal"), exit(2);
if ( (PORT_TMS) == 0 )
fprintf(stderr, "\nFTDI: INTERNAL ERROR: TMS not defined"), exit(2);
if ( (PORT_LED) > 0x0FFF)
fprintf(stderr, "\nFTDI: INTERNAL ERROR: LED can't use CBUS signal > 3"), exit(2);
}
// Print JTAG Pin Assignment
void jtagPrintPinConfig()
{
// Print pin masks human readable
printf(" JTAG Port Pins "); printf("TCK->"); jtagPrintPinNames(PORT_TCK); printf("\n");
printf(" "); printf("TDI->"); jtagPrintPinNames(PORT_TDI); printf("\n");
printf(" "); printf("TDO->"); jtagPrintPinNames(PORT_TDO); printf("\n");
printf(" "); printf("TMS->"); jtagPrintPinNames(PORT_TMS); printf("\n");
printf(" "); printf("LED->"); jtagPrintPinNames(PORT_LED); printf("\n");
}
// Connect to FTDI driver
int jtagOpenPort(int findDeviceBy, char *findDeviceByStr)
{
// Enumerate FTDI Devices
// ----------------------
FT_STATUS ftStatus;
// Print Library Version
printf("FTDI Connect\n");
DWORD dwLibraryVer;
ftStatus = FT_GetLibraryVersion(&dwLibraryVer);
if (ftStatus == FT_OK)
printf(" Library Version 0x%x\n", dwLibraryVer);
else
fprintf(stderr, "\nFTDI: Error Reading Library Version\n");
// Create Device Information List
DWORD numDevs = 0;
ftStatus = FT_CreateDeviceInfoList(&numDevs);
if (ftStatus == FT_OK)
printf(" Devices Found %d\n", numDevs);
else
printf(" No FTDI Device Found\n");
if (numDevs==0)
return -1;
// Print Config Info
jtagPrintPinConfig();
jtagCheckPinConfig();
printf("\n");
// List All FTDI Devices
FT_HANDLE ftHandleTemp;
DWORD Flags;
DWORD ID;
DWORD Type;
DWORD LocId;
char SerialNumber[16];
char Description[64];
for (DWORD i=0; i<numDevs; i++)
{
ftStatus = FT_GetDeviceInfoDetail(i, &Flags, &Type, &ID, &LocId, SerialNumber, Description, &ftHandleTemp);
if (ftStatus == FT_OK)
{
printf("Device %d\n", i);
printf(" Description \"%s\"\n", Description);
printf(" SerialNumber \"%s\"\n", SerialNumber);
//printf(" Flags 0x%x\n", Flags);
//printf(" Type 0x%x\n", Type);
//printf(" ID 0x%x\n", ID);
printf(" Location 0x%x\n\n", LocId);
}
}
// Select one Device and Open It
unsigned int selectedDeviceIndex = 0;
if (findDeviceBy==0)
{
// Select by Device Number
selectedDeviceIndex = atoiEx(findDeviceByStr);
if (numDevs<=selectedDeviceIndex)
{
fprintf(stderr, " There is no Device Number %d\n\n", selectedDeviceIndex);
return -1;
}
// Open device
ftStatus = FT_Open(selectedDeviceIndex, &ftHandle);
}
else
{
// Select by Description / Serial Number / Location
if (findDeviceBy==FT_OPEN_BY_LOCATION)
{
// Open device (location is number, not string)
int findDeviceByInt = atoiEx(findDeviceByStr);
ftStatus = FT_OpenEx((void*)findDeviceByInt, findDeviceBy, &ftHandle);
}
else
{
ftStatus = FT_OpenEx(findDeviceByStr, findDeviceBy, &ftHandle);
}
}
// Check Status
if (ftStatus == FT_OK)
{
ftHandleValid = true;
//printf(" FTDI Device Opened\n");
}
else
{
fprintf(stderr, " Can't Open FTDI Device (error code %d)\n\n", ftStatus);
return -1;
}
// Selected Device
ftStatus = FT_GetDeviceInfo(ftHandle, &Type, &ID, SerialNumber, Description, 0);
if (ftStatus == FT_OK)
{
printf("Selected Device\n");
printf(" Description \"%s\"\n", Description);
printf(" SerialNumber \"%s\"\n", SerialNumber);
//printf(" Type 0x%x\n", Type);
//printf(" ID 0x%x\n", ID);
}
// Get Driver Version
DWORD dwDriverVer;
ftStatus = FT_GetDriverVersion(ftHandle, &dwDriverVer);
if (ftStatus == FT_OK)
{
printf(" Device Driver Ver 0x%x\n", dwDriverVer);
}
else
{
fprintf(stderr, "FTDI: Error Reading Driver Version\n");
}
// Set BitBang Mode
ftStatus = FT_SetBitMode(ftHandle, (UCHAR)IO_OUTPUT_MASK, FT_BITMODE_SYNC_BITBANG); //FT_BITMODE_SYNC_BITBANG / FT_BITMODE_ASYNC_BITBANG
if (ftStatus == FT_OK)
{
// printf("Set BitBang Mode\n");
}
else
{
fprintf(stderr, "FTDI: Set BitBang Mode Failed %d\n", ftStatus);
}
// Set Baud Rate
ftStatus = FT_SetBaudRate(ftHandle, BAUD_RATE);
if (ftStatus == FT_OK)
{
printf(" Baud Rate %d\n", BAUD_RATE);
}
else
{
fprintf(stderr, "FTDI: Set Baud Rate Failed %d\n", ftStatus);
}
ftStatus = FT_Purge(ftHandle, FT_PURGE_RX | FT_PURGE_TX); // Purge both Rx and Tx buffers
if (ftStatus == FT_OK)
{
// printf("Purge \n");
}
else
{
fprintf(stderr, "FTDI: FT_Purge failed %d\n", ftStatus);
}
ftStatus = FT_SetLatencyTimer(ftHandle, USB_LATENCY); // Latency in ms
if (ftStatus == FT_OK)
{
printf(" USB Latency %d\n", USB_LATENCY);
}
else
{
fprintf(stderr, "FTDI: Set USB Latency Timer Failed %d\n", ftStatus);
}
printf("\n");
return 0;
}
// Enable or Disable Activity LED
void jtagSetLED(bool LedEnable)
{
// DBUS Connected LED (BitBang Mode)
LedMask = LedEnable ? PORT_LED & 0xFF : 0; // Set mask for jtagScan function
if (PORT_LED & 0xFF)
{
// Set / Reset LED Pin
DWORD BytesWritten;
DWORD BytesReceived;
unsigned char DataOut = LedMask | (PinStatus & ~PORT_LED); // Preserve PinStatus
unsigned char Dummy;
FT_Write(ftHandle, &DataOut, 1, &BytesWritten ); // Send 1 byte
FT_Read (ftHandle, &Dummy, 1, &BytesReceived); // Read 1 byte
//printf("[PinStatus %x DataOut %x]", PinStatus, DataOut);
}
// CBUS Connected LED (BitBang Mode) 1 and 0 state of the port
const unsigned char On = ( (((PORT_LED) & 0x0F00) >> 4) | (((PORT_LED) & 0x0F00) >> 8) );
const unsigned char Off = ( (((PORT_LED) & 0x0F00) >> 4) );
if (On)
{
FT_STATUS ftStatus;
// Set / Reset LED Pin
ftStatus = FT_SetBitMode(ftHandle, LedEnable ? On : Off, FT_BITMODE_CBUS_BITBANG);
// Return to used Mode
ftStatus = FT_SetBitMode(ftHandle, (UCHAR)IO_OUTPUT_MASK, FT_BITMODE_SYNC_BITBANG); //FT_BITMODE_SYNC_BITBANG / FT_BITMODE_ASYNC_BITBANG
}
}
// Set port to Idle state
void jtagSetIdle()
{
char b = 0; // Idle State for JTAG pins
DWORD BytesWritten;
DWORD BytesReceived;
// Write (idle state of pins)
FT_Write(ftHandle, &b, 1, &BytesWritten);
// Read (not to left data in input fifo)
FT_Read(ftHandle, &b, 1, &BytesReceived);
}
// Close FTDI connection
int jtagClosePort()
{
if (ftHandleValid)
{
jtagSetLED(false);
// Switch Off the Outputs
FT_Purge(ftHandle, FT_PURGE_RX | FT_PURGE_TX); // Purge both Rx and Tx buffers
FT_SetBitMode(ftHandle, 0, FT_BITMODE_SYNC_BITBANG);
// Close FTDI Lib
FT_Close(ftHandle);
ftHandleValid = false;
}
return 0;
}
// Send data to JTAG port and bring returned data
int jtagScan(const unsigned char *TMS, const unsigned char *TDI, unsigned char *TDO, int bits)
{
FT_STATUS ftStatus;
DWORD BytesWritten;
DWORD BytesReceived;
int r, t;
// Decompose TDI and TMS byte array to raw bitstream
//(1 TDI bit + 1 TMS bit --> 1 byte + 1 byte with TCK)
unsigned char buffer[16384];
if (bits > sizeof(buffer)/2)
{
fprintf(stderr, "\n FTDI: Out of Buffer Space for %d bits\n", bits);
return -1;
}
// Switch LED On
jtagSetLED(true);
// Prepare transmit data to buffer
for (int i = 0; i < bits; ++i)
{
unsigned char v = 0 | LedMask; // LED On / Off (on DBUS)
if (TMS[i/8] & (1<<(i&7)))
{
v |= (PORT_TMS);
// printf("T");
}
else
{
// printf("t");
}
if (TDI[i/8] & (1<<(i&7)))
{
v |= (PORT_TDI);
// printf("|");
}
else
{
// printf(".");
}
buffer[i * 2 + 0] = v;
buffer[i * 2 + 1] = v | (PORT_TCK);
}
PinStatus = buffer[bits*2-1];
// printf("\n");
// Send data to FTDI
r = 0;
while (r < bits * 2)
{
t = bits * 2 - r;
if (t > FTDI_MAX_WRITESIZE)
{
t = FTDI_MAX_WRITESIZE;
}
// printf("writing %d bytes to FTDI\n", t);
ftStatus = FT_Write(ftHandle, buffer+r, t, &BytesWritten);
if (ftStatus != FT_OK)
{
fprintf(stderr, "\n FTDI: Error Writing\n");
return -2;
}
int i = 0;
while (i < t)
{
FT_SetTimeouts(ftHandle, 5000, 0); // timeout 5 sec
ftStatus = FT_Read(ftHandle, buffer+r+i, t-i, &BytesReceived);
if (ftStatus == FT_OK)
{
if (BytesReceived == t-i)
{
// FT_Read OK
// printf("Read from FTDI %d bytes", BytesReceived);
}
else
{
// FT_Read Timeout
fprintf(stderr, "\n FTDI: Read Timeout\n");
return -2;
}
}
else
{
fprintf(stderr, "\n FTDI: Error Reading\n");// Error
return -2;
}
i += BytesReceived;
}
r += t;
}
// Pack TDO bitstream from receive buffer to byte array
memset(TDO, 0, (bits + 7) / 8);
for (int i = 0; i < bits; ++i)
{
if (buffer[i * 2 + 1] & (PORT_TDO))
{
TDO[i/8] |= 1 << (i&7);
// printf("H");
}
else
{
// printf("L");
}
}
// printf("\n");
// printf(" Bits %d ", bit_counter);
// Switch LED Off
jtagSetLED(false);
return 0;
}

/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/XVC_1x/mlab_xvcd_port_FTDI.h
0,0 → 1,81
#ifndef MLAB_XVCD_PORT_FTDI_H
#define MLAB_XVCD_PORT_FTDI_H
// Pin Defs
// --------
// FTDI Pin Mask Definitions (valid for FT232R)
#define DBUS0 0x0001 // Bit 0 Data Bus
#define DBUS1 0x0002 // Bit 1
#define DBUS2 0x0004 // Bit 2
#define DBUS3 0x0008 // Bit 3
#define DBUS4 0x0010 // Bit 4
#define DBUS5 0x0020 // Bit 5
#define DBUS6 0x0040 // Bit 6
#define DBUS7 0x0080 // Bit 7
#define CBUS0 0x0100 // Bit 0 Control Bus
#define CBUS1 0x0200 // Bit 1
#define CBUS2 0x0400 // Bit 2
#define CBUS3 0x0800 // Bit 3
#define FTDI_TXD DBUS0 // Bit 0 RS232 Signal Alias
#define FTDI_RXD DBUS1 // Bit 1
#define FTDI_RTS DBUS2 // Bit 2
#define FTDI_CTS DBUS3 // Bit 3
#define FTDI_DTR DBUS4 // Bit 4
#define FTDI_DSR DBUS5 // Bit 5
#define FTDI_DCD DBUS6 // Bit 6
#define FTDI_RI DBUS7 // Bit 7
// Includes
// --------
#undef UNICODE
#define WIN32_LEAN_AND_MEAN
#include <windows.h> // Windows Console Application
#include <stdlib.h> // Standard Library (exit, atoi, ...)
#include <stdio.h> // Standard IO (printf, ...)
#include "mlab_xvcd.h" // Program Config (pin defs, settings, ...)
// Link with library
#include "ftd2xx.h" // FTDI Library
#pragma comment (lib, "ftd2xx.lib") // Tell MS compiller to link with this library
// Public Definitions
// ------------------
// Find Mode (for port open)
#define OPEN_BY_DESCRIPTION FT_OPEN_BY_DESCRIPTION // Find device by Description String
#define OPEN_BY_LOCATION FT_OPEN_BY_LOCATION // Find device by Bus Location
#define OPEN_BY_SERIAL_NUMBER FT_OPEN_BY_SERIAL_NUMBER // Find device by it's Serial Number
// Max Data lengt to send to FTDI as one block
#define FTDI_MAX_WRITESIZE 1024
// Function Prototypes (public functions only)
// -------------------------------------------
// Connect to FTDI driver
// Find the device and open driver
int jtagOpenPort(int findDeviceBy, char *findDeviceByStr);
// Enable or Disable Activity LED
void jtagSetLED(bool LedEnable);
// Set port to Idle state (all zeroes)
void jtagSetIdle();
// Close FTDI connection
int jtagClosePort();
// Send data to JTAG port and bring returned data
// Turn LED On during processing
int jtagScan(const unsigned char *TMS, const unsigned char *TDI, unsigned char *TDO, int bits);
#endif

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/DRILL.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/O2.pdf
0,0 → 1,199
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M109 No_PCB_Device,Standoff M3x5@No_PCB_Footprint
M110 No_PCB_Device,Standoff M3x5@No_PCB_Footprint
M111 No_PCB_Device,Standoff M3x5@No_PCB_Footprint
M112 No_PCB_Device,JUMPER@No_PCB_Footprint
M2 PAD,HOLE_M3@HOLE_M3
M3 PAD,HOLE_M3@HOLE_M3
M4 PAD,HOLE_M3@HOLE_M3
M5 FIDU,FIDU@FIDU
M6 FIDU,FIDU@FIDU
M7 FIDU_PASTE,FIDU_PASTE@FIDU_PASTE
M8 FIDU_PASTE,FIDU_PASTE@FIDU_PASTE
Q1 T-FET-GSD,2N7000SMD@SOT23
Q2 T-FET-GSD,2N7000SMD@SOT23
R1 R,27@R0805
R10 R,10k@R0805
R11 R,10k@R0805
R2 R,27@R0805
R3 R,100@R0805
R4 R,100@R0805
R5 R,100@R0805
R6 R,100@R0805
R7 R,330@R0805
R8 R,330@R0805
R9 R,330@R0805
TP1 TP,TPS@TPS
TP2 TP,TPS@TPS
TP3 TP,TPS@TPS
U1 SSO16_154,FT220XS@SSO16_154
*NET*
*SIGNAL* TMS
U1.6 R6.1
*SIGNAL* N00894
D1.C Q1.D
*SIGNAL* GND
R11.1 C4.1 M3.1 M4.1 Q1.S D3.C C3.1 C2.1
C6.1 C5.1 J1.4 J2.2 C7.1 J4.1 J4.2 J4.5
J4.6 D4.A Q2.S M1.1 M2.1 J1.5 J1.6 U1.5
U1.13 C1.1
*SIGNAL* VCC
L1.2 C4.2 C5.2 U1.12
*SIGNAL* N00158
J1.1 C3.2 L1.1 J4.3 J4.4
*SIGNAL* N00742
R6.2 J2.9
*SIGNAL* N01042
R8.2 D2.A
*SIGNAL* VCC_3V3
C6.2 U1.10 U1.11 R7.1 R8.1 R9.1 J3.1
*SIGNAL* VCC_IO
C7.2 U1.3 J3.2
*SIGNAL* USBDM
J1.2 C1.2 R1.1
*SIGNAL* USBDP
J1.3 C2.2 R2.1
*SIGNAL* N00252
R1.2 U1.9
*SIGNAL* VCC_TARGET
J2.1 R10.2 J3.3 D4.C
*SIGNAL* TDI
U1.4 R5.1
*SIGNAL* N01044
D2.C Q2.D
*SIGNAL* CBUS3
Q2.G R11.2 U1.16
*SIGNAL* N00821
R9.2 D3.A
*SIGNAL* N00733
R3.2 J2.4
*SIGNAL* N00739
R5.2 J2.7
*SIGNAL* N00830
R7.2 D1.A
*SIGNAL* N00736
R4.2 J2.6
*SIGNAL* N00254
R2.2 U1.8
*SIGNAL* TCK
U1.1 R3.1
*SIGNAL* N0000914
U1.14 TP2.1
*SIGNAL* N000094
U1.7 TP1.1
*SIGNAL* N0000915
U1.15 TP3.1
*SIGNAL* N00934
Q1.G R10.1
*SIGNAL* TDO
U1.2 R4.1
*END*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.DSN
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A_SCH.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH
Property changes:
Added: svn:ignore
+*.BOM
+*.DBK
+*.ONL
+*.opj

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/XVC_FT220X01A_Bot_Small.JPG
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/XVC_FT220X01A_Top_Small.JPG
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA/T2_AMA.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA/V1_AMA.pdf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/BOARD.PHO
0,0 → 1,347
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD024C,0.001*%
%ADD025C,0.01*%
%ADD029C,0.005*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D24*
G01X101000Y101000D02*
X101003D01*
X259000D02*
X259003D01*
X259000D02*
X259003D01*
X259000Y219000D02*
X259003D01*
G54D25*
X101000Y90000D02*
X162227D01*
X101000D02*
X111000Y92500D01*
Y87500*
X101000Y90000*
X259000D02*
X197773D01*
X259000D02*
X249000Y87500D01*
Y92500*
X259000Y90000*
X101000Y96000D02*
Y85000D01*
X259000Y96000D02*
Y85000D01*
X165227Y91563D02*
X165682Y91875D01*
X166364Y92813*
X166364D02*
Y86250D01*
X171364Y92813D02*
X169091D01*
X169091D02*
X168864Y90000D01*
X169091Y90313*
X169091D02*
X169773Y90625D01*
X170455*
X171136Y90313*
X171136D02*
X171591Y89688D01*
X171591D02*
X171818Y88750D01*
X171591Y88125*
X171364Y87188*
X171364D02*
X170909Y86563D01*
X170909D02*
X170227Y86250D01*
X169545*
X168864Y86563*
X168864D02*
X168636Y86875D01*
X168409Y87500*
X175000Y92813D02*
X174318Y92500D01*
X174091Y91875*
Y91250*
X174318Y90625*
X174773Y90313*
X174773D02*
X175682Y90000D01*
X176364Y89688*
X176364D02*
X176818Y89063D01*
X176818D02*
X177045Y88438D01*
X177045D02*
Y87500D01*
X176818Y86875*
X176591Y86563*
X176591D02*
X175909Y86250D01*
X175000*
X174318Y86563*
X174318D02*
X174091Y86875D01*
X173864Y87500*
Y88438*
X173864D02*
X174091Y89063D01*
X174091D02*
X174545Y89688D01*
X174545D02*
X175227Y90000D01*
X176136Y90313*
X176136D02*
X176591Y90625D01*
X176818Y91250*
Y91875*
X176591Y92500*
X175909Y92813*
X175909D02*
X175000D01*
X180455D02*
X179773Y92500D01*
X179318Y91563*
X179318D02*
X179091Y90000D01*
Y89063*
X179091D02*
X179318Y87500D01*
X179773Y86563*
X179773D02*
X180455Y86250D01*
X180909*
X181591Y86563*
X181591D02*
X182045Y87500D01*
X182273Y89063*
X182273D02*
Y90000D01*
X182045Y91563*
X182045D02*
X181591Y92500D01*
X180909Y92813*
X180909D02*
X180455D01*
X184318Y90625D02*
Y86250D01*
Y89375D02*
X185000Y90313D01*
X185000D02*
X185455Y90625D01*
X186136*
X186591Y90313*
X186591D02*
X186818Y89375D01*
Y86250*
Y89375D02*
X187500Y90313D01*
X187500D02*
X187955Y90625D01*
X188636*
X189091Y90313*
X189091D02*
X189318Y89375D01*
Y86250*
X191364Y92813D02*
X191591Y92500D01*
X191818Y92813*
X191818D02*
X191591Y93125D01*
X191364Y92813*
X191591Y90625D02*
Y86250D01*
X193864Y92813D02*
Y86250D01*
X270000Y101000D02*
Y143364D01*
Y101000D02*
X267500Y111000D01*
X272500*
X270000Y101000*
Y219000D02*
Y176636D01*
Y219000D02*
X272500Y209000D01*
X267500*
X270000Y219000*
X264000Y101000D02*
X275000D01*
X264000Y219000D02*
X275000D01*
X268437Y146364D02*
X268125Y146818D01*
X267187Y147500*
X267187D02*
X273750D01*
X268437Y149545D02*
X268125Y150000D01*
X267187Y150682*
X267187D02*
X273750D01*
X267187Y153864D02*
X267500Y153182D01*
X268125Y152955*
X268750*
X269375Y153182*
X269687Y153636*
X269687D02*
X270000Y154545D01*
X270312Y155227*
X270312D02*
X270937Y155682D01*
X270937D02*
X271562Y155909D01*
X271562D02*
X272500D01*
X273125Y155682*
X273437Y155455*
X273437D02*
X273750Y154773D01*
Y153864*
X273437Y153182*
X273437D02*
X273125Y152955D01*
X272500Y152727*
X271562*
X271562D02*
X270937Y152955D01*
X270937D02*
X270312Y153409D01*
X270312D02*
X270000Y154091D01*
X269687Y155000*
X269687D02*
X269375Y155455D01*
X268750Y155682*
X268125*
X267500Y155455*
X267187Y154773*
X267187D02*
Y153864D01*
Y159318D02*
X267500Y158636D01*
X268437Y158182*
X268437D02*
X270000Y157955D01*
X270937*
X270937D02*
X272500Y158182D01*
X273437Y158636*
X273437D02*
X273750Y159318D01*
Y159773*
X273437Y160455*
X273437D02*
X272500Y160909D01*
X270937Y161136*
X270937D02*
X270000D01*
X268437Y160909*
X268437D02*
X267500Y160455D01*
X267187Y159773*
X267187D02*
Y159318D01*
X269375Y163182D02*
X273750D01*
X270625D02*
X269687Y163864D01*
X269687D02*
X269375Y164318D01*
Y165000*
X269687Y165455*
X269687D02*
X270625Y165682D01*
X273750*
X270625D02*
X269687Y166364D01*
X269687D02*
X269375Y166818D01*
Y167500*
X269687Y167955*
X269687D02*
X270625Y168182D01*
X273750*
X267187Y170227D02*
X267500Y170455D01*
X267187Y170682*
X267187D02*
X266875Y170455D01*
X267187Y170227*
X269375Y170455D02*
X273750D01*
X267187Y172727D02*
X273750D01*
G54D29*
X101000Y101000D02*
X259000D01*
Y219000*
X101000*
Y101000*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/DRILL.DRL
0,0 → 1,37
%
T1C.035F197S55
X014006Y0114
X016906Y0114
X014994Y0114
X0138Y0211
X0168Y0211
X0158Y0211
X0188Y0211
X0191Y0179
X0181Y0179
X0171Y0179
X0181Y0169
X0191Y0169
X0171Y0169
X017894Y0114
X020794Y0114
X019806Y0114
X0218Y0211
X0208Y0211
X023Y0175
X023Y0165
X023Y0155
T2C.037F197S55
X0161Y0155
X0153Y0155
X0161Y0165
X0153Y0165
T3C.09F066S55
X0142Y0136
X0142Y0184
T4C.12598F035S794
X012Y012
X012Y02
X024Y02
X024Y012
M30

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/DRILL.rep
0,0 → 1,15
Drill Sizes Report
==================
Tool Size Pltd Feed Speed Qty
==== ==== ==== ==== ===== ===
1 35 x 197 550 21
2 37 x 197 550 4
3 90 x 66 550 2
4 125.98 x 35 794 4

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/M1.PHO
0,0 → 1,207
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD011C,0.06*%
%ADD012R,0.07X0.07*%
%ADD016C,0.04*%
%ADD024C,0.001*%
%ADD032R,0.08X0.08*%
%ADD033C,0.24622*%
%ADD041C,0.08*%
%ADD044R,0.05X0.05*%
%ADD064R,0.066X0.049*%
%ADD065R,0.049X0.066*%
%ADD066R,0.09X0.09*%
%ADD067C,0.09*%
%ADD068R,0.06X0.085*%
%ADD069C,0.075*%
%ADD070C,0.15*%
%ADD071R,0.053X0.08*%
%ADD072R,0.061X0.049*%
%ADD073R,0.049X0.061*%
%ADD074O,0.022X0.07*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D11*
G01X120000Y145000D03*
X246000D03*
G54D12*
X120000Y175000D03*
X246000D03*
G54D16*
X197000Y179000D03*
X212500Y141500D03*
X216500Y142000D03*
G54D24*
G54D32*
X218000Y211000D03*
X230000Y155000D03*
Y165000D03*
Y175000D03*
X191000Y169000D03*
Y179000D03*
X181000Y169000D03*
Y179000D03*
X171000Y169000D03*
Y179000D03*
G54D33*
X120000Y120000D03*
X240000D03*
Y200000D03*
X120000D03*
G54D41*
X208000Y211000D03*
X188000D03*
X168000D03*
X158000D03*
X138000D03*
G54D44*
X216000Y110000D03*
X224000D03*
X220000Y118000D03*
X222000Y135000D03*
X214000D03*
X218000Y127000D03*
G54D64*
X161000Y141200D03*
Y148800D03*
X153000Y141200D03*
Y148800D03*
X205000Y132200D03*
Y139800D03*
X196000Y132200D03*
Y139800D03*
X222000Y157200D03*
Y164800D03*
G54D65*
X153200Y174000D03*
X160800D03*
X192800Y159000D03*
X185200D03*
G54D66*
X207937Y114000D03*
X178937D03*
X149937D03*
G54D67*
X198063D03*
X169063D03*
X140063D03*
G54D68*
X218900Y203000D03*
X205100D03*
G54D69*
X161000Y165000D03*
Y155000D03*
X153000D03*
Y165000D03*
G54D70*
X142000Y136000D03*
Y184000D03*
G54D71*
X178300Y149000D03*
X189700D03*
G54D72*
X170000Y148800D03*
Y141200D03*
X232000Y136200D03*
Y143800D03*
X222000Y149800D03*
Y142200D03*
X218000Y181200D03*
Y188800D03*
X203000Y181200D03*
Y188800D03*
X189000Y122800D03*
Y115200D03*
G54D73*
X169200Y158000D03*
X176800D03*
X184800Y201000D03*
X177200D03*
X169800D03*
X162200D03*
X176800Y125000D03*
X169200D03*
X176800Y133000D03*
X169200D03*
G54D74*
X215750Y172500D03*
X213250D03*
X210750D03*
X208250D03*
X205750D03*
X203250D03*
X200750D03*
X198250D03*
Y149500D03*
X200750D03*
X203250D03*
X205750D03*
X208250D03*
X210750D03*
X213250D03*
X215750D03*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/P1.PHO
0,0 → 1,153
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD024C,0.001*%
%ADD040R,0.06X0.06*%
%ADD075R,0.052X0.035*%
%ADD076R,0.035X0.052*%
%ADD077R,0.046X0.071*%
%ADD078R,0.037X0.066*%
%ADD079R,0.036X0.036*%
%ADD080R,0.047X0.035*%
%ADD081R,0.035X0.047*%
%ADD082O,0.01X0.06*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D24*
G54D40*
G01X120000Y175000D03*
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G54D75*
X161000Y141200D03*
Y148800D03*
X153000Y141200D03*
Y148800D03*
X205000Y132200D03*
Y139800D03*
X196000Y132200D03*
Y139800D03*
X222000Y157200D03*
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G54D76*
X153200Y174000D03*
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G54D77*
X218900Y203000D03*
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G54D78*
X178300Y149000D03*
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G54D79*
X216000Y110000D03*
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X220000Y118000D03*
X222000Y135000D03*
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G54D80*
X170000Y148800D03*
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X189000Y122800D03*
Y115200D03*
G54D81*
X169200Y158000D03*
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X162200D03*
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X176800Y133000D03*
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G54D82*
X215750Y172500D03*
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X210750D03*
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X203250D03*
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X198250D03*
Y149500D03*
X200750D03*
X203250D03*
X205750D03*
X208250D03*
X210750D03*
X213250D03*
X215750D03*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/T2.PHO
0,0 → 1,1378
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD020C,0.012*%
%ADD024C,0.001*%
%ADD025C,0.01*%
%ADD029C,0.005*%
%ADD036C,0.008*%
*
*
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
*
G04 PC Custom Flashes*
G04 Layer Name XVC_FT220X01A.pcb - flashes*
%LPD*%
*
*
G04 PC Circuitry*
G04 Layer Name XVC_FT220X01A.pcb - circuitry*
%LPD*%
*
G54D20*
G01X219875Y167727D02*
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G54D29*
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G74*
X0Y0D02*
M02*

/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/V1.PHO
0,0 → 1,2952
*
*
G04 PADS 9.2 Build Number: 414666 generated Gerber (RS-274-X) file*
G04 PC Version=2.1*
*
%IN "XVC_FT220X01A.pcb"*%
*
%MOIN*%
*
%FSLAX35Y35*%
*
*
*
*
G04 PC Standard Apertures*
*
*
G04 Thermal Relief Aperture macro.*
%AMTER*
1,1,$1,0,0*
1,0,$1-$2,0,0*
21,0,$3,$4,0,0,45*
21,0,$3,$4,0,0,135*
%
*
*
G04 Annular Aperture macro.*
%AMANN*
1,1,$1,0,0*
1,0,$2,0,0*
%
*
*
G04 Odd Aperture macro.*
%AMODD*
1,1,$1,0,0*
1,0,$1-0.005,0,0*
%
*
*
G04 PC Custom Aperture Macros*
*
*
*
*
*
*
G04 PC Aperture Table*
*
%ADD012R,0.07X0.07*%
%ADD013C,0.23622*%
%ADD014C,0.05*%
%ADD017C,0.02*%
%ADD019C,0.03*%
%ADD020C,0.012*%
%ADD025C,0.01*%
%ADD031C,0.07*%
%ADD032R,0.08X0.08*%
%ADD035C,0.065*%
%ADD036C,0.008*%
%ADD040R,0.06X0.06*%
%ADD041C,0.08*%
%ADD055R,0.056X0.039*%
%ADD056R,0.039X0.056*%
%ADD057R,0.05X0.075*%
%ADD058C,0.14*%
%ADD059R,0.043X0.07*%
%ADD060R,0.04X0.04*%
%ADD061R,0.051X0.039*%
%ADD062R,0.039X0.051*%
%ADD063O,0.012X0.06*%
*
*
*
*
G04 PC Copper Outlines (0)*
G04 Layer Name XVC_FT220X01A.pcb - dark (0)*
%LPD*%
*
*
G04 PC Area=ANP000029*
G75*
G36*
G01*
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G37*
G74*
*
*
G04 PC Copper Outlines (1)*
G04 Layer Name XVC_FT220X01A.pcb - dark (1)*
%LPD*%
*
*
G04 PC Area=ANP000028*
G75*
G36*
G01*
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/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PrjInfo.txt
0,0 → 1,26
//
// Toto je popisný soubor pro popis obsahu adresáře (příklad)
//
[InfoShortDescription.en]
Xilinx Virtual (JTAG) Cable with FTDI FT220X chip
[InfoShortDescription.cs]
Xilinx Virtual (JTAG) Cable s obvodem FTDI FT220X
[InfoLongDescription.en]
XVC JTAG programming cable for downloading and debug projects
with XILINX FPGA/CPLD device. It is directly supported by ISE
design software (and Chipscope as well). The design software
sends commands across network to the computer with this cable
attached to it and supporting software sends data to JTAG
interface. This XVC cable is based on a cheap FTDI FT220X chip.
[InfoLongDescription.cs]
XVC JTAG programovací kabel pro nahrávání konfigurace a ladění
zařízení s obvody FPGA/CPLD firmy XILINX. Návrhový systém ISE
komunikuje po síti s obslužným programem, který přijaté JTAG
příkazy odesílá prostřednictvím obvodu FTDI FT220X do obvodu
XILINX.
[End]

/Modules/CPLD_FPGA/XILINX_XVC/DirInfo.txt
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[InfoShortDescription.en]
Xilinx Virtual Cable
[InfoShortDescription.cs]
Xilinx Virtual Cable
[InfoLongDescription.en]
Xilinx Virtual Cable (XVC in short) technology is based on fact
that the JTAG communication is send across TCP/IP network.
On the other site there is program which is sending JTAG command
to the connected interface. Network protocol is documented and
it is directly supported in ISE and ChipScope development SW.
So it is easy to integrate own JTAG interface fully integrated
into development SW.
[InfoLongDescription.cs]
Xilinx Virtual Cable (ve zkratce XVC) je technologie spočívající
v tom, že vývojové nástroje přesměrovávají komunikaci s JTAG
programovacím kabelem přes TCP/IP síť. Na druhé straně sítě
běží obslužný program, který zajišťuje provádění JTAG příkazů
prostřednictvím (nějakého) hardwaru připojeného ke vzdálenému systému.
Síťový protokol je dokumentovaný a jeho podpora je vestavěna
ve vývojovém balíku ISE pro práci s FPGA a CPLD firmy Xilinx.
Lze tak snadno realizovat navázání vlastní varianty JTAG rozhraní
do standardních vývojových nástrojů (ISE i ChipScope).
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