No changes between revisions
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.ASC |
23,6 → 23,7 |
M6 FIDU,FIDU@FIDU |
M7 FIDU_PASTE,FIDU_PASTE@FIDU_PASTE |
M8 FIDU_PASTE,FIDU_PASTE@FIDU_PASTE |
M9 PAD,PAD_1@PAD_1 |
P1 R-TRIM,10k@PT10V |
R1 R,4k7@R0805 |
R10 R,18@R0805 |
43,9 → 44,9 |
*SIGNAL* N00014 |
X1.B U3.1 |
*SIGNAL* N00017 |
X1.A U3.14 |
U3.14 X1.A |
*SIGNAL* N00167 |
J4.1 U3.4 |
U3.4 J4.1 |
*SIGNAL* N00058 |
R6.1 P1.2 |
*SIGNAL* N00101 |
53,17 → 54,17 |
*SIGNAL* N00054 |
P1.1 R7.2 |
*SIGNAL* N00217 |
R2.1 R4.2 J3.3 |
J3.3 R2.1 R4.2 |
*SIGNAL* S1/SDA |
R4.1 U3.13 |
*SIGNAL* N00215 |
J3.4 R3.2 |
*SIGNAL* S2/SCL |
U3.12 R5.1 |
R5.1 U3.12 |
*SIGNAL* N00219 |
R1.1 R5.2 J3.2 |
J3.2 R1.1 R5.2 |
*SIGNAL* S0 |
U3.2 R3.1 |
R3.1 U3.2 |
*SIGNAL* N01010 |
U3.11 R8.2 |
*SIGNAL* N01006 |
73,24 → 74,24 |
*SIGNAL* N01077 |
R9.1 J5.4 |
*SIGNAL* N01080 |
R8.1 J5.2 |
J5.2 R8.1 |
*SIGNAL* N01090 |
J5.6 R10.1 |
*SIGNAL* VCC_1V8 |
C7.2 R6.2 U2.5 C5.2 U3.3 |
R6.2 U3.3 C7.2 U2.5 C5.2 |
*SIGNAL* VCC_3V3 |
U2.1 U1.5 C3.2 D2.C R1.2 R2.2 U3.6 U3.7 |
C8.2 J2.3 J2.4 |
U3.7 R1.2 U3.6 D2.C U1.5 C3.2 J2.3 J2.4 |
R2.2 C8.2 U2.1 U2.3 |
*SIGNAL* GND |
U1.2 J3.1 C5.1 U1.3 D1.A R7.1 C4.1 U2.3 |
U2.2 D2.A J1.1 J1.2 J1.5 J1.6 U3.5 U3.10 |
M2.1 M4.1 M3.1 M1.1 J2.1 J2.2 J2.5 J2.6 |
C8.1 C1.1 C7.1 J5.5 J5.3 J5.1 J5.7 C2.1 |
C3.1 C6.1 |
M1.1 J1.1 J1.2 J2.1 J2.2 C1.1 C8.1 U1.2 |
J2.5 J2.6 J1.5 J1.6 D1.A R7.1 C5.1 C4.1 |
D2.A U2.2 J5.1 J5.3 J5.7 J5.5 C2.1 C3.1 |
M3.1 M9.1 J3.1 C6.1 C7.1 U3.5 U3.10 M2.1 |
M4.1 |
*SIGNAL* N01790 |
U1.4 C2.2 |
*SIGNAL* N02193 |
C4.2 U2.4 |
U2.4 C4.2 |
*SIGNAL* N01393 |
D1.C J1.3 J1.4 U1.1 C1.2 |
U1.3 C1.2 U1.1 D1.C J1.3 J1.4 |
*END* |