Problem with comparison.
/Modules/Clock/CLKHUB02A/PCB/CLKHUB.pcb
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/Modules/Clock/CLKHUB02A/SCH/CLKHUB.DSN
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/Modules/Clock/CLKHUB02A/SCH/CLKHUB.asc
0,0 → 1,129
*PADS-PCB*
*PART*
C1 C-ELYT,10uF@ELYTB
C2 C,100nF@C0805
C3 C,100nF@C0805
C4 C,100nF@C0805
C5 C,100nF@C0805
C6 C,100nF@C0805
C7 C,10nF@C0805
D1 D,1N4007SMD@MELF
J1 SATA,JUMP7@SATA
J10 SATA,JUMP7@SATA
J11 SATA,JUMP7@SATA
J12 JUMP2X3,JUMP2X3@JUMP2X3
J14 JUMP3,JUMP3@JUMP3
J15 JUMP3,JUMP3@JUMP3
J2 SATA,JUMP7@SATA
J3 SATA,JUMP7@SATA
J4 SATA,JUMP7@SATA
J5 SATA,JUMP7@SATA
J6 SATA,JUMP7@SATA
J7 SATA,JUMP7@SATA
J8 SATA,JUMP7@SATA
J9 SATA,JUMP7@SATA
M1 PAD,HOLE_M3@HOLE_M3
M2 PAD,HOLE_M3@HOLE_M3
M3 PAD,HOLE_M3@HOLE_M3
M4 PAD,HOLE_M3@HOLE_M3
R1 R,127@R0805
R10 R,100@R0805
R11 R,195@R0805
R12 R,195@R0805
R13 R,195@R0805
R14 R,195@R0805
R15 R,195@R0805
R16 R,195@R0805
R17 R,195@R0805
R18 R,195@R0805
R19 R,195@R0805
R2 R,127@R0805
R20 R,195@R0805
R21 R,195@R0805
R22 R,195@R0805
R23 R,195@R0805
R24 R,195@R0805
R25 R,195@R0805
R26 R,195@R0805
R27 R,195@R0805
R28 R,195@R0805
R29 R,195@R0805
R3 R,83@R0805
R30 R,195@R0805
R4 R,83@R0805
R5 R,127@R0805
R6 R,127@R0805
R7 R,83@R0805
R8 R,83@R0805
R9 R,100@R0805
U1 TQFP32,CDCLVP111@TQFP32
 
*NET*
*SIGNAL* GND
J1.1 J1.4 J1.7 J2.1 J2.4 J2.7 J3.1 J3.4
J3.7 J4.1 J4.4 J4.7 J5.1 J5.4 J5.7 J6.1
J6.4 J6.7 J7.1 J7.4 J7.7 J8.1 J8.4 J8.7
J9.1 J9.4 J9.7 J10.1 J10.4 J10.7 J11.1 J11.4
J11.7 J12.1 J12.2 J12.5 J12.6 D1.A C1.C C2.1
C3.1 C4.1 C5.1 C6.1 M1.1 M2.1 M3.1 M4.1
J14.1 R3.1 R4.1 R7.1 R8.1 R11.1 R12.1 R13.1
R14.1 R15.1 R16.1 U1.8 R18.1 R17.1 R19.1 R20.1
R21.1 R22.1 R23.1 R24.1 R25.1 R26.1 R27.1 R28.1
R29.1 R30.1 C7.2
*SIGNAL* N07209
J1.5 R5.1 R7.2 R10.1 U1.7
*SIGNAL* N07217
J1.6 R6.1 R8.2 R10.2 U1.6
*SIGNAL* N07225
J1.2 R1.1 R3.2 R9.1 U1.3 J15.3
*SIGNAL* N07229
J1.3 R2.1 R4.2 R9.2 U1.4 J15.2
*SIGNAL* N09725
J11.3 R14.2 U1.10
*SIGNAL* N09745
J10.3 R12.2 U1.12
*SIGNAL* N09755
J10.2 R11.2 U1.13
*SIGNAL* N13453
J11.2 R13.2 U1.11
*SIGNAL* N15785
U1.5 J15.1 C7.1
*SIGNAL* N15789
J14.2 U1.2
*SIGNAL* N16585
J9.3 R15.2 U1.14
*SIGNAL* N16592
J9.2 R16.2 U1.15
*SIGNAL* N16599
J8.3 U1.17 R25.2
*SIGNAL* N16606
J8.2 U1.18 R26.2
*SIGNAL* N16613
J7.3 U1.19 R27.2
*SIGNAL* N16620
J7.2 U1.20 R28.2
*SIGNAL* N16627
J6.3 U1.21 R29.2
*SIGNAL* N16645
J6.2 U1.22 R30.2
*SIGNAL* N16840
J5.3 U1.23 R23.2
*SIGNAL* N17106
J5.2 U1.24 R24.2
*SIGNAL* N19218
J4.3 U1.26 R21.2
*SIGNAL* N19240
J4.2 U1.27 R22.2
*SIGNAL* N19269
J3.3 U1.28 R19.2
*SIGNAL* N19305
J3.2 U1.29 R20.2
*SIGNAL* N19362
J2.3 U1.30 R17.2
*SIGNAL* N19391
J2.2 U1.31 R18.2
*SIGNAL* VCC
J12.3 J12.4 D1.C C1.A C2.2 C3.2 C4.2 C5.2
C6.2 J14.3 R1.2 R2.2 R5.2 R6.2 U1.1 U1.9
U1.16 U1.25 U1.32
*END*
/Modules/Clock/CLKHUB02A/DOC/CLKHUB02A.pdf
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svn:mime-type = application/octet-stream
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/Modules/Clock/CLKHUB02A/PrjInfo.txt
0,0 → 1,12
[InfoShortDescription.en]
Low jitter clock distributor
 
[InfoShortDescription.cs]
Distributor hodin s nízkým šumem.
 
[InfoLongDescription.en]
high speed clock distributor with ten LVPECL outputs. Usabele up to 3.5GHz
 
[InfoLongDescription.cs]
10ti násobný budič hodin. Výstupy jsou v logice LVPECL vyvedené na SATA konektory. Je použitelný do frekvence 3,5GHz
[End]