Subversion Repositories – MLAB

/Modules/PIC/PICPGR301A/GAL/ @ 829   →   /Modules/PIC/PICPGR301A/GAL/ @ 830

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/Modules/PIC/PICPGR301A/GAL/GAL4.EQN
0,0 → 1,45
CHIP GAL4 PAL16V8
; Obsah obvodu GAL pro PICPGR3
;
; Obsah kompatibilni s puvodni verzi PICPGR (verze 2).
; Obsahuje ochrannou logiku proti soucasne aktivaci reset a VPP.
; Nepouziva prepinani modu ani rezervni vystupy.
;
; 1.00 - kompatibilni verze s PICPGR verze 2 pro PICPGR3
D0=9
D1=8
D2=7
D3=6
D4=5
D5=4
D6=3
D7=2
GND=10
CLOCK=12
DATA=13
RES=14
VPPON=18
VCCON=17
DQ=19
VCC=20
@UES PICPRG3
EQUATIONS
DATA = D0
DATA.OE = D1 * /D7
CLOCK = D2
CLOCK.OE = D3 * /D7
VCCON = D4 * /D7
VPPON = D5 * /D7 * D4
RES = D6 * /D7 * /D5
DQ = DATA

/Modules/PIC/PICPGR301A/GAL/GAL4.JED
0,0 → 1,37

GAL16V8
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Assembled from "GAL4.EQN". Date: 3-22-105
*
QF2194*QP20*F0*
L0000
11111111111111111111111111111111
11111111111111111111111111011111*
L0256
11111111111111111111111111111111
10111111011101111111111111111111*
L0512
11111111111111111111111111111111
10111111111101111111111111111111*
L1280
11111111111111111111111111111111
10110111101111111111111111111111*
L1536
10111111111111111111111101111111
11111111111111111111111111110111*
L1792
10111111111111110111111111111111
11111111111111111111011111111111*
L2048
11100111*
L2056
0101000001001001010000110101000001010010010001110011001100000000*
L2120
11111111*
L2128
1100000011000000110000000000000000000000110000001100000011000000*
L2192
11*
C34C8*
0000

/Modules/PIC/PICPGR301A/GAL/GAL4.LOG
0,0 → 1,70
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Document file for GAL4.EQN
Device: 16V8
$LABELS 20 nc D7 D6 D5 D4 D3 D2 D1 D0 GND nc CLOCK DATA RES nc nc VCCON VPPON
DQ VCC
Pin Label Type
--- ----- ----
2 D7 com input
3 D6 com input
4 D5 com input
5 D4 com input
6 D3 com input
7 D2 com input
8 D1 com input
9 D0 com input
10 GND ground pin
12 CLOCK pos,trst,com output
13 DATA pos,trst,com feedback
14 RES pos,trst,com output
17 VCCON pos,trst,com output
18 VPPON pos,trst,com output
19 DQ pos,trst,com output
20 VCC power pin
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Device Utilization:
No of dedicated inputs used : 8/10 (80.0%)
No of dedicated outputs used : 2/2 (100.0%)
No of feedbacks used as dedicated outputs : 3/6 (50.0%)
No of feedbacks used : 1/6 (16.7%)
------------------------------------------
Pin Label Terms Usage
------------------------------------------
19 DQ 2/8 (25.0%)
18 VPPON 2/8 (25.0%)
17 VCCON 2/8 (25.0%)
14 RES 2/8 (25.0%)
13 DATA 3/8 (37.5%)
12 CLOCK 3/8 (37.5%)
------------------------------------------
Total 12/64 (18.8%)
------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Chip diagram (DIP)
._____ _____.
| \__/ |
| 1 20 | VCC
D7 | 2 19 | DQ
D6 | 3 18 | VPPON
D5 | 4 17 | VCCON
D4 | 5 16 |
D3 | 6 15 |
D2 | 7 14 | RES
D1 | 8 13 | DATA
D0 | 9 12 | CLOCK
GND | 10 11 |
|______________|

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/!____!.txt
0,0 → 1,0
Stare verze GAL (1 az 3) nejdou pouzit s touto verzi schematu.

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL1.EQN
0,0 → 1,36
CHIP GAL1 PAL16V8
D0=2
D1=3
D2=4
D3=5
D4=6
D5=7
D6=8
D7=9
GND=10
CLOCK=12
DATA=13
RES=14
VPPON=15
VCCON=16
DQ=17
VCC=20
@UES PICPRG
EQUATIONS
DATA = D0
DATA.OE = D1 * /D7
CLOCK = D2
CLOCK.OE = D3 * /D7
VCCON = D4 * /D7
VPPON = D5 * /D7
RES = D6 * /D7
DQ = DATA

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL1.JED
0,0 → 1,51

GAL16V8
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Assembled from "gal1.eqn". Date: 8-20-95
*
N@ D0 @2
N@ D1 @3
N@ D2 @4
N@ D3 @5
N@ D4 @6
N@ D5 @7
N@ D6 @8
N@ D7 @9
N@ CLOCK @12
N@ DATA @13
N@ RES @14
N@ VPPON @15
N@ VCCON @16
N@ DQ @17
QF2194*QP20*F0*
L0512
11111111111111111111111111111111
11111111111111111111111111011111*
L0768
11111111111111111111111111111111
11111111111111110111111111111011*
L1024
11111111111111111111111111111111
11111111111111111111011111111011*
L1280
11111111111111111111111111111111
11111111111111111111111101111011*
L1536
11110111111111111111111111111011
01111111111111111111111111111111*
L1792
11111111111101111111111111111011
11111111011111111111111111111111*
L2048
00111111*
L2056
0101000001001001010000110101000001010010010001110000000000000000*
L2120
11111111*
L2128
0000000000000000110000001100000011000000110000001100000011000000*
L2192
11*
C339C*
0000

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL1.LOG
0,0 → 1,70
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Document file for gal1.eqn
Device: 16V8
$LABELS 20 nc D0 D1 D2 D3 D4 D5 D6 D7 GND nc CLOCK DATA RES VPPON VCCON DQ
nc nc VCC
Pin Label Type
--- ----- ----
2 D0 com input
3 D1 com input
4 D2 com input
5 D3 com input
6 D4 com input
7 D5 com input
8 D6 com input
9 D7 com input
10 GND ground pin
12 CLOCK pos,trst,com output
13 DATA pos,trst,com feedback
14 RES pos,trst,com output
15 VPPON pos,trst,com output
16 VCCON pos,trst,com output
17 DQ pos,trst,com output
20 VCC power pin
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Device Utilization:
No of dedicated inputs used : 8/10 (80.0%)
No of dedicated outputs used : 2/2 (100.0%)
No of feedbacks used as dedicated outputs : 3/6 (50.0%)
No of feedbacks used : 1/6 (16.7%)
------------------------------------------
Pin Label Terms Usage
------------------------------------------
17 DQ 2/8 (25.0%)
16 VCCON 2/8 (25.0%)
15 VPPON 2/8 (25.0%)
14 RES 2/8 (25.0%)
13 DATA 3/8 (37.5%)
12 CLOCK 3/8 (37.5%)
------------------------------------------
Total 12/64 (18.8%)
------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Chip diagram (DIP)
._____ _____.
| \__/ |
| 1 20 | VCC
D0 | 2 19 |
D1 | 3 18 |
D2 | 4 17 | DQ
D3 | 5 16 | VCCON
D4 | 6 15 | VPPON
D5 | 7 14 | RES
D6 | 8 13 | DATA
D7 | 9 12 | CLOCK
GND | 10 11 |
|______________|

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL2.EQN
0,0 → 1,39
CHIP GAL1 PAL16V8
; Pro druhou verzi PCB
; bez ochran proti chyne manipulaci
; --- UZ NEPOUZIVAT ---
D0=9
D1=8
D2=7
D3=6
D4=5
D5=4
D6=3
D7=2
GND=10
CLOCK=12
DATA=13
RES=15
VPPON=18
VCCON=17
DQ=19
VCC=20
@UES PICPRG
EQUATIONS
DATA = D0
DATA.OE = D1 * /D7
CLOCK = D2
CLOCK.OE = D3 * /D7
VCCON = D4 * /D7
VPPON = D5 * /D7
RES = D6 * /D7
DQ = DATA

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL2.JED
0,0 → 1,51

GAL16V8
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Assembled from "gal2.eqn". Date: 1-20-96
*
N@ D7 @2
N@ D6 @3
N@ D5 @4
N@ D4 @5
N@ D3 @6
N@ D2 @7
N@ D1 @8
N@ D0 @9
N@ CLOCK @12
N@ DATA @13
N@ RES @15
N@ VCCON @17
N@ VPPON @18
N@ DQ @19
QF2194*QP20*F0*
L0000
11111111111111111111111111111111
11111111111111111111111111011111*
L0256
11111111111111111111111111111111
10111111011111111111111111111111*
L0512
11111111111111111111111111111111
10111111111101111111111111111111*
L1024
11111111111111111111111111111111
10110111111111111111111111111111*
L1536
10111111111111111111111101111111
11111111111111111111111111110111*
L1792
10111111111111110111111111111111
11111111111111111111011111111111*
L2048
11101011*
L2056
0101000001001001010000110101000001010010010001110000000000000000*
L2120
11111111*
L2128
1100000011000000110000000000000011000000000000001100000011000000*
L2192
11*
C33FE*
0000

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL2.LOG
0,0 → 1,70
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Document file for gal2.eqn
Device: 16V8
$LABELS 20 nc D7 D6 D5 D4 D3 D2 D1 D0 GND nc CLOCK DATA nc RES nc VCCON VPPON
DQ VCC
Pin Label Type
--- ----- ----
2 D7 com input
3 D6 com input
4 D5 com input
5 D4 com input
6 D3 com input
7 D2 com input
8 D1 com input
9 D0 com input
10 GND ground pin
12 CLOCK pos,trst,com output
13 DATA pos,trst,com feedback
15 RES pos,trst,com output
17 VCCON pos,trst,com output
18 VPPON pos,trst,com output
19 DQ pos,trst,com output
20 VCC power pin
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Device Utilization:
No of dedicated inputs used : 8/10 (80.0%)
No of dedicated outputs used : 2/2 (100.0%)
No of feedbacks used as dedicated outputs : 3/6 (50.0%)
No of feedbacks used : 1/6 (16.7%)
------------------------------------------
Pin Label Terms Usage
------------------------------------------
19 DQ 2/8 (25.0%)
18 VPPON 2/8 (25.0%)
17 VCCON 2/8 (25.0%)
15 RES 2/8 (25.0%)
13 DATA 3/8 (37.5%)
12 CLOCK 3/8 (37.5%)
------------------------------------------
Total 12/64 (18.8%)
------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Chip diagram (DIP)
._____ _____.
| \__/ |
| 1 20 | VCC
D7 | 2 19 | DQ
D6 | 3 18 | VPPON
D5 | 4 17 | VCCON
D4 | 5 16 |
D3 | 6 15 | RES
D2 | 7 14 |
D1 | 8 13 | DATA
D0 | 9 12 | CLOCK
GND | 10 11 |
|______________|

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL3.EQN
0,0 → 1,40
CHIP GAL1 PAL16V8
; Pro druhou verzi PCB
; s ochranami proti chyne manipulaci
; WORK VERZE
D0=9
D1=8
D2=7
D3=6
D4=5
D5=4
D6=3
D7=2
GND=10
CLOCK=12
DATA=13
RES=15
VPPON=18
VCCON=17
DQ=19
VCC=20
@UES PICPRG
EQUATIONS
DATA = D0
DATA.OE = D1 * /D7
CLOCK = D2
CLOCK.OE = D3 * /D7
VCCON = D4 * /D7
VPPON = D5 * /D7 * D4
RES = D6 * /D7 * /D5
DQ = DATA

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL3.JED
0,0 → 1,51

GAL16V8
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Assembled from "gal3.eqn". Date: 1-22-96
*
N@ D7 @2
N@ D6 @3
N@ D5 @4
N@ D4 @5
N@ D3 @6
N@ D2 @7
N@ D1 @8
N@ D0 @9
N@ CLOCK @12
N@ DATA @13
N@ RES @15
N@ VCCON @17
N@ VPPON @18
N@ DQ @19
QF2194*QP20*F0*
L0000
11111111111111111111111111111111
11111111111111111111111111011111*
L0256
11111111111111111111111111111111
10111111011101111111111111111111*
L0512
11111111111111111111111111111111
10111111111101111111111111111111*
L1024
11111111111111111111111111111111
10110111101111111111111111111111*
L1536
10111111111111111111111101111111
11111111111111111111111111110111*
L1792
10111111111111110111111111111111
11111111111111111111011111111111*
L2048
11101011*
L2056
0101000001001001010000110101000001010010010001110000000000000000*
L2120
11111111*
L2128
1100000011000000110000000000000011000000000000001100000011000000*
L2192
11*
C33EC*
0000

/Modules/PIC/PICPGR301A/GAL/OLD_GAL/GAL3.LOG
0,0 → 1,70
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Document file for gal3.eqn
Device: 16V8
$LABELS 20 nc D7 D6 D5 D4 D3 D2 D1 D0 GND nc CLOCK DATA nc RES nc VCCON VPPON
DQ VCC
Pin Label Type
--- ----- ----
2 D7 com input
3 D6 com input
4 D5 com input
5 D4 com input
6 D3 com input
7 D2 com input
8 D1 com input
9 D0 com input
10 GND ground pin
12 CLOCK pos,trst,com output
13 DATA pos,trst,com feedback
15 RES pos,trst,com output
17 VCCON pos,trst,com output
18 VPPON pos,trst,com output
19 DQ pos,trst,com output
20 VCC power pin
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Device Utilization:
No of dedicated inputs used : 8/10 (80.0%)
No of dedicated outputs used : 2/2 (100.0%)
No of feedbacks used as dedicated outputs : 3/6 (50.0%)
No of feedbacks used : 1/6 (16.7%)
------------------------------------------
Pin Label Terms Usage
------------------------------------------
19 DQ 2/8 (25.0%)
18 VPPON 2/8 (25.0%)
17 VCCON 2/8 (25.0%)
15 RES 2/8 (25.0%)
13 DATA 3/8 (37.5%)
12 CLOCK 3/8 (37.5%)
------------------------------------------
Total 12/64 (18.8%)
------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003)
Copyright (R) National Semiconductor Corporation 1990,1991
Chip diagram (DIP)
._____ _____.
| \__/ |
| 1 20 | VCC
D7 | 2 19 | DQ
D6 | 3 18 | VPPON
D5 | 4 17 | VCCON
D4 | 5 16 |
D3 | 6 15 | RES
D2 | 7 14 |
D1 | 8 13 | DATA
D0 | 9 12 | CLOCK
GND | 10 11 |
|______________|

/Modules/PIC/PICPGR301A/GAL/OPALJR/!____!.txt
0,0 → 1,0
OPAL Junior - free verze

/Modules/PIC/PICPGR301A/GAL/OPALJR/DEVICE.LIB
0,0 → 1,1402
$VERSION V000
$GENERIC
10H8 10L8 10P8 12H6 12L10 12L6 12P6 14H4 14H8
14L4 14L8 14P4 14P8 16C1 16C4 16H2 16H6 16H8
16L2 16L6 16L8 16P2 16P4 16P6 16P8 16PE8 16R4
16R6 16R8 16RA8 16RD8 16RM4 16RP4 16RP6 16RP8 16V8A
16V8 18L4 18H4 18P4 20C1 20H2 20H8 20L10 20L2
20L8 20P2 20P8 20R4 20R6 20R8 20RA10 20RP4 20RP6
20RP8 20V8A 20V8 20X10 20X4 20X8 22V10 6001 MAPL128
MAPL144
$16C4
2048
0.14
2 28 12 0 0 1 32 64 0 0 0 0
0 0 25 24 5 6 22 21 8 9 0 0
8 8 8 0 8 0 8 0 8 0 8 8
0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0
10 10 6 7 6 7 7 6 7 6 10 10
1 27 2 26 3 20 4 19 10 18 11 17 12 16 13 15
4 7 14 23 28
VCCO VEE VCCO VCC
0 0
$16P4
2056
0.14
2 24 8 0 0 1 32 64 0 0 0 0
1
0 0 20 5 18 7 0 0
8 8 8 8 8 8 8 8
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
10 10 6 6 6 6 10 10
1 23 2 22 3 21 4 17 8 16 9 15 10 14 11 13
1 2048 1
4
10 0 11
10 1 10
6 0 7
6 1 6
1 2048 8
4 6 12 19 24
VCCO VEE VCCO VCC
0 0
$EC16P8
2056
0.14
2 24 8 0 0 1 32 64 0 0 0 0
1
21 4 20 5 18 7 17 8
8 8 8 8 8 8 8 8
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
8 8 6 6 6 6 8 8
1 23 2 22 3 21 4 17 8 16 9 15 10 14 11 13
1 2048 1
4
8 0 9
8 1 8
6 0 7
6 1 6
1 2048 8
4 6 12 19 24
VCCO VEE VCCO VCC
0 0
$16PE8
2056
0.14
2 28 8 0 0 1 32 64 0 0 0 0
1
25 5 24 6 22 8 21 9
8 8 8 8 8 8 8 8
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
6 6 6 6 6 6 6 6
1 27 2 26 3 20 4 19 10 18 11 17 12 16 13 15
1 2048 1
2
6 0 7
6 1 6
1 2048 8
4 7 14 23 28
VCCO VEE VCCO VCC
0 0
$16RD8
2056
0.14
2 24 8 0 0 1 32 64 0 0 0 0
1
21 4 20 5 18 7 17 8
8 8 8 8 8 8 8 8
3 3 3 3 3 3 3 3
13 13 13 13 13 13 13 13
4 4 4 4 4 4 4 4
5 23 2 22 3 21 4 17 8 20 7 15 10 14 11 18
1 2048 1
2
4 0 5
4 1 4
1 2048 8
8 1 6 9 12 13 16 19 24
MR VCCO CLK1 VEE /OE CLK2 VCCO VCC
0 0
$16RM4
2056
0.14
2 24 8 0 0 1 32 64 0 0 0 0
1
21 4 20 5 18 7 17 8
8 8 8 8 8 8 8 8
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
10 10 4 4 4 4 10 10
5 23 2 22 3 21 4 17 8 20 7 15 10 14 11 18
1 2048 1
4
10 0 11
10 1 10
4 0 5
4 1 4
1 2048 8
8 1 6 9 12 13 16 19 24
MR VCCO CLK1 VEE CLK3 CLK2 VCCO VCC
0 0
$16V8
2194
0.14
1 20 8 0 0 1 32 64 0 0 0 0
1
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
1 0 0 0 0 0 0 1
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
2 2192 2193
2 2048 1 2120 1
20
0 0100 4
0 0110 5
0 0101 30
0 0111 31
0 1000 6
0 1010 7
0 1001 10
0 1011 11
0 1101 30
0 1111 31
1 0100 4
1 0110 5
1 0101 30
1 0111 31
1 1000 6
1 1010 7
1 1001 10
1 1011 11
1 1101 32
1 1111 33
5 2048 8 2056 64 2120 8 2128 64 2192 2
4 1 10 11 20
CLK GND /OE VCC
2056 64
$16V8A
2194
0.14
1 20 8 0 0 1 32 64 0 0 0 0
1
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
1 0 0 0 0 0 0 1
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
2 2192 2193
2 2048 1 2120 1
20
0 0100 4
0 0110 5
0 0101 30
0 0111 31
0 1000 6
0 1010 7
0 1001 10
0 1011 11
0 1101 30
0 1111 31
1 0100 4
1 0110 5
1 0101 30
1 0111 31
1 1000 6
1 1010 7
1 1001 10
1 1011 11
1 1101 32
1 1111 33
5 2048 8 2056 64 2120 8 2128 64 2192 2
4 1 10 11 20
CLK GND /OE VCC
2056 64
$G20RA10
3290
0.14
1 24 10 0 0 1 40 80 0 0 0 0
1
23 22 21 20 19 18 17 16 15 14
8 8 8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56 64 72
12 12 12 12 12 12 12 12 12 12
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
1 3200 1
2
12 0 12
12 1 13
2 3200 10 3210 80
4 1 12 13 24
/PL GND /OE VCC
3210 80
$20V8
2706
0.14
1 24 8 0 0 1 40 64 0 0 0 0
1
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
1 0 0 0 0 0 0 1
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
2 2704 2705
2 2560 1 2632 1
20
0 0100 4
0 0110 5
0 0101 30
0 0111 31
0 1000 6
0 1010 7
0 1001 10
0 1011 11
0 1101 30
0 1111 31
1 0100 4
1 0110 5
1 0101 30
1 0111 31
1 1000 6
1 1010 7
1 1001 10
1 1011 11
1 1101 32
1 1111 33
5 2560 8 2568 64 2632 8 2640 64 2704 2
4 1 12 13 24
CLK GND /OE VCC
2568 64
$20V8A
2706
0.14
1 24 8 0 0 1 40 64 0 0 0 0
1
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
1 0 0 0 0 0 0 1
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
2 2704 2705
2 2560 1 2632 1
20
0 0100 4
0 0110 5
0 0101 30
0 0111 31
0 1000 6
0 1010 7
0 1001 10
0 1011 11
0 1101 30
0 1111 31
1 0100 4
1 0110 5
1 0101 30
1 0111 31
1 1000 6
1 1010 7
1 1001 10
1 1011 11
1 1101 32
1 1111 33
5 2560 8 2568 64 2632 8 2640 64 2704 2
4 1 12 13 24
CLK GND /OE VCC
2568 64
$G22V10
5892
0.14
1 24 10 0 0 1 44 132 0 1 0 0
23 22 21 20 19 18 17 16 15 14
9 11 13 15 17 17 15 13 11 9
1 1 1 1 1 1 1 1 1 1
1 10 21 34 49 66 83 98 111 122
0 0 0 0 0 0 0 0 0 0
1 23 2 22 3 21 4 20 5 19 6 18 7 17 8 16 9 15 10 14 11 13
2 5808 2 5809 2
4
0 00 50
0 01 51
0 10 30
0 11 31
2 5808 20 5828 64
3 1 12 24
CLK GND VCC
5828 64
$6001
8294
0.14
1 24 10 8 10 1 78 64 36 0 2 11
14 15 16 17 18 19 20 21 22 23
25 26 27 28 29 30 31 32
33 34 35 36 37 38 39 40 41 42
64 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1
73 72 71 70 69 68 67 66 65 64
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
1 2 3 4 5 6 7 8 9 10 11 32 31 30 29 28 27 26 25 23 22 21 20 19 18 17 16 15 14 33 34 35 36 37 38 39 40 41 42
14 15 16 17 18 19 20 21 22 23 25 26 27 28 29 30 31 32
4 8218 8219 8220 8221
4 8178 4 8179 4 8180 4 8181 4
3 8175 -3 8176 -3 8177 -3
19
0 00000000000 4
0 00000000000 5
0 00000000000 30
0 00000000000 31
0 00000000000 6
0 00000000000 7
0 00000000000 8
0 00000000000 9
0 00000000000 10
0 00000000000 11
0 00000000000 40
0 00000000000 42
0 00000000000 44
0 00000000000 46
1 00000000000 5
1 00000000000 8
1 00000000000 9
1 00000000000 44
1 00000000000 46
4 8154 24 8178 40 8218 4 8222 72
4 1 12 13 24
ICLK GND OCLK VCC
8222 72
$MAPL128
14833
0.14
1 28 16 8 0 8 58 16 54 0 2 4
23 22 21 20 19 18 17 7 8 9 10 11 12 13 15 16
29 30 31 32 33 34 35 36
37 38 39
16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
129 129 129 129 129 129 129 129 129 129 129 129 129 129 129 129
3 3 3 2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
6 5 4 3 2 27 26 25 24 11 10 9 8 7 17 18 19 20 21 22 23 29 30 31 32 33 34 35 36
37 38 39 29 30 31 32 33 34 35 36 23 22 21 20 19 18 17 7 8 9 10 11 12 13 15 16
6 14579 1 14606 1 14633 1 14657 1 14673 1 14689 1
4 14571 1 14598 1 14625 1 14649 1
3 14568 1 14595 1 14622 1
8 14568 27 14595 27 14622 27 14649 24 14673 16 14689 16 14705 64 14769 64
4 1 14 24 28
CLK GND OE VCC
14705 128
$MAPL144
14850
0.14
1 44 24 0 0 8 58 16 54 0 2 4
7 10 11 12 36 35 34 33 32 29 28 27 26 25 24 13 14 17 18 19 20 21 22 23
45 46 47
16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
129 129 129 129 129 129 129 129 129 129 129 129
129 129 129 129 129 129 129 129 129 129 129 129
3 3 3 2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
6 5 4 3 2 43 42 41 40 19 18 17 14 13 24 25 26 27 28 29 32 7 10 11 12 36 35 34 33
45 46 47 7 10 11 12 36 35 34 33 32 29 28 27 26 25 24 13 14 17 18 19 20 21 22 23
6 14571 1 14598 1 14625 1 14649 1 14673 1 14697 1
3 14568 1 14595 1 14622 1
8 14568 27 14595 27 14622 27 14649 24 14673 24 14697 24 14721 64 14785 64
11 1 8 9 15 16 30 31 37 38 39 44
CLK GND GND VCC VCC GND GND VCC VCC OE NC
14721 128
$10H8
320
0.14
0 20 8 0 0 1 20 16 0 0 0 0
19 18 17 16 15 14 13 12
2 2 2 2 2 2 2 2
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
7 7 7 7 7 7 7 7
2 1 3 4 5 6 7 8 9 11
2 10 20
GND VCC
0 0
$10L8
320
0.14
0 20 8 0 0 1 20 16 0 0 0 0
19 18 17 16 15 14 13 12
2 2 2 2 2 2 2 2
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
6 6 6 6 6 6 6 6
2 1 3 4 5 6 7 8 9 11
2 10 20
GND VCC
0 0
$10P8
328
0.14
0 20 8 0 0 1 20 16 0 0 0 0
1
19 18 17 16 15 14 13 12
2 2 2 2 2 2 2 2
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
6 6 6 6 6 6 6 6
2 1 3 4 5 6 7 8 9 11
1 320 1
2
6 0 6
6 1 7
1 320 8
2 10 20
GND VCC
0 0
$12H6
384
0.14
0 20 6 0 0 1 24 16 0 0 0 0
18 17 16 15 14 13
4 2 2 2 2 4
0 0 0 0 0 0
0 0 0 0 0 0
7 7 7 7 7 7
2 1 3 19 4 5 6 7 8 12 9 11
2 10 20
GND VCC
0 0
$12L10
480
0.14
0 24 10 0 0 1 24 20 0 0 0 0
23 22 21 20 19 18 17 16 15 14
2 2 2 2 2 2 2 2 2 2
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
6 6 6 6 6 6 6 6 6 6
2 1 3 4 5 6 7 8 9 10 11 13
2 12 24
GND VCC
0 0
$12L6
384
0.14
0 20 6 0 0 1 24 16 0 0 0 0
18 17 16 15 14 13
4 2 2 2 2 4
0 0 0 0 0 0
0 0 0 0 0 0
6 6 6 6 6 6
2 1 3 19 4 5 6 7 8 12 9 11
2 10 20
GND VCC
0 0
$12P6
390
0.14
0 20 6 0 0 1 24 16 0 0 0 0
1
18 17 16 15 14 13
4 2 2 2 2 4
0 0 0 0 0 0
0 0 0 0 0 0
6 6 6 6 6 6
2 1 3 19 4 5 6 7 8 12 9 11
1 384 1
2
6 0 6
6 1 7
1 384 6
2 10 20
GND VCC
0 0
$14H4
448
0.14
0 20 4 0 0 1 28 16 0 0 0 0
17 16 15 14
4 4 4 4
0 0 0 0
0 0 0 0
7 7 7 7
2 1 3 19 4 18 5 6 7 13 8 12 9 11
2 10 20
GND VCC
0 0
$14H8
560
0.14
0 24 8 0 0 1 28 20 0 0 0 0
22 21 20 19 18 17 16 15
4 2 2 2 2 2 2 4
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
7 7 7 7 7 7 7 7
2 1 3 23 4 5 6 7 8 9 10 14 11 13
2 12 24
GND VCC
0 0
$14L4
448
0.14
0 20 4 0 0 1 28 16 0 0 0 0
17 16 15 14
4 4 4 4
0 0 0 0
0 0 0 0
6 6 6 6
2 1 3 19 4 18 5 6 7 13 8 12 9 11
2 10 20
GND VCC
0 0
$14L8
560
0.14
0 24 8 0 0 1 28 20 0 0 0 0
22 21 20 19 18 17 16 15
4 2 2 2 2 2 2 4
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
6 6 6 6 6 6 6 6
2 1 3 23 4 5 6 7 8 9 10 14 11 13
2 12 24
GND VCC
0 0
$14P4
452
0.14
0 20 4 0 0 1 28 16 0 0 0 0
1
17 16 15 14
4 4 4 4
0 0 0 0
0 0 0 0
6 6 6 6
2 1 3 19 4 18 5 6 7 13 8 12 9 11
1 448 1
2
6 0 6
6 1 7
1 448 4
2 10 20
GND VCC
0 0
$14P8
568
0.14
0 24 8 0 0 1 28 20 0 0 0 0
1
22 21 20 19 18 17 16 15
4 2 2 2 2 2 2 4
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
6 6 6 6 6 6 6 6
2 1 3 23 4 5 6 7 8 9 10 14 11 13
1 560 1
2
6 0 6
6 1 7
1 560 8
2 12 24
GND VCC
0 0
$16C1
512
0.14
0 20 2 0 0 1 32 16 0 0 0 0
16 15
16 0
0 0
0 0
7 6
2 1 3 19 4 18 5 17 6 14 7 13 8 12 9 11
2 10 20
GND VCC
0 0
$16H2
512
0.14
0 20 2 0 0 1 32 16 0 0 0 0
16 15
8 8
0 0
0 0
7 7
2 1 3 19 4 18 5 17 6 14 7 13 8 12 9 11
2 10 20
GND VCC
0 0
$16H6
640
0.14
0 24 6 0 0 1 32 20 0 0 0 0
21 20 19 18 17 16
4 4 2 2 4 4
0 0 0 0 0 0
0 0 0 0 0 0
7 7 7 7 7 7
2 1 3 23 4 22 5 6 7 8 9 15 10 14 11 13
2 12 24
GND VCC
0 0
$16H8
2048
0.14
0 20 8 0 0 1 32 64 0 0 0 0
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
33 31 31 31 31 31 31 33
2 1 3 18 4 17 5 16 6 15 7 14 8 13 9 11
2 10 20
GND VCC
0 0
$16L2
512
0.14
0 20 2 0 0 1 32 16 0 0 0 0
16 15
8 8
0 0
0 0
6 6
2 1 3 19 4 18 5 17 6 14 7 13 8 12 9 11
2 10 20
GND VCC
0 0
$16L6
640
0.14
0 24 6 0 0 1 32 20 0 0 0 0
21 20 19 18 17 16
4 4 2 2 4 4
0 0 0 0 0 0
0 0 0 0 0 0
6 6 6 6 6 6
2 1 3 23 4 22 5 6 7 8 9 15 10 14 11 13
2 12 24
GND VCC
0 0
$16L8
2048
0.14
0 20 8 0 0 1 32 64 0 0 0 0
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
32 30 30 30 30 30 30 32
2 1 3 18 4 17 5 16 6 15 7 14 8 13 9 11
2 10 20
GND VCC
0 0
$16P2
514
0.14
0 20 2 0 0 1 32 16 0 0 0 0
1
16 15
8 8
0 0
0 0
6 6
2 1 3 19 4 18 5 17 6 14 7 13 8 12 9 11
1 512 1
2
6 0 6
6 1 7
1 512 2
2 10 20
GND VCC
0 0
$16P6
646
0.14
0 24 6 0 0 1 32 20 0 0 0 0
1
21 20 19 18 17 16
4 4 2 2 4 4
0 0 0 0 0 0
0 0 0 0 0 0
6 6 6 6 6 6
2 1 3 23 4 22 5 6 7 8 9 15 10 14 11 13
1 640 1
2
6 0 6
6 1 7
1 640 6
2 12 24
GND VCC
0 0
$16P8
2056
0.14
0 20 8 0 0 1 32 64 0 0 0 0
1
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
32 30 30 30 30 30 30 32
2 1 3 18 4 17 5 16 6 15 7 14 8 13 9 11
1 2048 1
4
32 0 32
32 1 33
30 0 30
30 1 31
1 2048 8
2 10 20
GND VCC
0 0
$16R4
2048
0.14
0 20 8 0 0 1 32 64 0 0 0 0
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 1 3 3 3 3 1 1
0 8 11 11 11 11 48 56
30 30 4 4 4 4 30 30
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
4 1 10 11 20
CLK GND /OE VCC
0 0
$16R6
2048
0.14
0 20 8 0 0 1 32 64 0 0 0 0
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 3 3 3 3 3 3 1
0 11 11 11 11 11 11 56
30 4 4 4 4 4 4 30
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
4 1 10 11 20
CLK GND /OE VCC
0 0
$16R8
2048
0.14
0 20 8 0 0 1 32 64 0 0 0 0
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
3 3 3 3 3 3 3 3
11 11 11 11 11 11 11 11
4 4 4 4 4 4 4 4
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
4 1 10 11 20
CLK GND /OE VCC
0 0
$16RA8
2056
0.14
0 20 8 0 0 1 32 64 0 0 0 0
1
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
12 12 12 12 12 12 12 12
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
1 2048 1
2
12 0 12
12 1 13
1 2048 8
4 1 10 11 20
/PL GND /OE VCC
0 0
$16RP4
2056
0.14
0 20 8 0 0 1 32 64 0 0 0 0
1
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 1 3 3 3 3 1 1
0 8 11 11 11 11 48 56
30 30 4 4 4 4 30 30
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
1 2048 1
4
30 0 30
30 1 31
4 0 4
4 1 5
1 2048 8
4 1 10 11 20
CLK GND /OE VCC
0 0
$16RP6
2056
0.14
0 20 8 0 0 1 32 64 0 0 0 0
1
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
1 3 3 3 3 3 3 1
0 11 11 11 11 11 11 56
30 4 4 4 4 4 4 30
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
1 2048 1
4
30 0 30
30 1 31
4 0 4
4 1 5
1 2048 8
4 1 10 11 20
CLK GND /OE VCC
0 0
$16RP8
2056
0.14
0 20 8 0 0 1 32 64 0 0 0 0
1
19 18 17 16 15 14 13 12
8 8 8 8 8 8 8 8
3 3 3 3 3 3 3 3
11 11 11 11 11 11 11 11
4 4 4 4 4 4 4 4
2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12
1 2048 1
2
4 0 4
4 1 5
1 2048 8
4 1 10 11 20
CLK GND /OE VCC
0 0
$18H4
720
0.14
0 24 4 0 0 1 36 20 0 0 0 0
20 19 18 17
6 4 4 6
0 0 0 0
0 0 0 0
7 7 7 7
2 1 3 23 4 22 5 21 6 7 8 16 9 15 10 14 11 13
2 12 24
GND VCC
0 0
$18L4
720
0.14
0 24 4 0 0 1 36 20 0 0 0 0
20 19 18 17
6 4 4 6
0 0 0 0
0 0 0 0
6 6 6 6
2 1 3 23 4 22 5 21 6 7 8 16 9 15 10 14 11 13
2 12 24
GND VCC
0 0
$18P4
724
0.14
0 24 4 0 0 1 36 20 0 0 0 0
1
20 19 18 17
6 4 4 6
0 0 0 0
0 0 0 0
6 6 6 6
2 1 3 23 4 22 5 21 6 7 8 16 9 15 10 14 11 13
1 720 1
2
6 0 6
6 1 7
1 720 4
2 12 24
GND VCC
0 0
$20C1
640
0.14
0 24 2 0 0 1 40 16 0 0 0 0
19 18
16 0
0 0
0 0
7 6
2 1 3 23 4 22 5 21 6 20 7 17 8 16 9 15 10 14 11 13
2 12 24
GND VCC
0 0
$20H2
640
0.14
0 24 2 0 0 1 40 16 0 0 0 0
19 18
8 8
0 0
0 0
7 7
2 1 3 23 4 22 5 21 6 20 7 17 8 16 9 15 10 14 11 13
2 12 24
GND VCC
0 0
$20H8
2560
0.14
0 24 8 0 0 1 40 64 0 0 0 0
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
33 31 31 31 31 31 31 33
2 1 3 23 4 21 5 20 6 19 7 18 8 17 9 16 10 14 11 13
2 12 24
GND VCC
0 0
$20L10
1600
0.14
0 24 10 0 0 1 40 40 0 0 0 0
23 22 21 20 19 18 17 16 15 14
4 4 4 4 4 4 4 4 4 4
1 1 1 1 1 1 1 1 1 1
0 4 8 12 16 20 24 28 32 36
32 30 30 30 30 30 30 30 30 32
2 1 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 13
4 1 12 13 24
CLK GND /OE VCC
0 0
$20L2
640
0.14
0 24 2 0 0 1 40 16 0 0 0 0
19 18
8 8
0 0
0 0
6 6
2 1 3 23 4 22 5 21 6 20 7 17 8 16 9 15 10 14 11 13
2 12 24
GND VCC
0 0
$20L8
2560
0.14
0 24 8 0 0 1 40 64 0 0 0 0
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
32 30 30 30 30 30 30 32
2 1 3 23 4 21 5 20 6 19 7 18 8 17 9 16 10 14 11 13
2 12 24
GND VCC
0 0
$20P2
642
0.14
0 24 2 0 0 1 40 16 0 0 0 0
1
19 18
8 8
0 0
0 0
6 6
2 1 3 23 4 22 5 21 6 20 7 17 8 16 9 15 10 14 11 13
1 640 1
2
6 0 6
6 1 7
1 640 2
2 12 24
GND VCC
0 0
$20P8
2568
0.14
0 24 8 0 0 1 40 64 0 0 0 0
1
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56
32 30 30 30 30 30 30 32
2 1 3 23 4 21 5 20 6 19 7 18 8 17 9 16 10 14 11 13
1 2560 1
4
30 0 30
30 1 31
32 0 32
32 1 33
1 2560 8
2 12 24
GND VCC
0 0
$20R4
2560
0.14
0 24 8 0 0 1 40 64 0 0 0 0
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 1 3 3 3 3 1 1
0 8 13 13 13 13 48 56
30 30 4 4 4 4 30 30
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
4 1 12 13 24
CLK GND /OE VCC
0 0
$20R6
2560
0.14
0 24 8 0 0 1 40 64 0 0 0 0
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 3 3 3 3 3 3 1
0 13 13 13 13 13 13 56
30 4 4 4 4 4 4 30
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
4 1 12 13 24
CLK GND /OE VCC
0 0
$20R8
2560
0.14
0 24 8 0 0 1 40 64 0 0 0 0
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
3 3 3 3 3 3 3 3
13 13 13 13 13 13 13 13
4 4 4 4 4 4 4 4
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
4 1 12 13 24
CLK GND /OE VCC
0 0
$20RA10
3210
0.14
0 24 10 0 0 1 40 80 0 0 0 0
1
23 22 21 20 19 18 17 16 15 14
8 8 8 8 8 8 8 8 8 8
1 1 1 1 1 1 1 1 1 1
0 8 16 24 32 40 48 56 64 72
12 12 12 12 12 12 12 12 12 12
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
1 3200 1
2
12 0 12
12 1 13
1 3200 10
4 1 12 13 24
/PL GND /OE VCC
0 0
$20RP4
2568
0.14
0 24 8 0 0 1 40 64 0 0 0 0
1
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 1 3 3 3 3 1 1
0 8 13 13 13 13 48 56
30 30 4 4 4 4 30 30
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
1 2560 1
4
30 0 30
30 1 31
4 0 4
4 1 5
1 2560 8
4 1 12 13 24
CLK GND /OE VCC
0 0
$20RP6
2568
0.14
0 24 8 0 0 1 40 64 0 0 0 0
1
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
1 3 3 3 3 3 3 1
0 13 13 13 13 13 13 56
30 4 4 4 4 4 4 30
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
1 2560 1
4
30 0 30
30 1 31
4 0 4
4 1 5
1 2560 8
4 1 12 13 24
CLK GND /OE VCC
0 0
$20RP8
2568
0.14
0 24 8 0 0 1 40 64 0 0 0 0
1
22 21 20 19 18 17 16 15
8 8 8 8 8 8 8 8
3 3 3 3 3 3 3 3
13 13 13 13 13 13 13 13
4 4 4 4 4 4 4 4
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
1 2560 1
2
4 0 4
4 1 5
1 2560 8
4 1 12 13 24
CLK GND /OE VCC
0 0
$20X10
1600
0.14
0 24 10 0 0 1 40 40 0 0 0 0
23 22 21 20 19 18 17 16 15 14
4 4 4 4 4 4 4 4 4 4
3 3 3 3 3 3 3 3 3 3
13 13 13 13 13 13 13 13 13 13
16 16 16 16 16 16 16 16 16 16
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
4 1 12 13 24
CLK GND /OE VCC
0 0
$20X4
1600
0.14
0 24 10 0 0 1 40 40 0 0 0 0
23 22 21 20 19 18 17 16 15 14
4 4 4 4 4 4 4 4 4 4
1 1 1 3 3 3 3 1 1 1
0 4 8 13 13 13 13 28 32 36
30 30 30 16 16 16 16 30 30 30
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
4 1 12 13 24
CLK GND /OE VCC
0 0
$20X8
1600
0.14
0 24 10 0 0 1 40 40 0 0 0 0
23 22 21 20 19 18 17 16 15 14
4 4 4 4 4 4 4 4 4 4
1 3 3 3 3 3 3 3 3 1
0 13 13 13 13 13 13 13 13 36
30 16 16 16 16 16 16 16 16 30
2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14
4 1 12 13 24
CLK GND /OE VCC
0 0
$22V10
5828
0.14
0 24 10 0 0 1 44 132 0 1 0 0
23 22 21 20 19 18 17 16 15 14
9 11 13 15 17 17 15 13 11 9
1 1 1 1 1 1 1 1 1 1
1 10 21 34 49 66 83 98 111 122
0 0 0 0 0 0 0 0 0 0
1 23 2 22 3 21 4 20 5 19 6 18 7 17 8 16 9 15 10 14 11 13
2 5808 2 5809 2
4
0 00 50
0 01 51
0 10 30
0 11 31
1 5808 20
3 1 12 24
CLK GND VCC
0 0

/Modules/PIC/PICPGR301A/GAL/OPALJR/EQN2JED.EXE
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/PIC/PICPGR301A/GAL/OPALJR/JED2EQN.EXE
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/PIC/PICPGR301A/GAL/OPALJR/JEDEC.EXE
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/Modules/PIC/PICPGR301A/GAL/OPALJR/VZOR.EQN
0,0 → 1,33
; Pojmenovani a identifikace soucastky
;
CHIP GALxxx PAL16V8
; Obsazeni nozicek
; Pozitivni signaly XX=99
; Negativni signaly /XX=99
;
; =1 =2 =3 =4 =5 =6 =7 =8 =9 GND=10
; =11 =12 =13 =14 =15 =16 =17 =18 =19 VCC=20
; Substituce textu
;
@DEFINE XXX "xx * yy * zz"
; Uzivatelska identifikace naprogramovane soucastky
;
@UES COKOLI
; Rovnice s obsahem, priklad
;
EQUATIONS
XX = XX * YY * /ZZ
+ XX * /YY * ZZ
XX.OE = /XX * /YY * ZZ
/XX = GNC
/XX = VCC
XX := IN * XX * /YY
+ /IN * YY