0,0 → 1,70 |
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) |
Copyright (R) National Semiconductor Corporation 1990,1991 |
|
Document file for gal1.eqn |
Device: 16V8 |
|
$LABELS 20 nc D0 D1 D2 D3 D4 D5 D6 D7 GND nc CLOCK DATA RES VPPON VCCON DQ |
nc nc VCC |
|
|
Pin Label Type |
--- ----- ---- |
2 D0 com input |
3 D1 com input |
4 D2 com input |
5 D3 com input |
6 D4 com input |
7 D5 com input |
8 D6 com input |
9 D7 com input |
10 GND ground pin |
12 CLOCK pos,trst,com output |
13 DATA pos,trst,com feedback |
14 RES pos,trst,com output |
15 VPPON pos,trst,com output |
16 VCCON pos,trst,com output |
17 DQ pos,trst,com output |
20 VCC power pin |
|
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) |
Copyright (R) National Semiconductor Corporation 1990,1991 |
|
Device Utilization: |
|
No of dedicated inputs used : 8/10 (80.0%) |
No of dedicated outputs used : 2/2 (100.0%) |
No of feedbacks used as dedicated outputs : 3/6 (50.0%) |
No of feedbacks used : 1/6 (16.7%) |
|
------------------------------------------ |
Pin Label Terms Usage |
------------------------------------------ |
17 DQ 2/8 (25.0%) |
16 VCCON 2/8 (25.0%) |
15 VPPON 2/8 (25.0%) |
14 RES 2/8 (25.0%) |
13 DATA 3/8 (37.5%) |
12 CLOCK 3/8 (37.5%) |
------------------------------------------ |
Total 12/64 (18.8%) |
------------------------------------------ |
|
EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) |
Copyright (R) National Semiconductor Corporation 1990,1991 |
|
Chip diagram (DIP) |
|
._____ _____. |
| \__/ | |
| 1 20 | VCC |
D0 | 2 19 | |
D1 | 3 18 | |
D2 | 4 17 | DQ |
D3 | 5 16 | VCCON |
D4 | 6 15 | VPPON |
D5 | 7 14 | RES |
D6 | 8 13 | DATA |
D7 | 9 12 | CLOCK |
GND | 10 11 | |
|______________| |