7,30 → 7,90 |
(Type "Schematic Design")) |
(BuildFileAddedOrDeleted "x") |
(CompileFileAddedOrDeleted "x") |
(NoModify)) |
(Folder "Outputs") |
(NoModify) |
(DRC_Scope "0") |
(DRC_Action "0") |
(DRC_Create_Warnings "FALSE") |
(DRC_View_Output "FALSE") |
(DRC_Run_Electrical_Rules "TRUE") |
(DRC_Run_Physical_Rules "FALSE") |
(DRC_Report_File |
"C:\USERS\KAKLIK\DOCUMENTS\SVNMLAB\MODULES\POWERSW\NFET4X01B\SCH\NFET4X01B.DRC") |
(DRC_Check_Ports "FALSE") |
(DRC_Check_Off-Page_Connectors "FALSE") |
(DRC_Report_Ports_and_Off-page_Connectors "FALSE") |
(DRC_SDT_Compatibility "FALSE") |
(DRC_Report_Off-grid_Objects "FALSE") |
(DRC_Check_Unconnected_Nets "TRUE") |
(DRC_Check_for_Misleading_TAP "FALSE") |
(DRC_Report_Netnames "FALSE") |
(DRC_Check_Single_Node_Nets "TRUE") |
(DRC_Check_No_Driving_Source "TRUE") |
(DRC_Check_Duplicate_NetNames "TRUE") |
(DRC_Check_Floating_Pins "TRUE") |
(DRC_Check_Physical_Power_Pins_Visibility "TRUE") |
(DRC_Check_PCB_Footprint_Property "TRUE") |
(DRC_Check_Normal_Convert_View_Sync "TRUE") |
(DRC_Check_Incorrect_PinGroup_Assignment "TRUE") |
(DRC_Check_High_Speed_Props_Syntax "TRUE") |
(DRC_Check_Missing_Pin_Numbers "TRUE") |
(DRC_Check_Device_With_No_Pins "TRUE") |
(DRC_Check_Power_Ground_Short "TRUE") |
(DRC_Identical_References "TRUE") |
(DRC_Type_Mismatch "TRUE") |
(DRC_Visible_Power_pins "FALSE") |
(DRC_Report_Unused_Part_Packages "TRUE") |
(DRC_Check_Name_Prop_For_HierBlocks "TRUE") |
(Netlist_TAB "8") |
(OTHER_Part_Value "{Value}") |
(OTHER_Netlist_File "NFET4X01B.asc") |
(OTHER_Netlist_File2 "NFET4X01B.CMP") |
(OTHER_View_Output "FALSE") |
(OTHER_View_Output2 "FALSE") |
(OTHER_Formatter "oraccel.dll") |
(OTHER_PCB_Footprint "{Device},{Value}@{PCB Footprint}") |
(OTHER_Switch0 "FALSE") |
(OTHER_Switch1 "FALSE") |
(OTHER_Switch2 "FALSE") |
(OTHER_Switch3 "FALSE") |
(OTHER_Switch4 "FALSE") |
(OTHER_Switch5 "FALSE") |
(OTHER_Switch6 "FALSE")) |
(Folder "Outputs" |
(File ".\nfet4x01b.drc" |
(Type "Report")) |
(File ".\nfet4x01b.asc" |
(Type "Report"))) |
(Folder "Referenced Projects") |
(PartMRUSelector) |
(GlobalState |
(FileView |
(Path "Design Resources") |
(Path "Design Resources" ".\nfet4x01b.dsn") |
(Path "Design Resources" ".\nfet4x01b.dsn" "SCHEMATIC1") |
(Select "Design Resources")) |
(Path "Design Resources" |
"c:\users\kaklik\documents\svnmlab\modules\powersw\nfet4x01b\sch\nfet4x01b.dsn") |
(Path "Design Resources" |
"c:\users\kaklik\documents\svnmlab\modules\powersw\nfet4x01b\sch\nfet4x01b.dsn" |
"SCHEMATIC1") |
(Path "Outputs") |
(Select "Design Resources" |
"c:\users\kaklik\documents\svnmlab\modules\powersw\nfet4x01b\sch\nfet4x01b.dsn" |
"SCHEMATIC1" "PAGE")) |
(HierarchyView) |
(Doc |
(Type "COrCapturePMDoc") |
(Frame |
(Placement "44 0 1 -1 -1 -4 -30 0 200 0 280")) |
(Placement "44 2 3 -1 -1 -8 -30 0 200 0 280")) |
(Tab 0)) |
(Doc |
(Type "COrSchematicDoc") |
(Frame |
(Placement "44 2 3 -1 -1 -4 -30 44 861 58 372") |
(Scroll "278 0") |
(Placement "44 0 1 -1 -1 -8 -30 100 1226 100 584") |
(Scroll "0 0") |
(Zoom "100") |
(Occurrence "/")) |
(Path "D:\MLAB\MODULES\POWERSW\NFET4X01B\SCH\NFET4X01B.DSN") |
(Path |
"C:\USERS\KAKLIK\DOCUMENTS\SVNMLAB\MODULES\POWERSW\NFET4X01B\SCH\NFET4X01B.DSN") |
(Schematic "SCHEMATIC1") |
(Page "PAGE2"))) |
(MPSSessionName "Jakub Kákona")) |
(Page "PAGE"))) |
(MPSSessionName "kaklik") |
(ISPCBBASICLICENSE "false")) |