/Modules/PowerSW/LDD01A/SCH/LDD.DSN
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
/Modules/PowerSW/LDD01A/SCH/LDD.opj
7,25 → 7,81
(File ".\ldd.dsn"
(Type "Schematic Design"))
(BuildFileAddedOrDeleted "x")
(CompileFileAddedOrDeleted "x"))
(Folder "Outputs")
(CompileFileAddedOrDeleted "x")
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"C:\USERS\KAKLIK\DOCUMENTS\SVNMLAB\MODULES\POWERSW\LDD01A\SCH\LDD.DRC")
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(DRC_SDT_Compatibility "FALSE")
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(DRC_Check_Unconnected_Nets "TRUE")
(DRC_Check_for_Misleading_TAP "FALSE")
(DRC_Report_Netnames "FALSE")
(DRC_Check_Single_Node_Nets "TRUE")
(DRC_Check_No_Driving_Source "TRUE")
(DRC_Check_Duplicate_NetNames "TRUE")
(DRC_Check_Floating_Pins "TRUE")
(DRC_Check_Physical_Power_Pins_Visibility "TRUE")
(DRC_Check_PCB_Footprint_Property "TRUE")
(DRC_Check_Normal_Convert_View_Sync "TRUE")
(DRC_Check_Incorrect_PinGroup_Assignment "TRUE")
(DRC_Check_High_Speed_Props_Syntax "TRUE")
(DRC_Check_Missing_Pin_Numbers "TRUE")
(DRC_Check_Device_With_No_Pins "TRUE")
(DRC_Check_Power_Ground_Short "TRUE")
(DRC_Identical_References "TRUE")
(DRC_Type_Mismatch "TRUE")
(DRC_Visible_Power_pins "FALSE")
(DRC_Report_Unused_Part_Packages "TRUE")
(DRC_Check_Name_Prop_For_HierBlocks "TRUE")
(Netlist_TAB "8")
(OTHER_Part_Value "{Value}")
(OTHER_Netlist_File "LDD.asc")
(OTHER_Netlist_File2 "LDD.CMP")
(OTHER_View_Output "FALSE")
(OTHER_View_Output2 "FALSE")
(OTHER_Formatter "orPadspcb.dll")
(OTHER_PCB_Footprint "{Device},{Value}@{PCB Footprint}")
(OTHER_Switch0 "FALSE")
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(OTHER_Switch3 "FALSE")
(OTHER_Switch4 "FALSE")
(OTHER_Switch5 "FALSE")
(OTHER_Switch6 "FALSE"))
(Folder "Outputs"
(File ".\ldd.drc"
(Type "Report"))
(File ".\ldd.asc"
(Type "Report")))
(Folder "Referenced Projects")
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(LibraryName "C:\LIBRARY\ORCAD16X\COM_RLC.OLB")
57,7 → 113,8
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(Path "Design Resources" ".\ldd.dsn" "SCHEMATIC1")
(Path "Outputs"))
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68,11 → 125,12
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(Path
"C:\USERS\KAKLIK\DOCUMENTS\SVNMLAB\MODULES\POWERSW\LDD01A\SCH\LDD.DSN")
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