1,7 → 1,7 |
EESchema Schematic File Version 2 |
LIBS:power |
LIBS:PCRD01A-cache |
EELAYER 24 0 |
EELAYER 25 0 |
EELAYER END |
$Descr A4 11693 8268 |
encoding utf-8 |
65,7 → 65,7 |
P 5850 4200 |
F 0 "U2" H 6000 4500 70 0000 C CNN |
F 1 "AD8692" H 6000 4400 70 0000 C CNN |
F 2 "MLAB_IO:SOIC-8_3.9x4.9mm_Pitch1.27mm" H 5850 4200 60 0001 C CNN |
F 2 "SMD_Packages:SOIC-8-N" H 5850 4200 60 0001 C CNN |
F 3 "" H 5850 4200 60 0000 C CNN |
1 5850 4200 |
1 0 0 -1 |
227,13 → 227,13 |
$Comp |
L V- #PWR01 |
U 1 1 547641F4 |
P 3350 3550 |
F 0 "#PWR01" H 3350 3650 30 0001 C CNN |
F 1 "V-" H 3350 3660 30 0000 C CNN |
F 2 "" H 3350 3550 60 0000 C CNN |
F 3 "" H 3350 3550 60 0000 C CNN |
1 3350 3550 |
1 0 0 -1 |
P 3350 4750 |
F 0 "#PWR01" H 3350 4850 30 0001 C CNN |
F 1 "V-" H 3350 4860 30 0000 C CNN |
F 2 "" H 3350 4750 60 0000 C CNN |
F 3 "" H 3350 4750 60 0000 C CNN |
1 3350 4750 |
-1 0 0 1 |
$EndComp |
$Comp |
L R R3 |
282,13 → 282,13 |
$Comp |
L V+ #PWR04 |
U 1 1 54764B7E |
P 3350 4750 |
F 0 "#PWR04" H 3350 4850 30 0001 C CNN |
F 1 "V+" H 3350 4860 30 0000 C CNN |
F 2 "" H 3350 4750 60 0000 C CNN |
F 3 "" H 3350 4750 60 0000 C CNN |
1 3350 4750 |
-1 0 0 1 |
P 3350 3550 |
F 0 "#PWR04" H 3350 3650 30 0001 C CNN |
F 1 "V+" H 3350 3660 30 0000 C CNN |
F 2 "" H 3350 3550 60 0000 C CNN |
F 3 "" H 3350 3550 60 0000 C CNN |
1 3350 3550 |
1 0 0 -1 |
$EndComp |
$Comp |
L V+ #PWR05 |
326,9 → 326,20 |
$Comp |
L V- #PWR08 |
U 1 1 54765630 |
P 5750 4650 |
F 0 "#PWR08" H 5750 4750 30 0001 C CNN |
F 1 "V-" H 5750 4760 30 0000 C CNN |
F 2 "" H 5750 4650 60 0000 C CNN |
F 3 "" H 5750 4650 60 0000 C CNN |
1 5750 4650 |
-1 0 0 1 |
$EndComp |
$Comp |
L V+ #PWR09 |
U 1 1 54765667 |
P 5750 3750 |
F 0 "#PWR08" H 5750 3850 30 0001 C CNN |
F 1 "V-" H 5750 3860 30 0000 C CNN |
F 0 "#PWR09" H 5750 3850 30 0001 C CNN |
F 1 "V+" H 5750 3860 30 0000 C CNN |
F 2 "" H 5750 3750 60 0000 C CNN |
F 3 "" H 5750 3750 60 0000 C CNN |
1 5750 3750 |
335,17 → 346,6 |
1 0 0 -1 |
$EndComp |
$Comp |
L V+ #PWR09 |
U 1 1 54765667 |
P 5750 4650 |
F 0 "#PWR09" H 5750 4750 30 0001 C CNN |
F 1 "V+" H 5750 4760 30 0000 C CNN |
F 2 "" H 5750 4650 60 0000 C CNN |
F 3 "" H 5750 4650 60 0000 C CNN |
1 5750 4650 |
-1 0 0 1 |
$EndComp |
$Comp |
L GND #PWR010 |
U 1 1 54765C64 |
P 7800 4750 |
439,7 → 439,7 |
P 9100 4100 |
F 0 "U2" H 9250 4400 70 0000 C CNN |
F 1 "AD8692" H 9250 4300 70 0000 C CNN |
F 2 "MLAB_IO:SOIC-8_3.9x4.9mm_Pitch1.27mm" H 9100 4100 60 0001 C CNN |
F 2 "SMD_Packages:SOIC-8-N" H 9100 4100 60 0001 C CNN |
F 3 "" H 9100 4100 60 0000 C CNN |
2 9100 4100 |
1 0 0 -1 |