Problem with comparison.
/Modules/TDC/GP201A/SW/PICinterface/main.hex |
---|
0,0 → 1,202 |
:10000000FBEF00F03450200807E0356E3036313613 |
:1000100032363336352EFAD79382939093948A945E |
:1000200034C035F08A8433AE8A9033BE8A8030364D |
:100030003136323633368A9400360136023603368C |
:1000400081A2009081B20080352EECD7000C9396EF |
:100050008A96336A326A316A500E306E080E346EF8 |
:10006000D1DF93968A86000CEA6A310EE96EEF5072 |
:100070000DE0060E016E006A002EFED7012EFBD7A2 |
:100080007B0E006E002EFED7EF2EF3D7000C939E52 |
:100090008A9E080E016E00D00000018E0ED0019ED7 |
:1000A0004732D8B08A8ED8A08A9E018C06D0019C97 |
:1000B000012EF6D700D000008A8EA70EE96EE92E39 |
:1000C000FED700D001BEEBD701BCF1D7000C31BE8A |
:1000D0000FD00F0E006E303800160A0E005C03E2DF |
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:10015000406E0A0E43064426FDE342064326FDE3B5 |
:1001600041064226FDE340064126FDE3EA6A400ED1 |
:10017000E96E070E4514459CE926440EE95CD8B4A7 |
:10018000458CEF50006E08E145BC06D045B813D051 |
:1001900045B602D0200E03D045864598300E002685 |
:1001A000EACF3FF0E9CF3EF000C047F070DF3FC03C |
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:10032000246A236A226A216A810E246E236A226A61 |
:10033000216A440E2212210E231224C033F023C05E |
:1003400032F022C031F021C030F0200E346E5ADE7F |
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:1003700033F023C032F022C031F021C030F0200E23 |
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:10040000226A216A24C033F023C032F022C031F0C6 |
:1004100021C030F0200E346EF5DD93968A869396D7 |
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:1004A000336A326A316A2BC030F0080E346EAADD2E |
:1004B000336A326A316A306A200E346EA3DD01502D |
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:1004F000EEDD25C030F0370E316EE9DD200E476E9F |
:10050000C6DD93968A962B6AB20E2B6E336A326AD8 |
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:1005800030F0080E346E3EDD336A326A316A306A0A |
:10059000200E346E37DD015003C028F002C027F072 |
:1005A00001C026F000C025F093968A8628C030F05E |
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:1005D000316E7DDD200E476E5ADD93968A962B6A2A |
:1005E000B40E2B6E336A326A316A2BC030F0080EBB |
:1005F000346E08DD336A326A316A306A100E346E46 |
:1006000001DD015001C02AF000C029F093968A86CE |
:100610002A38026E036A0F0E02160250010B306E6A |
:10062000316A036A2A30026E023202321F0E02164B |
:100630000250010B326E336A036A2A30026E0232B4 |
:100640003F0E02160250010B346E356AD890036AD1 |
:100650002A30026E010B366E376A2A30036E29305B |
:10066000026E0332023203320232033202320332AA |
:10067000023203320232030E03160250070B386EA9 |
:10068000396A2A30036E2930026E03320232033295 |
:1006900002321F0E03160250070B3A6E3B6A2950B6 |
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:1006C000100EE96E33C03FF032C03EF01FDD200E49 |
:1006D000476EDDDC100EE96E35C03FF034C03EF0F1 |
:1006E00015DD200E476ED3DC100EE96E37C03FF0EB |
:1006F00036C03EF00BDD200E476EC9DC100EE96EF1 |
:1007000039C03FF038C03EF001DD200E476EBFDC3F |
:10071000100EE96E3BC03FF03AC03EF0F7DC200E11 |
:10072000476EB5DC100EE96E3DC03FF03CC03EF0B8 |
:10073000EDDC5D0E476EABDC200E476EA8DC9396B9 |
:100740008A962B6AB50E2B6E336A326A316A2BC0D9 |
:1007500030F0080E346E56DC336A326A316A306A21 |
:10076000080E346E4FDC015000C02BF093968A8641 |
:100770002BC030F0370E316EAADC0D0E476E87DCD1 |
:100780000A0E476E84DC1BD5320E316E6DDC25D52A |
:10079000C80E316E69DC959C8C8C95988C889598E8 |
:1007A0008C9800D000D00000959A8C8A959A8C9AEB |
:1007B00000D000D00000959A8C8A959A8C9A00D02F |
:1007C00000D00000959A8C8A959A8C9A00D000D01F |
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:10080000302EFBD793968A962B6AB00E2B6E336AE6 |
:10081000326A316A2BC030F0080E346E02EC00F000 |
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:10083000015003C028F002C027F001C026F000C01C |
:1008400025F093968A862A0E476E21DC200E476E8D |
:100850001EDC28C030F0370E316E39DC27C030F096 |
:10086000370E316E34DC26C030F0370E316E2FDC9F |
:1008700025C030F0370E316E2ADC200E476E07DCC3 |
:1008800093968A962B6AB10E2B6E336A326A316A5E |
:100890002BC030F0080E346E02EC00F0336A326A7E |
:1008A000316A306A200E346E02EC00F0015003C051 |
:1008B00028F002C027F001C026F000C025F0939672 |
:1008C0008A8628C030F0370E316E01DC27C030F048 |
:1008D000370E316E67EC00F026C030F0370E316E07 |
:1008E00067EC00F025C030F0370E316E67EC00F099 |
:1008F000200E476E47EC00F093968A962B6AB20E54 |
:100900002B6E336A326A316A2BC030F0080E346EB7 |
:1009100002EC00F0336A326A316A306A200E346EBB |
:1009200002EC00F0015003C028F002C027F001C023 |
:1009300026F000C025F093968A8628C030F0370E46 |
:10094000316E67EC00F027C030F0370E316E67EC87 |
:1009500000F026C030F0370E316E67EC00F025C095 |
:1009600030F0370E316E67EC00F0200E476E47EC2A |
:1009700000F093968A962B6AB30E2B6E336A326A16 |
:10098000316A2BC030F0080E346E02EC00F0336A8E |
:10099000326A316A306A200E346E02EC00F0015087 |
:1009A00003C028F002C027F001C026F000C025F0E7 |
:1009B00093968A8628C030F0370E316E67EC00F0CF |
:1009C00027C030F0370E316E67EC00F026C030F0F3 |
:1009D000370E316E67EC00F025C030F0370E316E07 |
:1009E00067EC00F0200E476E47EC00F093968A9675 |
:1009F0002B6AB40E2B6E336A326A316A2BC030F028 |
:100A0000080E346E02EC00F0336A326A316A306AE2 |
:100A1000100E346E02EC00F0015001C02AF000C04C |
:100A200029F093968A862A38026E036A0F0E021600 |
:100A30000250010B306E316A036A2A30026E0232B4 |
:100A400002321F0E02160250010B326E336A036A25 |
:100A50002A30026E02323F0E02160250010B346E33 |
:100A6000356AD890036A2A30026E010B366E376AF7 |
:100A70002A30036E2930026E033202320332023210 |
:100A8000033202320332023203320232030E031601 |
:100A90000250070B386E396A2A30036E2930026E15 |
:100AA00003320232033202321F0E03160250070BCA |
:100AB0003A6E3B6A2950070B3C6E3D6A5B0E476EEF |
:100AC00047EC00F0100EE96E31C03FF030C03EF050 |
:100AD00086EC00F0200E476E47EC00F0100EE96E39 |
:100AE00033C03FF032C03EF086EC00F0200E476E7F |
:100AF00047EC00F0100EE96E35C03FF034C03EF018 |
:100B000086EC00F0200E476E47EC00F0100EE96E08 |
:100B100037C03FF036C03EF086EC00F0200E476E46 |
:100B200047EC00F0100EE96E39C03FF038C03EF0DF |
:100B300086EC00F0200E476E47EC00F0100EE96ED8 |
:100B40003BC03FF03AC03EF086EC00F0200E476E0E |
:100B500047EC00F0100EE96E3DC03FF03CC03EF0A7 |
:100B600086EC00F05D0E476E47EC00F0200E476EFD |
:100B700047EC00F093968A962B6AB50E2B6E336A7B |
:100B8000326A316A2BC030F0080E346E02EC00F08D |
:100B9000336A326A316A306A080E346E02EC00F051 |
:100BA000015000C02BF093968A862BC030F0370E90 |
:100BB000316E67EC00F00D0E476E47EC00F00A0E48 |
:100BC000476E47EC00F093968A96246A236A226A5D |
:100BD000216A810E246E236A226A216A316A326A8E |
:100BE0002C34336E2D34346E33363436333634365B |
:100BF00033363436F00E33163380328C3284315033 |
:100C0000211232502212335023123450241224C0A5 |
:100C100033F023C032F022C031F021C030F0200E7A |
:100C2000346E02EC00F093968A86010E2C26D8B022 |
:100C30002D2AD8B42E2AD8B42F2AD0D56EEF01F0A1 |
:020C40000300AF |
:020000040030CA |
:0E00000027CC390E0087A1000FC00FE00F4083 |
:00000001FF |
;PIC18F4550 |
;CRC=4981 CREATED="04-IV-11 18:29" |
/Modules/TDC/GP201A/SW/PICinterface/main.pjt |
---|
0,0 → 1,32 |
[PROJECT] |
Target=.\main.hex |
Development_Mode= |
Processor_Text=PIC18F4550 |
ToolSuite=CCS |
Processor=0x4550 |
[.\main] |
Type=4 |
Path= |
FileList= |
BuildTool= |
OptionString= |
AdditionalOptionString= |
[mru-list] |
1=.\main.c |
[Windows] |
0=0000 %S 0 0 796 451 3 0 |
[Opened Files] |
1=main.c |
2=GP2.c |
3= |
4=GP2.h |
5=GP2.c |
6=ds1820.c |
7=1wire.c |
8= |
[Target Data] |
OptionString=-p +FH |
FileList=D:\MLAB\Modules\TDC\GP201A\SW\PICinterface\main.c |
[Units] |
Count=1 |
1=main (main) |
/Modules/TDC/GP201A/SW/PICinterface/main.c |
---|
0,0 → 1,247 |
#include "main.h" |
#define VERSION 0.2 |
#define START PIN_D4 |
#define STOP1 PIN_D5 |
#define STOP2 PIN_D6 |
#include "GP2.h" |
#define ONE_WIRE_PIN PIN_E2 |
#include "ds1820.c" |
void main() |
{ |
setup_adc_ports(NO_ANALOGS|VSS_VDD); |
setup_adc(ADC_CLOCK_DIV_2); |
setup_psp(PSP_DISABLED); |
setup_spi(SPI_SS_DISABLED); |
setup_wdt(WDT_OFF); |
setup_timer_0(RTCC_INTERNAL); |
setup_timer_1(T1_DISABLED); |
setup_timer_2(T2_DISABLED,0,1); |
setup_ccp1(CCP_OFF); |
setup_comparator(NC_NC_NC_NC); |
setup_vref(FALSE); |
TDC_reset(); |
output_low(START); |
output_low(STOP1); |
output_low(STOP2); |
delay_ms(50); |
/* |
1 0 0 0 0 ADR2 ADR1 ADR0 Write into address ADR |
1 0 1 1 0 ADR2 ADR1 ADR0 Read from address ADR |
0 1 1 1 0 0 0 0 Init |
0 1 0 1 0 0 0 0 Power On Reset |
0 0 0 0 0 0 0 1 Start_Cycle |
0 0 0 0 0 0 1 0 Start_Temp |
0 0 0 0 0 0 1 1 Start_Cal_Resonator |
0 0 0 0 0 1 0 0 Start_Cal_TDC |
*/ |
int32 ble,ret32; |
int16 ret16; |
int8 ret8; |
while(TRUE) |
{ |
TDC_reset(); |
delay_ms(100); |
//----------------------------------------------- Nastaveni registru |
output_low(TDC_ENABLE); |
ble=0; |
ble=(8<<28)|(0<<24); |
ble|=(0<<20)|(0<<16)|(0<<14)|(3<<12)|(1<<10)|(0<<9)|(0<<8)|(0<<7)|(1<<6)|(1<<5)|(0<<4)|(1<<3)|(0<<2)|(0<<1)|0; |
spi_xfer(TDC_stream,ble,32); |
output_high(TDC_ENABLE); |
output_low(TDC_ENABLE); |
ble=0; |
ble=(8<<28)|(1<<24); |
ble|=(2<<20)|(1<<16)|(0<<15)|(1<<14)|(0<<11)|(4<<8)|0; |
spi_xfer(TDC_stream,ble,32); |
output_high(TDC_ENABLE); |
output_low(TDC_ENABLE); |
ble=0; |
ble=(8<<28)|(2<<24); |
ble|=(1<<21)|(1<<20)|(1<<19)|0; |
spi_xfer(TDC_stream,ble,32); |
output_high(TDC_ENABLE); |
output_low(TDC_ENABLE); |
ble=0; |
ble=(8<<28)|(3<<24); |
ble|=(0<<22)|(1<<21)|(1<<20)|(1<<19)|0; |
spi_xfer(TDC_stream,ble,32); |
output_high(TDC_ENABLE); |
output_low(TDC_ENABLE); |
ble=0; |
ble=(8<<28)|(4<<24); |
ble|=(4<<19)|0; |
spi_xfer(TDC_stream,ble,32); |
output_high(TDC_ENABLE); |
output_low(TDC_ENABLE); |
ble=0; |
ble=(8<<28)|(5<<24); |
ble|=(0<<21)|(0<<20)|(0<<19)|(0<<16)|0; |
spi_xfer(TDC_stream,ble,32); |
output_high(TDC_ENABLE); |
//----------------------------------------------- Vypis registru |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|0; |
spi_xfer(TDC_stream,ret8,8); |
ret32=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
printf("- %LX ", ret32); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|1; |
spi_xfer(TDC_stream,ret8,8); |
ret32=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
printf("%LX ", ret32); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|2; |
spi_xfer(TDC_stream,ret8,8); |
ret32=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
printf("%LX ", ret32); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|3; |
spi_xfer(TDC_stream,ret8,8); |
ret32=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
printf("%LX ", ret32); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|4; |
spi_xfer(TDC_stream,ret8,8); |
ret16=spi_xfer(TDC_stream,0,16); |
output_high(TDC_ENABLE); |
printf("[%Lu %Lu %Lu %Lu %Lu %Lu %Lu] ", (1&(ret16)>>12), (1&(ret16)>>11), (1&(ret16)>>10), 1&(ret16)>>9, 7&(ret16)>>6, 7&(ret16)>>3, 7&ret16); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|5; |
spi_xfer(TDC_stream,ret8,8); |
ret8=spi_xfer(TDC_stream,0,8); |
output_high(TDC_ENABLE); |
printf("%X\r\n", ret8); |
//----------------------------------------------- Mereni |
TDC_init(); |
delay_ms(50); |
TDC_start_cycle(); |
delay_ms(200); |
output_high(STOP2); // Merime jenom jednim kanalem (druhy zrejme musi byt v H) |
output_high(START); |
output_low(START); |
delay_us(1); |
output_high(STOP1); |
output_low(STOP1); |
delay_us(1); |
output_high(STOP1); |
output_low(STOP1); |
delay_us(1); |
output_high(STOP1); |
output_low(STOP1); |
delay_us(1); |
//----------------------------------------------- Pocitani |
int32 nn; |
for(nn=3;nn<=5;nn++) |
{ |
delay_ms(500); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|0; |
spi_xfer(TDC_stream,ret8,8); |
ret32=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
printf("* %LX ", ret32); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|1; |
spi_xfer(TDC_stream,ret8,8); |
ret32=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
printf("%LX ", ret32); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|2; |
spi_xfer(TDC_stream,ret8,8); |
ret32=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
printf("%LX ", ret32); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|3; |
spi_xfer(TDC_stream,ret8,8); |
ret32=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
printf("%LX ", ret32); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|4; |
spi_xfer(TDC_stream,ret8,8); |
ret16=spi_xfer(TDC_stream,0,16); |
output_high(TDC_ENABLE); |
printf("[%Lu %Lu %Lu %Lu %Lu %Lu %Lu] ", (1&(ret16)>>12), (1&(ret16)>>11), (1&(ret16)>>10), 1&(ret16)>>9, 7&(ret16)>>6, 7&(ret16)>>3, 7&ret16); |
output_low(TDC_ENABLE); |
ret8=0; |
ret8=(0b1011<<4)|5; |
spi_xfer(TDC_stream,ret8,8); |
ret8=spi_xfer(TDC_stream,0,8); |
output_high(TDC_ENABLE); |
printf("%X\r\n", ret8); |
// Next calculation |
output_low(TDC_ENABLE); |
ble=0; |
ble=(8<<28)|(1<<24); |
ble|=(nn<<20)|(1<<16)|(0<<15)|(1<<14)|(0<<11)|(4<<8)|0x00; |
spi_xfer(TDC_stream,ble,32); |
output_high(TDC_ENABLE); |
} |
} |
} |
/Modules/TDC/GP201A/SW/PICinterface/main.h |
---|
0,0 → 1,41 |
#include <18F4550.h> |
#device adc=8 |
#FUSES NOWDT //No Watch Dog Timer |
#FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale |
#FUSES HS //High speed Osc (> 4mhz for PCM/PCH) (>10mhz for PCD) |
#FUSES NOPROTECT //Code not protected from reading |
#FUSES NOBROWNOUT //No brownout reset |
#FUSES BORV20 //Brownout reset at 2.0V |
#FUSES NOPUT //No Power Up Timer |
#FUSES NOCPD //No EE protection |
#FUSES STVREN //Stack full/underflow will cause reset |
#FUSES NODEBUG //No Debug mode for ICD |
#FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O |
#FUSES NOWRT //Program memory not write protected |
#FUSES NOWRTD //Data EEPROM not write protected |
#FUSES IESO //Internal External Switch Over mode enabled |
#FUSES FCMEN //Fail-safe clock monitor enabled |
#FUSES PBADEN //PORTB pins are configured as analog input channels on RESET |
#FUSES NOWRTC //configuration not registers write protected |
#FUSES NOWRTB //Boot block not write protected |
#FUSES NOEBTR //Memory not protected from table reads |
#FUSES NOEBTRB //Boot block not protected from table reads |
#FUSES NOCPB //No Boot Block code protection |
#FUSES MCLR //Master Clear pin enabled |
#FUSES LPT1OSC //Timer1 configured for low-power operation |
#FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode) |
#FUSES PLL12 //Divide By 12(48MHz oscillator input) |
#FUSES CPUDIV1 //System Clock by 1 |
#FUSES USBDIV //USB clock source comes from PLL divide by 2 |
#FUSES VREGEN //USB voltage regulator enabled |
#FUSES ICPRT //ICPRT enabled |
#use delay(clock=20000000) |
#use rs232(baud=9600,parity=N,xmit=PIN_B7,rcv=PIN_B6,bits=8) |
#define TDC_ENABLE PIN_B3 //enable pin for SPI communication with TDC |
#use spi(DI=PIN_B1, DO=PIN_B0, CLK=PIN_B2, stream=TDC_stream, bits=32,baud=9600) // uses software SPI |
/Modules/TDC/GP201A/SW/PICinterface/GP2.h |
---|
0,0 → 1,152 |
//register 0 |
#define TDC_NEG_START_INV 1 |
#define TDC_NEG_START 0 |
#define TDC_NEG_STOP1_INV 1 |
#define TDC_NEG_STOP1 0 |
#define TDC_NEG_STOP2_INV 1 |
#define TDC_NEG_STOP2 0 |
#define TDC_MRANGE1 0 |
#define TDC_MRANGE2 1 |
#define TDC_AUTOCAL_EN 0 |
#define TDC_AUTOCAL_DIS 1 |
#define TDC_CALIBRATE_EN 1 |
#define TDC_CALIBRATE_DIS 0 |
#define TDC_TSELCLK_32KHZ 0 |
#define TDC_TSELCLK_128HS 1 |
#define TDC_TFAKENUM_2 0 |
#define TDC_TFAKENUM_8 1 |
#define TDC_TCYCLE_SHORT 0 |
#define TDC_TCYSLE_LONG 1 |
#define TDC_TPORTNUM_2 0 |
#define TDC_TPORTNUM_4 1 |
#define TDC_CLKHS_OFF 0 |
#define TDC_CLKHS_ON 1 |
#define TDC_CLKHS_640US 2 |
#define TDC_CLKHS_1280US 4 |
#define TDC_CLKHSDIV_1 0 |
#define TDC_CLKHSDIV_2 1 |
#define TDC_CLKHSDIV_4 2 |
#define TDC_CLKHSDIV_8 3 |
#define TDC_CALPERIODS_2 0 |
#define TDC_CALPERIODS_4 1 |
#define TDC_CALPERIODS_8 2 |
#define TDC_CALPERIODS_16 3 |
#define TDC_DIV_FIRE_2 1 |
#define TDC_DIV_FIRE_3 2 |
#define TDC_DIV_FIRE_4 3 |
#define TDC_DIV_FIRE_5 4 |
#define TDC_DIV_FIRE_6 5 |
#define TDC_DIV_FIRE_7 6 |
#define TDC_DIV_FIRE_8 7 |
#define TDC_DIV_FIRE_9 8 |
#define TDC_DIV_FIRE_10 9 |
#define TDC_DIV_FIRE_11 10 |
#define TDC_DIV_FIRE_12 11 |
#define TDC_DIV_FIRE_13 12 |
#define TDC_DIV_FIRE_14 13 |
#define TDC_DIV_FIRE_15 14 |
#define TDC_DIV_FIRE_16 15 |
#define TDC_FIRENUM_0 0 |
#define TDC_FIRENUM_1 1 |
#define TDC_FIRENUM_2 2 |
#define TDC_FIRENUM_3 3 |
#define TDC_FIRENUM_4 4 |
#define TDC_FIRENUM_5 5 |
#define TDC_FIRENUM_6 6 |
#define TDC_FIRENUM_7 7 |
#define TDC_FIRENUM_8 8 |
#define TDC_FIRENUM_9 9 |
#define TDC_FIRENUM_10 10 |
#define TDC_FIRENUM_11 11 |
#define TDC_FIRENUM_12 12 |
#define TDC_FIRENUM_13 13 |
#define TDC_FIRENUM_14 14 |
#define TDC_FIRENUM_15 15 |
//register 1 |
#define TDC_HITIN1_0 0 |
#define TDC_HITIN1_1 1 |
#define TDC_HITIN1_2 2 |
#define TDC_HITIN1_3 3 |
#define TDC_HITIN1_4 4 |
#define TDC_HITIN2_0 0 |
#define TDC_HITIN2_1 1 |
#define TDC_HITIN2_2 2 |
#define TDC_HITIN2_3 3 |
#define TDC_HITIN2_4 4 |
#define TDC_FAST_INIT_EN 1 |
#define TDC_FAST_INIT_DIS 0 |
#define TDC_MRANGE1_HIT1_START 0 |
#define TDC_MRANGE1_HIT1_1CH1 1 |
#define TDC_MRANGE1_HIT1_2CH1 2 |
#define TDC_MRANGE1_HIT1_3CH1 3 |
#define TDC_MRANGE1_HIT1_4CH1 4 |
#define TDC_MRANGE1_HIT1_NOAC 5 |
#define TDC_MRANGE1_HIT1_CAL1CH1 6 |
#define TDC_MRANGE1_HIT1_CAL2CH1 7 |
#define TDC_MRANGE1_HIT1_1CH2 9 |
#define TDC_MRANGE1_HIT1_2CH2 0xA |
#define TDC_MRANGE1_HIT1_3CH2 0xB |
#define TDC_MRANGE1_HIT1_4CH2 0xC |
#define TDC_MRANGE2_HIT1_START 1 |
#define TDC_MRANGE1_HIT2_START 0 |
#define TDC_MRANGE1_HIT2_1CH1 1 |
#define TDC_MRANGE1_HIT2_2CH1 2 |
#define TDC_MRANGE1_HIT2_3CH1 3 |
#define TDC_MRANGE1_HIT2_4CH1 4 |
#define TDC_MRANGE1_HIT2_NOAC 5 |
#define TDC_MRANGE1_HIT2_CAL1CH1 6 |
#define TDC_MRANGE1_HIT2_CAL2CH1 7 |
#define TDC_MRANGE1_HIT2_1CH2 9 |
#define TDC_MRANGE1_HIT2_2CH2 0xA |
#define TDC_MRANGE1_HIT2_3CH2 0xB |
#define TDC_MRANGE1_HIT2_4CH2 0xC |
#define TDC_MRANGE2_HIT2_1CH1 2 |
#define TDC_MRANGE2_HIT2_2CH1 3 |
#define TDC_MRANGE2_HIT2_3CH1 4 |
//register 2 |
#define TDC_INT_TIMEOUT 4 |
#define TDC_INT_ENDHIT 2 |
#define TDC_INT_ALU 1 |
#define TDC_CH1EDGE_RIS 0 |
#define TDC_CH1EDGE_FAL 1 |
#define TDC_CH2EDGE_RIS 0 |
#define TDC_CH2EDGE_FAL 1 |
//register 3 |
#define TDC_TIM0MR2_256CLKHS 0 |
#define TDC_TIM0MR2_1024CLKHS 1 |
#define TDC_TIM0MR2_4096CLKHS 2 |
#define TDC_TIM0MR2_16384CLKHS 3 |
#define TDC_ERRVAL_EN 1 |
#define TDC_ERRVAL_DIS 0 |
//register 5 |
#define TDC_REPEAT_FIRE_0 0 |
#define TDC_REPEAT_FIRE_1 1 |
#define TDC_REPEAT_FIRE_2 2 |
#define TDC_REPEAT_FIRE_3 3 |
#define TDC_REPEAT_FIRE_4 4 |
#define TDC_REPEAT_FIRE_5 5 |
#define TDC_REPEAT_FIRE_6 6 |
#define TDC_REPEAT_FIRE_7 7 |
#define TDC_PHASENOISE_EN 0 |
#define TDC_PHASENOISE_DIS 1 |
#define TDC_STARTNOISE_EN 1 |
#define TDC_STARTNOISE_DIS 0 |
#include "GP2.c" |
/Modules/TDC/GP201A/SW/PICinterface/GP2.c |
---|
0,0 → 1,198 |
//struct { |
unsigned int8 firenum=TDC_FIRENUM_0; |
unsigned int8 div_fire=TDC_DIV_FIRE_2; |
unsigned int8 calresnum=TDC_CALPERIODS_2; |
unsigned int8 clkhsdiv=TDC_CLKHSDIV_1; |
unsigned int8 start_clkhs=TDC_CLKHS_ON; |
unsigned int1 portnum=TDC_TPORTNUM_4; |
unsigned int1 Tcycle=TDC_TCYCLE_SHORT; |
unsigned int1 fakenum=TDC_TFAKENUM_2; |
unsigned int1 selclkT=TDC_TSELCLK_128HS; |
unsigned int1 calibrate=TDC_CALIBRATE_EN; |
unsigned int1 disautocal=TDC_AUTOCAL_EN; |
unsigned int1 MRange=TDC_MRANGE2; |
unsigned int1 neg_stop2=TDC_NEG_STOP2; |
unsigned int1 neg_stop1=TDC_NEG_STOP1; |
unsigned int1 neg_start=TDC_NEG_START; |
//}reg0; |
//struct { |
unsigned int hit2=TDC_MRANGE1_HIT2_NOAC; |
unsigned int hit1=TDC_MRANGE1_HIT1_NOAC; |
unsigned int1 fast_init=TDC_FAST_INIT_DIS; |
unsigned int hitin2=TDC_HITIN2_0; |
unsigned int hitin1=TDC_HITIN1_0; |
//}reg1; |
//struct { |
unsigned int en_int=TDC_INT_ALU; |
unsigned int1 rfedge2=TDC_CH2EDGE_RIS; |
unsigned int1 rfedge1=TDC_CH1EDGE_RIS; |
unsigned int32 delval1=0; |
//}reg2; |
//struct { |
unsigned int1 en_err_val=TDC_ERRVAL_DIS; |
unsigned int tim0_mr2=TDC_TIM0MR2_16384CLKHS; |
unsigned int32 delval2=0; |
//}reg3; |
//reg4 |
unsigned int32 delval3=0; |
//reg5 |
unsigned int conf_fire=0; |
unsigned int1 en_startnoise=TDC_STARTNOISE_DIS; |
unsigned int1 dis_phasenoise=TDC_PHASENOISE_DIS; |
unsigned int repeat_fire=TDC_REPEAT_FIRE_0; |
unsigned int16 phase_fire=0; |
//}TDC_registers; |
void TDC_init() |
{ |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x70,8); |
output_high(TDC_ENABLE); |
} |
void TDC_reset() |
{ |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x50,8); |
output_high(TDC_ENABLE); |
} |
void TDC_start_cycle() |
{ |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x01,8); |
output_high(TDC_ENABLE); |
} |
void TDC_start_temp() |
{ |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x02,8); |
output_high(TDC_ENABLE); |
} |
void TDC_start_cal_resonator() |
{ |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x03,8); |
output_high(TDC_ENABLE); |
} |
void TDC_start_cal() |
{ |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x04,8); |
output_high(TDC_ENABLE); |
} |
unsigned int32 TDC_get_measurement(int num) |
{ |
unsigned int32 ret; |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0xB0 + num - 1); |
ret=spi_xfer(TDC_stream,0,32); |
output_high(TDC_ENABLE); |
return ret; |
} |
unsigned int16 TDC_get_status() |
{ |
unsigned int16 ret; |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0xB4,8); |
ret=spi_xfer(TDC_stream,0,16); |
output_high(TDC_ENABLE); |
return ret; |
} |
unsigned int8 TDC_get_reg1() |
{ |
unsigned int8 ret; |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0xB5,8); |
ret=spi_xfer(TDC_stream,0,8); |
output_high(TDC_ENABLE); |
return ret; |
} |
void TDC_update_registers() |
{ |
//update reg0 |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x80,8); |
spi_xfer(TDC_stream,firenum,4); |
spi_xfer(TDC_stream,div_fire,4); |
spi_xfer(TDC_stream,calresnum,2); |
spi_xfer(TDC_stream,clkhsdiv,2); |
spi_xfer(TDC_stream,start_clkhs,2); |
spi_xfer(TDC_stream,portnum,1); |
spi_xfer(TDC_stream,Tcycle,1); |
spi_xfer(TDC_stream,fakenum,1); |
spi_xfer(TDC_stream,selclkT,1); |
spi_xfer(TDC_stream,calibrate,1); |
spi_xfer(TDC_stream,disautocal,1); |
spi_xfer(TDC_stream,MRange,1); |
spi_xfer(TDC_stream,neg_stop2,1); |
spi_xfer(TDC_stream,neg_stop1,1); |
spi_xfer(TDC_stream,neg_start,1); |
output_high(TDC_ENABLE); |
// update reg1 |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x81,8); |
spi_xfer(TDC_stream,hit2,4); |
spi_xfer(TDC_stream,hit1,4); |
spi_xfer(TDC_stream,fast_init,1); |
spi_xfer(TDC_stream,1,1); |
spi_xfer(TDC_stream,hitin2,3); |
spi_xfer(TDC_stream,hitin1,3); |
spi_xfer(TDC_stream,0,8); |
output_high(TDC_ENABLE); |
// update reg2 |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x82); |
spi_xfer(TDC_stream,en_int,3); |
spi_xfer(TDC_stream,rfedge2,1); |
spi_xfer(TDC_stream,rfedge1,1); |
spi_xfer(TDC_stream,delval1,19); |
output_high(TDC_ENABLE); |
// update reg3 |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x83); |
spi_xfer(TDC_stream,0,2); |
spi_xfer(TDC_stream,en_err_val,1); |
spi_xfer(TDC_stream,tim0_mr2,2); |
spi_xfer(TDC_stream,delval2,19); |
output_high(TDC_ENABLE); |
// update reg4 |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x84); |
spi_xfer(TDC_stream,0b00100,5); |
spi_xfer(TDC_stream,delval3,19); |
output_high(TDC_ENABLE); |
// update reg5 |
output_low(TDC_ENABLE); |
spi_xfer(TDC_stream,0x85); |
spi_xfer(TDC_stream,conf_fire,3); |
spi_xfer(TDC_stream,en_startnoise,1); |
spi_xfer(TDC_stream,dis_phasenoise,1); |
spi_xfer(TDC_stream,repeat_fire,3); |
spi_xfer(TDC_stream,phase_fire,16); |
output_high(TDC_ENABLE); |
} |
/Modules/TDC/GP201A/SW/PICinterface/1wire.c |
---|
0,0 → 1,43 |
void onewire_reset() |
{ |
output_low(ONE_WIRE_PIN); |
delay_us(500); |
output_float(ONE_WIRE_PIN); |
delay_us(500); |
output_float(ONE_WIRE_PIN); |
} |
void onewire_write(int data) |
{ |
int count; |
for (count=0; count<8; ++count) |
{ |
output_low(ONE_WIRE_PIN); |
delay_us( 2 ); |
output_bit(ONE_WIRE_PIN, shift_right(&data,1,1)); |
delay_us( 60 ); |
output_float(ONE_WIRE_PIN); |
delay_us( 2 ); |
} |
} |
int onewire_read() |
{ |
int count, data; |
for (count=0; count<8; ++count) |
{ |
output_low(ONE_WIRE_PIN); |
delay_us( 2 ); |
output_float(ONE_WIRE_PIN); |
delay_us( 8 ); |
shift_right(&data,1,input(ONE_WIRE_PIN)); |
delay_us( 120 ); |
} |
return( data ); |
} |
/Modules/TDC/GP201A/SW/PICinterface/ds1820.c |
---|
0,0 → 1,25 |
#include "1wire.c" |
float ds1820_read() |
{ |
int8 busy=0, temp1, temp2; |
signed int16 temp3; |
float result; |
onewire_reset(); |
onewire_write(0xCC); |
onewire_write(0x44); |
while (busy == 0) busy = onewire_read(); |
onewire_reset(); |
onewire_write(0xCC); |
onewire_write(0xBE); |
temp1 = onewire_read(); |
temp2 = onewire_read(); |
temp3 = make16(temp2, temp1); |
result = (float) temp3 / 16.0; //calculation pro DS18B20 with 0.1 deg C |
return(result); |
} |