Problem with comparison.
| /Modules/TDC/GP201A/SW/PICinterface/main.h |
|---|
| 0,0 → 1,41 |
| #include <18F4550.h> |
| #device adc=8 |
| #FUSES NOWDT //No Watch Dog Timer |
| #FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale |
| #FUSES HS //High speed Osc (> 4mhz for PCM/PCH) (>10mhz for PCD) |
| #FUSES NOPROTECT //Code not protected from reading |
| #FUSES NOBROWNOUT //No brownout reset |
| #FUSES BORV20 //Brownout reset at 2.0V |
| #FUSES NOPUT //No Power Up Timer |
| #FUSES NOCPD //No EE protection |
| #FUSES STVREN //Stack full/underflow will cause reset |
| #FUSES NODEBUG //No Debug mode for ICD |
| #FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O |
| #FUSES NOWRT //Program memory not write protected |
| #FUSES NOWRTD //Data EEPROM not write protected |
| #FUSES IESO //Internal External Switch Over mode enabled |
| #FUSES FCMEN //Fail-safe clock monitor enabled |
| #FUSES PBADEN //PORTB pins are configured as analog input channels on RESET |
| #FUSES NOWRTC //configuration not registers write protected |
| #FUSES NOWRTB //Boot block not write protected |
| #FUSES NOEBTR //Memory not protected from table reads |
| #FUSES NOEBTRB //Boot block not protected from table reads |
| #FUSES NOCPB //No Boot Block code protection |
| #FUSES MCLR //Master Clear pin enabled |
| #FUSES LPT1OSC //Timer1 configured for low-power operation |
| #FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode) |
| #FUSES PLL12 //Divide By 12(48MHz oscillator input) |
| #FUSES CPUDIV1 //System Clock by 1 |
| #FUSES USBDIV //USB clock source comes from PLL divide by 2 |
| #FUSES VREGEN //USB voltage regulator enabled |
| #FUSES ICPRT //ICPRT enabled |
| #use delay(clock=20000000) |
| #use rs232(baud=9600,parity=N,xmit=PIN_B7,rcv=PIN_B6,bits=8) |
| #define TDC_ENABLE PIN_B3 //enable pin for SPI communication with TDC |
| #use spi(DI=PIN_B1, DO=PIN_B0, CLK=PIN_B2, stream=TDC_stream, bits=32) // uses software SPI |
| /Modules/TDC/GP201A/SW/PICinterface/main.pjt |
|---|
| 0,0 → 1,28 |
| [PROJECT] |
| Target=C:\Users\kakl\Documents\MLAB\Modules\TDC\GP201A\SW\PICinterface\main.hex |
| Development_Mode= |
| Processor_Text=PIC18F4550 |
| ToolSuite=CCS |
| Processor=0x4550 |
| [C:\Users\kakl\Documents\MLAB\Modules\TDC\GP201A\SW\PICinterface\main] |
| Type=4 |
| Path= |
| FileList= |
| BuildTool= |
| OptionString= |
| AdditionalOptionString= |
| [mru-list] |
| 1=C:\Users\kakl\Documents\MLAB\Modules\TDC\GP201A\SW\PICinterface\main.c |
| [Windows] |
| 0=0000 %S 0 0 796 451 3 0 |
| [Units] |
| Link=0 |
| Count=1 |
| 1=C:\Users\kakl\Documents\MLAB\Modules\TDC\GP201A\SW\PICinterface\main |
| [Opened Files] |
| 1=main.c |
| 2=main.h |
| 3=..\..\..\..\..\..\..\..\..\Program Files\PICC\Devices\18F4550.h |
| 4=GP2.c |
| 5=GP2.h |
| 6= |
| /Modules/TDC/GP201A/SW/PICinterface/GP2.c |
|---|
| 0,0 → 1,110 |
| void TDC_init() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x70); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_reset() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x50); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_start_cycle() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x01); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_start_temp() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x02); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_start_cal_resonator() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x03); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_start_cal() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x04); |
| output_high(TDC_ENABLE); |
| } |
| unsigned int32 TDC_get_measurement(int num) |
| { |
| unsigned int32 ret; |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB0 + num - 1); |
| ret=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| return ret; |
| } |
| unsigned int16 TDC_get_status() |
| { |
| unsigned int16 ret; |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB4,8); |
| ret=spi_xfer(TDC_stream,0,16); |
| output_high(TDC_ENABLE); |
| return ret; |
| } |
| unsigned int8 TDC_get_reg1() |
| { |
| unsigned int8 ret; |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB5,8); |
| ret=spi_xfer(TDC_stream,0,8); |
| output_high(TDC_ENABLE); |
| return ret; |
| } |
| void TDC_setup_reg1() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x81,8); |
| spi_xfer(TDC_stream,0x224000,24); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_setup_reg2() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB1); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_setup_reg3() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB2); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_setup_reg4() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB3); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_setup_reg5() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB4); |
| output_high(TDC_ENABLE); |
| } |
| /Modules/TDC/GP201A/SW/PICinterface/GP2.h |
|---|
| 0,0 → 1,18 |
| #include "GP2.c" |
| #define TDC_HITIN1_0 0x0 << 8 |
| #define TDC_HITIN1_1 0x1 << 8 |
| #define TDC_HITIN1_2 0x2 << 8 |
| #define TDC_HITIN1_3 0x3 << 8 |
| #define TDC_HITIN1_4 0x4 << 8 |
| #define TDC_HITIN2_0 0x0 << 11 |
| #define TDC_HITIN2_1 0x1 << 11 |
| #define TDC_HITIN2_2 0x2 << 11 |
| #define TDC_HITIN2_3 0x3 << 11 |
| #define TDC_HITIN2_4 0x4 << 11 |
| #define TDC_FAST_INIT_EN 0x1 << 15 |
| #define TDC_FAST_INIT_DIS 0x0 << 15 |
| #define TDC_HIT1_ |
| /Modules/TDC/GP201A/SW/PICinterface/main.c |
|---|
| 0,0 → 1,29 |
| #include "main.h" |
| #include "GP2.h" |
| void main() |
| { |
| setup_adc_ports(NO_ANALOGS|VSS_VDD); |
| setup_adc(ADC_CLOCK_DIV_2); |
| setup_psp(PSP_DISABLED); |
| setup_spi(SPI_SS_DISABLED); |
| setup_wdt(WDT_OFF); |
| setup_timer_0(RTCC_INTERNAL); |
| setup_timer_1(T1_DISABLED); |
| setup_timer_2(T2_DISABLED,0,1); |
| setup_ccp1(CCP_OFF); |
| setup_comparator(NC_NC_NC_NC); |
| setup_vref(FALSE); |
| TDC_reset(); |
| //TDC_init(); |
| TDC_setup_reg1(); |
| while(true) |
| { |
| delay_ms(500); |
| printf("ret: %LX \n", TDC_get_reg1()); |
| // printf("ret: %LX \n", TDC_get_measurement(1)); |
| }; |
| } |
| /Modules/TDC/GP201A/SW/PICinterface/main.hex |
|---|
| 0,0 → 1,43 |
| :10000000D0EF00F07265743A20254C58200A0000A9 |
| :100010000A50200807E00B6E063607360836093608 |
| :100020000B2EFAD79382939093948A940AC00BF084 |
| :100030008A8409AE8A9009BE8A8006360736083659 |
| :1000400009368A94003601360236033681A20090C2 |
| :1000500081B200800B2EECD7000C93968A96096A29 |
| :10006000086A076A500E066E200E0A6ED1DF93965C |
| :100070008A860BEF01F093968A96096A086A076AE6 |
| :10008000810E066E080E0A6EC3DF096A220E086E24 |
| :10009000400E076E066A180E0A6EBADF93968A86BD |
| :1000A0000CEF01F0EA6A060EE96EEF500DE0060E65 |
| :1000B000016E006A002EFED7012EFBD77B0E006E6C |
| :1000C000002EFED7EF2EF3D711EF01F093968A960C |
| :1000D000096A086A076AB50E066E080E0A6E98DF8E |
| :1000E000096A086A076A066A080E0A6E91DF0150FB |
| :1000F00000C005F093968A8605C001F014EF01F068 |
| :10010000939E8A9E080E016E00D00000018E0ED0D4 |
| :10011000019E0932D8B08A8ED8A08A9E018C06D062 |
| :10012000019C012EF6D700D000008A8EA70EE96E42 |
| :10013000E92EFED700D001BEEBD701BCF1D7000CF1 |
| :100140000900F6CF07F0F7CF08F0F5CF09F0D8DFB8 |
| :1001500007C0F6FF08C0F7FF062EF2D71DEF01F02B |
| :1001600007BE0FD00F0E006E063800160A0E005C98 |
| :1001700003E2300E002602D00750002600C009F02E |
| :10018000BFDF0F0E06160A0E065C02E2300E02D02A |
| :10019000079E0750062606C009F0B2DF22EF01F0E5 |
| :1001A000F86AD09EEA6AE96A939E8A8E9382939057 |
| :1001B00093948A94C150C00B0F09C16E070EB46EA0 |
| :1001C000C150C00B0F09C16EC090C092C094C09EB8 |
| :1001D000C2809698C69A949E93809392010EC66EA2 |
| :1001E000000EC76ED190800ED56ECD6A000ECA6E1D |
| :1001F000000ECB6E9484BD6AB76AB66A070EB46E01 |
| :100200009250926E100E006E002EFED70000B45079 |
| :10021000A19CB56A22D72FD7020E056EFA0E066E84 |
| :1002200041D7052EFBD752D701C005F0040EF66E5C |
| :10023000000EF76E050E066E83D705C006F0370E6A |
| :10024000076E8ED7200E096E5BDF0A0E096E58DF2F |
| :04025000E3D70300ED |
| :020000040030CA |
| :0E00000027CC390E0087A1000FC00FE00F4083 |
| :00000001FF |
| ;PIC18F4550 |
| ;CRC=1441 CREATED="27-12-10 17:22" |