Problem with comparison.
| /Modules/TDC/GP201A/SW/PICinterface/main.c |
|---|
| 0,0 → 1,250 |
| #include "main.h" |
| #define VERSION 0.2 |
| #define START PIN_D4 |
| #define STOP1 PIN_D5 |
| #define STOP2 PIN_D6 |
| #include "GP2.h" |
| #define ONE_WIRE_PIN PIN_E2 |
| #include "ds1820.c" |
| void main() |
| { |
| setup_adc_ports(NO_ANALOGS|VSS_VDD); |
| setup_adc(ADC_CLOCK_DIV_2); |
| setup_psp(PSP_DISABLED); |
| setup_spi(SPI_SS_DISABLED); |
| setup_wdt(WDT_OFF); |
| setup_timer_0(RTCC_INTERNAL); |
| setup_timer_1(T1_DISABLED); |
| setup_timer_2(T2_DISABLED,0,1); |
| setup_ccp1(CCP_OFF); |
| setup_comparator(NC_NC_NC_NC); |
| setup_vref(FALSE); |
| TDC_reset(); |
| output_low(START); |
| output_low(STOP1); |
| output_low(STOP2); |
| delay_ms(50); |
| /* |
| 1 0 0 0 0 ADR2 ADR1 ADR0 Write into address ADR |
| 1 0 1 1 0 ADR2 ADR1 ADR0 Read from address ADR |
| 0 1 1 1 0 0 0 0 Init |
| 0 1 0 1 0 0 0 0 Power On Reset |
| 0 0 0 0 0 0 0 1 Start_Cycle |
| 0 0 0 0 0 0 1 0 Start_Temp |
| 0 0 0 0 0 0 1 1 Start_Cal_Resonator |
| 0 0 0 0 0 1 0 0 Start_Cal_TDC |
| */ |
| int32 ble,ret32; |
| int16 ret16; |
| int8 ret8; |
| while(TRUE) |
| { |
| delay_ms(100); |
| TDC_reset(); |
| delay_ms(100); |
| //----------------------------------------------- Nastaveni registru |
| output_low(TDC_ENABLE); |
| ble=0; |
| ble=(8<<28)|(0<<24); |
| ble|=(0<<20)|(0<<16)|(0<<14)|(3<<12)|(1<<10)|(0<<9)|(0<<8)|(0<<7)|(1<<6)|(1<<5)|(0<<4)|(1<<3)|(0<<2)|(0<<1)|0; |
| spi_xfer(TDC_stream,ble,32); |
| output_high(TDC_ENABLE); |
| output_low(TDC_ENABLE); |
| ble=0; |
| ble=(8<<28)|(1<<24); |
| ble|=(2<<20)|(1<<16)|(0<<15)|(1<<14)|(0<<11)|(4<<8)|0; |
| spi_xfer(TDC_stream,ble,32); |
| output_high(TDC_ENABLE); |
| output_low(TDC_ENABLE); |
| ble=0; |
| ble=(8<<28)|(2<<24); |
| ble|=(1<<21)|(1<<20)|(1<<19)|0; |
| spi_xfer(TDC_stream,ble,32); |
| output_high(TDC_ENABLE); |
| output_low(TDC_ENABLE); |
| ble=0; |
| ble=(8<<28)|(3<<24); |
| ble|=(0<<22)|(1<<21)|(1<<20)|(1<<19)|0; |
| spi_xfer(TDC_stream,ble,32); |
| output_high(TDC_ENABLE); |
| output_low(TDC_ENABLE); |
| ble=0; |
| ble=(8<<28)|(4<<24); |
| ble|=(4<<19)|0; |
| spi_xfer(TDC_stream,ble,32); |
| output_high(TDC_ENABLE); |
| output_low(TDC_ENABLE); |
| ble=0; |
| ble=(8<<28)|(5<<24); |
| ble|=(0<<21)|(0<<20)|(0<<19)|(0<<16)|0; |
| spi_xfer(TDC_stream,ble,32); |
| output_high(TDC_ENABLE); |
| //----------------------------------------------- Vypis registru |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|0; |
| spi_xfer(TDC_stream,ret8,8); |
| ret32=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| printf("- %LX ", ret32); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|1; |
| spi_xfer(TDC_stream,ret8,8); |
| ret32=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| printf("%LX ", ret32); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|2; |
| spi_xfer(TDC_stream,ret8,8); |
| ret32=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| printf("%LX ", ret32); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|3; |
| spi_xfer(TDC_stream,ret8,8); |
| ret32=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| printf("%LX ", ret32); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|4; |
| spi_xfer(TDC_stream,ret8,8); |
| ret16=spi_xfer(TDC_stream,0,16); |
| output_high(TDC_ENABLE); |
| printf("[%Lu %Lu %Lu %Lu %Lu %Lu %Lu] ", (1&(ret16)>>12), (1&(ret16)>>11), (1&(ret16)>>10), 1&(ret16)>>9, 7&(ret16)>>6, 7&(ret16)>>3, 7&ret16); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|5; |
| spi_xfer(TDC_stream,ret8,8); |
| ret8=spi_xfer(TDC_stream,0,8); |
| output_high(TDC_ENABLE); |
| printf("%X\r\n", ret8); |
| //----------------------------------------------- Mereni |
| TDC_init(); |
| delay_ms(50); |
| TDC_start_cycle(); |
| delay_ms(200); |
| output_high(STOP2); // Merime jenom jednim kanalem (druhy zrejme musi byt v H) |
| output_high(START); |
| output_low(START); |
| delay_us(1); |
| output_high(STOP1); |
| output_low(STOP1); |
| delay_us(1); |
| output_high(STOP1); |
| output_low(STOP1); |
| delay_us(1); |
| output_high(STOP1); |
| output_low(STOP1); |
| delay_us(1); |
| //----------------------------------------------- Pocitani |
| int32 nn; |
| for(nn=3;nn<=5;nn++) |
| { |
| delay_ms(500); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|0; |
| spi_xfer(TDC_stream,ret8,8); |
| ret32=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| printf("* %LX ", ret32); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|1; |
| spi_xfer(TDC_stream,ret8,8); |
| ret32=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| printf("%LX ", ret32); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|2; |
| spi_xfer(TDC_stream,ret8,8); |
| ret32=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| printf("%LX ", ret32); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|3; |
| spi_xfer(TDC_stream,ret8,8); |
| ret32=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| printf("%LX ", ret32); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|4; |
| spi_xfer(TDC_stream,ret8,8); |
| ret16=spi_xfer(TDC_stream,0,16); |
| output_high(TDC_ENABLE); |
| printf("[%Lu %Lu %Lu %Lu %Lu %Lu %Lu] ", (1&(ret16)>>12), (1&(ret16)>>11), (1&(ret16)>>10), 1&(ret16)>>9, 7&(ret16)>>6, 7&(ret16)>>3, 7&ret16); |
| output_low(TDC_ENABLE); |
| ret8=0; |
| ret8=(0b1011<<4)|5; |
| spi_xfer(TDC_stream,ret8,8); |
| ret8=spi_xfer(TDC_stream,0,8); |
| output_high(TDC_ENABLE); |
| printf("%X\r\n", ret8); |
| // Next calculation |
| output_low(TDC_ENABLE); |
| ble=0; |
| ble=(8<<28)|(1<<24); |
| ble|=(nn<<20)|(1<<16)|(0<<15)|(1<<14)|(0<<11)|(4<<8)|0x00; |
| spi_xfer(TDC_stream,ble,32); |
| output_high(TDC_ENABLE); |
| } |
| } |
| } |
| /Modules/TDC/GP201A/SW/PICinterface/main.hex |
|---|
| 0,0 → 1,202 |
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| :100BC000476E47EC00F00A0E476E47EC00F0939634 |
| :100BD0008A96246A236A226A216A810E246E236A15 |
| :100BE000226A216A316A326A2C34336E2D34346EB3 |
| :100BF000333634363336343633363436F00E331635 |
| :100C00003380328C328431502112325022123350D0 |
| :100C100023123450241224C033F023C032F022C0F7 |
| :100C200031F021C030F0200E346E02EC00F09396CB |
| :100C30008A86010E2C26D8B02D2AD8B42E2AD8B4F4 |
| :0A0C40002F2ACFD56EEF01F003005C |
| :020000040030CA |
| :0E00000027CC390E0087A1000FC00FE00F4083 |
| :00000001FF |
| ;PIC18F4550 |
| ;CRC=0A0F CREATED="06-4-11 21:32" |
| /Modules/TDC/GP201A/SW/PICinterface/main.pjt |
|---|
| 0,0 → 1,32 |
| [PROJECT] |
| Target=.\main.hex |
| Development_Mode= |
| Processor_Text=PIC18F4550 |
| ToolSuite=CCS |
| Processor=0x4550 |
| [.\main] |
| Type=4 |
| Path= |
| FileList= |
| BuildTool= |
| OptionString= |
| AdditionalOptionString= |
| [mru-list] |
| 1=.\main.c |
| [Windows] |
| 0=0000 %S 0 0 796 451 3 0 |
| [Opened Files] |
| 1=main.c |
| 2=main.h |
| 3=..\..\..\..\..\..\..\..\..\Program Files (x86)\PICC\devices\18F4550.h |
| 4=GP2.h |
| 5=GP2.c |
| 6=ds1820.c |
| 7=1wire.c |
| 8= |
| [Target Data] |
| OptionString=-p +FH |
| FileList=D:\MLAB\Modules\TDC\GP201A\SW\PICinterface\main.c |
| [Units] |
| Count=1 |
| 1=main (main) |
| /Modules/TDC/GP201A/SW/PICinterface/main.h |
|---|
| 0,0 → 1,41 |
| #include <18F4550.h> |
| #device adc=8 |
| #FUSES NOWDT //No Watch Dog Timer |
| #FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale |
| #FUSES HS //High speed Osc (> 4mhz for PCM/PCH) (>10mhz for PCD) |
| #FUSES NOPROTECT //Code not protected from reading |
| #FUSES NOBROWNOUT //No brownout reset |
| #FUSES BORV20 //Brownout reset at 2.0V |
| #FUSES NOPUT //No Power Up Timer |
| #FUSES NOCPD //No EE protection |
| #FUSES STVREN //Stack full/underflow will cause reset |
| #FUSES NODEBUG //No Debug mode for ICD |
| #FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O |
| #FUSES NOWRT //Program memory not write protected |
| #FUSES NOWRTD //Data EEPROM not write protected |
| #FUSES IESO //Internal External Switch Over mode enabled |
| #FUSES FCMEN //Fail-safe clock monitor enabled |
| #FUSES PBADEN //PORTB pins are configured as analog input channels on RESET |
| #FUSES NOWRTC //configuration not registers write protected |
| #FUSES NOWRTB //Boot block not write protected |
| #FUSES NOEBTR //Memory not protected from table reads |
| #FUSES NOEBTRB //Boot block not protected from table reads |
| #FUSES NOCPB //No Boot Block code protection |
| #FUSES MCLR //Master Clear pin enabled |
| #FUSES LPT1OSC //Timer1 configured for low-power operation |
| #FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode) |
| #FUSES PLL12 //Divide By 12(48MHz oscillator input) |
| #FUSES CPUDIV1 //System Clock by 1 |
| #FUSES USBDIV //USB clock source comes from PLL divide by 2 |
| #FUSES VREGEN //USB voltage regulator enabled |
| #FUSES ICPRT //ICPRT enabled |
| #use delay(clock=20000000) |
| #use rs232(baud=9600,parity=N,xmit=PIN_B7,rcv=PIN_B6,bits=8) |
| #define TDC_ENABLE PIN_B3 //enable pin for SPI communication with TDC |
| #use spi(DI=PIN_B1, DO=PIN_B0, CLK=PIN_B2, stream=TDC_stream, bits=32,baud=9600) // uses software SPI |
| /Modules/TDC/GP201A/SW/PICinterface/GP2.h |
|---|
| 0,0 → 1,152 |
| //register 0 |
| #define TDC_NEG_START_INV 1 |
| #define TDC_NEG_START 0 |
| #define TDC_NEG_STOP1_INV 1 |
| #define TDC_NEG_STOP1 0 |
| #define TDC_NEG_STOP2_INV 1 |
| #define TDC_NEG_STOP2 0 |
| #define TDC_MRANGE1 0 |
| #define TDC_MRANGE2 1 |
| #define TDC_AUTOCAL_EN 0 |
| #define TDC_AUTOCAL_DIS 1 |
| #define TDC_CALIBRATE_EN 1 |
| #define TDC_CALIBRATE_DIS 0 |
| #define TDC_TSELCLK_32KHZ 0 |
| #define TDC_TSELCLK_128HS 1 |
| #define TDC_TFAKENUM_2 0 |
| #define TDC_TFAKENUM_8 1 |
| #define TDC_TCYCLE_SHORT 0 |
| #define TDC_TCYSLE_LONG 1 |
| #define TDC_TPORTNUM_2 0 |
| #define TDC_TPORTNUM_4 1 |
| #define TDC_CLKHS_OFF 0 |
| #define TDC_CLKHS_ON 1 |
| #define TDC_CLKHS_640US 2 |
| #define TDC_CLKHS_1280US 4 |
| #define TDC_CLKHSDIV_1 0 |
| #define TDC_CLKHSDIV_2 1 |
| #define TDC_CLKHSDIV_4 2 |
| #define TDC_CLKHSDIV_8 3 |
| #define TDC_CALPERIODS_2 0 |
| #define TDC_CALPERIODS_4 1 |
| #define TDC_CALPERIODS_8 2 |
| #define TDC_CALPERIODS_16 3 |
| #define TDC_DIV_FIRE_2 1 |
| #define TDC_DIV_FIRE_3 2 |
| #define TDC_DIV_FIRE_4 3 |
| #define TDC_DIV_FIRE_5 4 |
| #define TDC_DIV_FIRE_6 5 |
| #define TDC_DIV_FIRE_7 6 |
| #define TDC_DIV_FIRE_8 7 |
| #define TDC_DIV_FIRE_9 8 |
| #define TDC_DIV_FIRE_10 9 |
| #define TDC_DIV_FIRE_11 10 |
| #define TDC_DIV_FIRE_12 11 |
| #define TDC_DIV_FIRE_13 12 |
| #define TDC_DIV_FIRE_14 13 |
| #define TDC_DIV_FIRE_15 14 |
| #define TDC_DIV_FIRE_16 15 |
| #define TDC_FIRENUM_0 0 |
| #define TDC_FIRENUM_1 1 |
| #define TDC_FIRENUM_2 2 |
| #define TDC_FIRENUM_3 3 |
| #define TDC_FIRENUM_4 4 |
| #define TDC_FIRENUM_5 5 |
| #define TDC_FIRENUM_6 6 |
| #define TDC_FIRENUM_7 7 |
| #define TDC_FIRENUM_8 8 |
| #define TDC_FIRENUM_9 9 |
| #define TDC_FIRENUM_10 10 |
| #define TDC_FIRENUM_11 11 |
| #define TDC_FIRENUM_12 12 |
| #define TDC_FIRENUM_13 13 |
| #define TDC_FIRENUM_14 14 |
| #define TDC_FIRENUM_15 15 |
| //register 1 |
| #define TDC_HITIN1_0 0 |
| #define TDC_HITIN1_1 1 |
| #define TDC_HITIN1_2 2 |
| #define TDC_HITIN1_3 3 |
| #define TDC_HITIN1_4 4 |
| #define TDC_HITIN2_0 0 |
| #define TDC_HITIN2_1 1 |
| #define TDC_HITIN2_2 2 |
| #define TDC_HITIN2_3 3 |
| #define TDC_HITIN2_4 4 |
| #define TDC_FAST_INIT_EN 1 |
| #define TDC_FAST_INIT_DIS 0 |
| #define TDC_MRANGE1_HIT1_START 0 |
| #define TDC_MRANGE1_HIT1_1CH1 1 |
| #define TDC_MRANGE1_HIT1_2CH1 2 |
| #define TDC_MRANGE1_HIT1_3CH1 3 |
| #define TDC_MRANGE1_HIT1_4CH1 4 |
| #define TDC_MRANGE1_HIT1_NOAC 5 |
| #define TDC_MRANGE1_HIT1_CAL1CH1 6 |
| #define TDC_MRANGE1_HIT1_CAL2CH1 7 |
| #define TDC_MRANGE1_HIT1_1CH2 9 |
| #define TDC_MRANGE1_HIT1_2CH2 0xA |
| #define TDC_MRANGE1_HIT1_3CH2 0xB |
| #define TDC_MRANGE1_HIT1_4CH2 0xC |
| #define TDC_MRANGE2_HIT1_START 1 |
| #define TDC_MRANGE1_HIT2_START 0 |
| #define TDC_MRANGE1_HIT2_1CH1 1 |
| #define TDC_MRANGE1_HIT2_2CH1 2 |
| #define TDC_MRANGE1_HIT2_3CH1 3 |
| #define TDC_MRANGE1_HIT2_4CH1 4 |
| #define TDC_MRANGE1_HIT2_NOAC 5 |
| #define TDC_MRANGE1_HIT2_CAL1CH1 6 |
| #define TDC_MRANGE1_HIT2_CAL2CH1 7 |
| #define TDC_MRANGE1_HIT2_1CH2 9 |
| #define TDC_MRANGE1_HIT2_2CH2 0xA |
| #define TDC_MRANGE1_HIT2_3CH2 0xB |
| #define TDC_MRANGE1_HIT2_4CH2 0xC |
| #define TDC_MRANGE2_HIT2_1CH1 2 |
| #define TDC_MRANGE2_HIT2_2CH1 3 |
| #define TDC_MRANGE2_HIT2_3CH1 4 |
| //register 2 |
| #define TDC_INT_TIMEOUT 4 |
| #define TDC_INT_ENDHIT 2 |
| #define TDC_INT_ALU 1 |
| #define TDC_CH1EDGE_RIS 0 |
| #define TDC_CH1EDGE_FAL 1 |
| #define TDC_CH2EDGE_RIS 0 |
| #define TDC_CH2EDGE_FAL 1 |
| //register 3 |
| #define TDC_TIM0MR2_256CLKHS 0 |
| #define TDC_TIM0MR2_1024CLKHS 1 |
| #define TDC_TIM0MR2_4096CLKHS 2 |
| #define TDC_TIM0MR2_16384CLKHS 3 |
| #define TDC_ERRVAL_EN 1 |
| #define TDC_ERRVAL_DIS 0 |
| //register 5 |
| #define TDC_REPEAT_FIRE_0 0 |
| #define TDC_REPEAT_FIRE_1 1 |
| #define TDC_REPEAT_FIRE_2 2 |
| #define TDC_REPEAT_FIRE_3 3 |
| #define TDC_REPEAT_FIRE_4 4 |
| #define TDC_REPEAT_FIRE_5 5 |
| #define TDC_REPEAT_FIRE_6 6 |
| #define TDC_REPEAT_FIRE_7 7 |
| #define TDC_PHASENOISE_EN 0 |
| #define TDC_PHASENOISE_DIS 1 |
| #define TDC_STARTNOISE_EN 1 |
| #define TDC_STARTNOISE_DIS 0 |
| #include "GP2.c" |
| /Modules/TDC/GP201A/SW/PICinterface/GP2.c |
|---|
| 0,0 → 1,198 |
| //struct { |
| unsigned int8 firenum=TDC_FIRENUM_0; |
| unsigned int8 div_fire=TDC_DIV_FIRE_2; |
| unsigned int8 calresnum=TDC_CALPERIODS_2; |
| unsigned int8 clkhsdiv=TDC_CLKHSDIV_1; |
| unsigned int8 start_clkhs=TDC_CLKHS_ON; |
| unsigned int1 portnum=TDC_TPORTNUM_4; |
| unsigned int1 Tcycle=TDC_TCYCLE_SHORT; |
| unsigned int1 fakenum=TDC_TFAKENUM_2; |
| unsigned int1 selclkT=TDC_TSELCLK_128HS; |
| unsigned int1 calibrate=TDC_CALIBRATE_EN; |
| unsigned int1 disautocal=TDC_AUTOCAL_EN; |
| unsigned int1 MRange=TDC_MRANGE2; |
| unsigned int1 neg_stop2=TDC_NEG_STOP2; |
| unsigned int1 neg_stop1=TDC_NEG_STOP1; |
| unsigned int1 neg_start=TDC_NEG_START; |
| //}reg0; |
| //struct { |
| unsigned int hit2=TDC_MRANGE1_HIT2_NOAC; |
| unsigned int hit1=TDC_MRANGE1_HIT1_NOAC; |
| unsigned int1 fast_init=TDC_FAST_INIT_DIS; |
| unsigned int hitin2=TDC_HITIN2_0; |
| unsigned int hitin1=TDC_HITIN1_0; |
| //}reg1; |
| //struct { |
| unsigned int en_int=TDC_INT_ALU; |
| unsigned int1 rfedge2=TDC_CH2EDGE_RIS; |
| unsigned int1 rfedge1=TDC_CH1EDGE_RIS; |
| unsigned int32 delval1=0; |
| //}reg2; |
| //struct { |
| unsigned int1 en_err_val=TDC_ERRVAL_DIS; |
| unsigned int tim0_mr2=TDC_TIM0MR2_16384CLKHS; |
| unsigned int32 delval2=0; |
| //}reg3; |
| //reg4 |
| unsigned int32 delval3=0; |
| //reg5 |
| unsigned int conf_fire=0; |
| unsigned int1 en_startnoise=TDC_STARTNOISE_DIS; |
| unsigned int1 dis_phasenoise=TDC_PHASENOISE_DIS; |
| unsigned int repeat_fire=TDC_REPEAT_FIRE_0; |
| unsigned int16 phase_fire=0; |
| //}TDC_registers; |
| void TDC_init() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x70,8); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_reset() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x50,8); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_start_cycle() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x01,8); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_start_temp() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x02,8); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_start_cal_resonator() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x03,8); |
| output_high(TDC_ENABLE); |
| } |
| void TDC_start_cal() |
| { |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x04,8); |
| output_high(TDC_ENABLE); |
| } |
| unsigned int32 TDC_get_measurement(int num) |
| { |
| unsigned int32 ret; |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB0 + num - 1); |
| ret=spi_xfer(TDC_stream,0,32); |
| output_high(TDC_ENABLE); |
| return ret; |
| } |
| unsigned int16 TDC_get_status() |
| { |
| unsigned int16 ret; |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB4,8); |
| ret=spi_xfer(TDC_stream,0,16); |
| output_high(TDC_ENABLE); |
| return ret; |
| } |
| unsigned int8 TDC_get_reg1() |
| { |
| unsigned int8 ret; |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0xB5,8); |
| ret=spi_xfer(TDC_stream,0,8); |
| output_high(TDC_ENABLE); |
| return ret; |
| } |
| void TDC_update_registers() |
| { |
| //update reg0 |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x80,8); |
| spi_xfer(TDC_stream,firenum,4); |
| spi_xfer(TDC_stream,div_fire,4); |
| spi_xfer(TDC_stream,calresnum,2); |
| spi_xfer(TDC_stream,clkhsdiv,2); |
| spi_xfer(TDC_stream,start_clkhs,2); |
| spi_xfer(TDC_stream,portnum,1); |
| spi_xfer(TDC_stream,Tcycle,1); |
| spi_xfer(TDC_stream,fakenum,1); |
| spi_xfer(TDC_stream,selclkT,1); |
| spi_xfer(TDC_stream,calibrate,1); |
| spi_xfer(TDC_stream,disautocal,1); |
| spi_xfer(TDC_stream,MRange,1); |
| spi_xfer(TDC_stream,neg_stop2,1); |
| spi_xfer(TDC_stream,neg_stop1,1); |
| spi_xfer(TDC_stream,neg_start,1); |
| output_high(TDC_ENABLE); |
| // update reg1 |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x81,8); |
| spi_xfer(TDC_stream,hit2,4); |
| spi_xfer(TDC_stream,hit1,4); |
| spi_xfer(TDC_stream,fast_init,1); |
| spi_xfer(TDC_stream,1,1); |
| spi_xfer(TDC_stream,hitin2,3); |
| spi_xfer(TDC_stream,hitin1,3); |
| spi_xfer(TDC_stream,0,8); |
| output_high(TDC_ENABLE); |
| // update reg2 |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x82); |
| spi_xfer(TDC_stream,en_int,3); |
| spi_xfer(TDC_stream,rfedge2,1); |
| spi_xfer(TDC_stream,rfedge1,1); |
| spi_xfer(TDC_stream,delval1,19); |
| output_high(TDC_ENABLE); |
| // update reg3 |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x83); |
| spi_xfer(TDC_stream,0,2); |
| spi_xfer(TDC_stream,en_err_val,1); |
| spi_xfer(TDC_stream,tim0_mr2,2); |
| spi_xfer(TDC_stream,delval2,19); |
| output_high(TDC_ENABLE); |
| // update reg4 |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x84); |
| spi_xfer(TDC_stream,0b00100,5); |
| spi_xfer(TDC_stream,delval3,19); |
| output_high(TDC_ENABLE); |
| // update reg5 |
| output_low(TDC_ENABLE); |
| spi_xfer(TDC_stream,0x85); |
| spi_xfer(TDC_stream,conf_fire,3); |
| spi_xfer(TDC_stream,en_startnoise,1); |
| spi_xfer(TDC_stream,dis_phasenoise,1); |
| spi_xfer(TDC_stream,repeat_fire,3); |
| spi_xfer(TDC_stream,phase_fire,16); |
| output_high(TDC_ENABLE); |
| } |
| /Modules/TDC/GP201A/SW/PICinterface/1wire.c |
|---|
| 0,0 → 1,43 |
| void onewire_reset() |
| { |
| output_low(ONE_WIRE_PIN); |
| delay_us(500); |
| output_float(ONE_WIRE_PIN); |
| delay_us(500); |
| output_float(ONE_WIRE_PIN); |
| } |
| void onewire_write(int data) |
| { |
| int count; |
| for (count=0; count<8; ++count) |
| { |
| output_low(ONE_WIRE_PIN); |
| delay_us( 2 ); |
| output_bit(ONE_WIRE_PIN, shift_right(&data,1,1)); |
| delay_us( 60 ); |
| output_float(ONE_WIRE_PIN); |
| delay_us( 2 ); |
| } |
| } |
| int onewire_read() |
| { |
| int count, data; |
| for (count=0; count<8; ++count) |
| { |
| output_low(ONE_WIRE_PIN); |
| delay_us( 2 ); |
| output_float(ONE_WIRE_PIN); |
| delay_us( 8 ); |
| shift_right(&data,1,input(ONE_WIRE_PIN)); |
| delay_us( 120 ); |
| } |
| return( data ); |
| } |
| /Modules/TDC/GP201A/SW/PICinterface/ds1820.c |
|---|
| 0,0 → 1,25 |
| #include "1wire.c" |
| float ds1820_read() |
| { |
| int8 busy=0, temp1, temp2; |
| signed int16 temp3; |
| float result; |
| onewire_reset(); |
| onewire_write(0xCC); |
| onewire_write(0x44); |
| while (busy == 0) busy = onewire_read(); |
| onewire_reset(); |
| onewire_write(0xCC); |
| onewire_write(0xBE); |
| temp1 = onewire_read(); |
| temp2 = onewire_read(); |
| temp3 = make16(temp2, temp1); |
| result = (float) temp3 / 16.0; //calculation pro DS18B20 with 0.1 deg C |
| return(result); |
| } |