/Modules/Audio/ADCaudio01A/CAM_PROFI/Preview.gvp
0,0 → 1,9
(gerbv-file-version! "2.0A")
(define-layer! 5 (cons 'filename "V2.PHO")(cons 'visible #f)(cons 'color #(53713 6939 26728)))
(define-layer! 4 (cons 'filename "V1.PHO")(cons 'visible #t)(cons 'color #(54741 65021 13107)))
(define-layer! 3 (cons 'filename "T1.PHO")(cons 'visible #t)(cons 'color #(0 50115 50115)))
(define-layer! 2 (cons 'filename "M2.PHO")(cons 'visible #f)(cons 'color #(30069 62194 26471)))
(define-layer! 1 (cons 'filename "M1.PHO")(cons 'visible #t)(cons 'color #(49601 0 57568)))
(define-layer! 0 (cons 'filename "BOARD.PHO")(cons 'visible #t)(cons 'color #(29555 29555 57054)))
(define-layer! -1 (cons 'filename "./")(cons 'visible #f)(cons 'color #(0 0 0)))
(set-render-type! 3)
/Modules/Audio/ADCaudio01A/PrjInfo.txt
0,0 → 1,17
//
// Toto je popisný soubor pro popis obsahu adresáře (příklad)
//
 
[InfoShortDescription.en]
Audio to digital converter
[InfoShortDescription.cs]
Modul audio A/D převodníku
[InfoLongDescription.en]
Module has audio input interface. Digitalized audio data stream (I2S) with parametrers 192kHz@24bit.
 
[InfoLongDescription.cs]
Modul sklouží jako audio vstup. Digitální data lze vyčíst přes rozhraní I2S s parametry až 192kHz@bit.
 
[End]
/Modules/Clock/CLKDIV01A/PrjInfo.txt
1,11 → 1,11
[InfoShortDescription.en]
Diff input Clock divider
Differential input Clock divider
 
[InfoShortDescription.cs]
Dělička hodin s differenčním vstupem
 
[InfoLongDescription.en]
Multiple division ration can be selected by jumpers. Possible division ration are: (÷1, ÷2, ÷4, ÷8) or (÷2, ÷4, ÷8, ÷16) every output is synchronous each other. The common enable (EN) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state.
Multiple division ratios can be selected by jumpers. Possible division ratios are: (÷1, ÷2, ÷4, ÷8) or (÷2, ÷4, ÷8, ÷16) every output is synchronous each other. The common enable (EN) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state.
 
[InfoLongDescription.cs]
Může být nastaveno více dělících poměrů. Možnosti jsou (÷1, ÷2, ÷4, ÷8) nebo (÷2, ÷4, ÷8, ÷16). EN vstup je synchronní s interními hodinami, proto dojde k vypnutí při návratu na nulu.