/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A.cs.html
66,7 → 66,7
 
<p>
<a href="../S3AN01A.cs.pdf"><img class="NoBorder"
src="../../Web/PIC/FileIco_PDF.ico"
src="../../../../../Web/PIC/FileIco_PDF.ico"
alt="Acrobat">&nbsp;PDF verze</a>
</p>
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs.html
80,6 → 80,12
alt="Deska S3AN01B, pohled shora">
</p>
 
<p>
<a href="../S3AN01B_HW_Reference.cs.pdf"><img class="NoBorder"
src="../../../../../Web/PIC/FileIco_PDF.ico"
alt="Acrobat">&nbsp;PDF verze</a>
</p>
 
<h1> Technické parametry </h1>
 
<table>