/Modules/PowerSupply/UPCONV01A/SCH_PCB/UPCONV01A.bak
File deleted
/Modules/PowerSupply/UPCONV01A/SCH_PCB/UPCONV01A.kicad_pcb
2,13 → 2,13
 
(general
(links 77)
(no_connects 77)
(no_connects 0)
(area 0.178999 -40.461001 50.621001 -0.178999)
(thickness 1.6)
(drawings 4)
(tracks 0)
(drawings 22)
(tracks 443)
(zones 0)
(modules 43)
(modules 45)
(nets 13)
)
 
37,14 → 37,22
)
 
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(last_trace_width 0.6)
(user_trace_width 0.2)
(user_trace_width 0.3)
(user_trace_width 0.4)
(user_trace_width 0.5)
(user_trace_width 0.6)
(user_trace_width 0.7)
(user_trace_width 0.8)
(user_trace_width 1.5)
(trace_clearance 0.3)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.6)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
96,18 → 104,18
(net 3 "Net-(C10-Pad1)")
(net 4 "Net-(C11-Pad1)")
(net 5 "Net-(C12-Pad1)")
(net 6 "Net-(C13-Pad1)")
(net 7 "Net-(C13-Pad2)")
(net 8 "Net-(D2-Pad2)")
(net 9 /EN)
(net 10 /12V)
(net 11 /5V)
(net 12 /ADJ)
(net 6 "Net-(C13-Pad2)")
(net 7 "Net-(D2-Pad2)")
(net 8 /EN)
(net 9 /12V)
(net 10 /5V)
(net 11 /ADJ)
(net 12 /Vout)
 
(net_class Default "Toto je výchozí třída sítě."
(clearance 0.2)
(clearance 0.3)
(trace_width 0.25)
(via_dia 0.6)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
115,11 → 123,11
(add_net /5V)
(add_net /ADJ)
(add_net /EN)
(add_net /Vout)
(add_net GND)
(add_net "Net-(C10-Pad1)")
(add_net "Net-(C11-Pad1)")
(add_net "Net-(C12-Pad1)")
(add_net "Net-(C13-Pad1)")
(add_net "Net-(C13-Pad2)")
(add_net "Net-(D2-Pad2)")
(add_net VCC)
155,17 → 163,17
(pad 2 smd rect (at -2.7 0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 2 VCC))
(pad 3 smd rect (at -2.7 -0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 9 /EN))
(net 8 /EN))
(pad 4 smd rect (at -2.7 -1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 4 "Net-(C11-Pad1)"))
(pad 5 smd rect (at 2.7 -1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 6 smd rect (at 2.7 -0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 7 "Net-(C13-Pad2)"))
(net 6 "Net-(C13-Pad2)"))
(pad 7 smd rect (at 2.7 0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 5 "Net-(C12-Pad1)"))
(pad 8 smd rect (at 2.7 1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask)
(net 8 "Net-(D2-Pad2)"))
(net 7 "Net-(D2-Pad2)"))
(model Housings_SOIC/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
191,7 → 199,7
(fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 12 /ADJ))
(net 11 /ADJ))
(pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model MLAB_3D/Resistors/chip_cms.wrl
219,7 → 227,7
(fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 11 /5V))
(net 10 /5V))
(pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model MLAB_3D/Resistors/chip_cms.wrl
247,7 → 255,7
(fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 10 /12V))
(net 9 /12V))
(pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model MLAB_3D/Resistors/chip_cms.wrl
258,7 → 266,7
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF819)
(at 23.368 -24.384 270)
(at 24.384 -24.384 270)
(path /57AB7990)
(attr smd)
(fp_text reference R3 (at 0 0.3175 270) (layer B.SilkS)
275,9 → 283,9
(fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 7 "Net-(C13-Pad2)"))
(net 6 "Net-(C13-Pad2)"))
(model MLAB_3D/Resistors/chip_cms.wrl
(at (xyz 0 0 0))
(scale (xyz 0.1 0.1 0.1))
286,7 → 294,7
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF813)
(at 22.352 -5.08 180)
(at 29.464 -11.176 180)
(path /57AB0D21)
(attr smd)
(fp_text reference R2 (at 0 0.3175 180) (layer B.SilkS)
305,7 → 313,7
(pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 2 VCC))
(pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 9 /EN))
(net 8 /EN))
(model MLAB_3D/Resistors/chip_cms.wrl
(at (xyz 0 0 0))
(scale (xyz 0.1 0.1 0.1))
314,7 → 322,7
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF80D)
(at 18.288 -8.636 180)
(at 24.384 -10.16 180)
(path /57AB49DB)
(attr smd)
(fp_text reference R1 (at 0 0.3175 180) (layer B.SilkS)
420,9 → 428,9
(fp_line (start 1.54 2.5) (end -7.46 2.5) (layer F.SilkS) (width 0.15))
(fp_line (start -7.46 -2.5) (end 1.54 -2.5) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at -2.46 0 270) (size 3.81 3.81) (drill 1.3) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(pad 1 thru_hole rect (at 2.54 0 270) (size 3.81 3.81) (drill 1.3) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
)
 
(module Mlab_CON:WAGO256 (layer F.Cu) (tedit 564C6037) (tstamp 57AAF7FB)
522,7 → 530,7
)
(fp_circle (center 0 0) (end 2.99974 0) (layer Cmts.User) (width 0.381))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
(clearance 1) (zone_connect 2))
)
 
(module Mlab_Mechanical:MountingHole_3mm placed (layer F.Cu) (tedit 5535DB2C) (tstamp 57AAF7EA)
538,7 → 546,7
)
(fp_circle (center 0 0) (end 2.99974 0) (layer Cmts.User) (width 0.381))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
(clearance 1) (zone_connect 2))
)
 
(module Mlab_Mechanical:MountingHole_3mm placed (layer F.Cu) (tedit 5535DB2C) (tstamp 57AAF7E5)
554,7 → 562,7
)
(fp_circle (center 0 0) (end 2.99974 0) (layer Cmts.User) (width 0.381))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
(clearance 1) (zone_connect 2))
)
 
(module Mlab_Mechanical:MountingHole_3mm placed (layer F.Cu) (tedit 5535DB2C) (tstamp 57AAF7E0)
570,7 → 578,7
)
(fp_circle (center 0 0) (end 2.99974 0) (layer Cmts.User) (width 0.381))
(pad 1 thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Adhes *.Mask)
(net 1 GND) (clearance 1) (zone_connect 2))
(clearance 1) (zone_connect 2))
)
 
(module Mlab_L:DE1205-10 (layer B.Cu) (tedit 564C61DE) (tstamp 57AAF7DB)
592,7 → 600,7
(pad 1 smd rect (at 5 0 180) (size 3 5.5) (layers B.Cu B.Paste B.Mask)
(net 2 VCC))
(pad 2 smd rect (at -5 0 180) (size 3 5.5) (layers B.Cu B.Paste B.Mask)
(net 8 "Net-(D2-Pad2)"))
(net 7 "Net-(D2-Pad2)"))
(model Capacitors_SMD/c_elec_10x10_5.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
659,7 → 667,7
)
 
(module Mlab_Pin_Headers:Straight_1x02 (layer F.Cu) (tedit 5535DB0D) (tstamp 57AAF7C9)
(at 12.7 -3.556)
(at 14.732 -4.064)
(descr "pin header straight 1x02")
(tags "pin header straight 1x02")
(path /57AC8608)
688,7 → 696,7
)
 
(module Mlab_Pin_Headers:Straight_1x02 (layer F.Cu) (tedit 5535DB0D) (tstamp 57AAF7C3)
(at 32.512 -5.588 180)
(at 32.512 -4.064 180)
(descr "pin header straight 1x02")
(tags "pin header straight 1x02")
(path /57AC848C)
706,9 → 714,9
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.15))
(pad 2 thru_hole rect (at 0 1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(pad 1 thru_hole rect (at 0 -1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(model Pin_Headers/Pin_Header_Straight_1x02.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
717,7 → 725,7
)
 
(module Mlab_Pin_Headers:Straight_1x02 (layer F.Cu) (tedit 5535DB0D) (tstamp 57AAF7BD)
(at 35.052 -5.588 180)
(at 35.052 -4.064 180)
(descr "pin header straight 1x02")
(tags "pin header straight 1x02")
(path /57AC7F68)
735,9 → 743,9
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.15))
(pad 2 thru_hole rect (at 0 1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(pad 1 thru_hole rect (at 0 -1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(model Pin_Headers/Pin_Header_Straight_1x02.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
746,7 → 754,7
)
 
(module Mlab_Pin_Headers:Straight_1x02 (layer F.Cu) (tedit 5535DB0D) (tstamp 57AAF7B7)
(at 37.592 -5.588 180)
(at 37.592 -4.064 180)
(descr "pin header straight 1x02")
(tags "pin header straight 1x02")
(path /57AC8508)
793,9 → 801,9
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.15))
(pad 2 thru_hole rect (at 0 1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 7 "Net-(C13-Pad2)"))
(net 6 "Net-(C13-Pad2)"))
(pad 1 thru_hole rect (at 0 -1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 12 /ADJ))
(net 11 /ADJ))
(model Pin_Headers/Pin_Header_Straight_1x02.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
822,9 → 830,9
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.15))
(pad 2 thru_hole rect (at 0 1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 7 "Net-(C13-Pad2)"))
(net 6 "Net-(C13-Pad2)"))
(pad 1 thru_hole rect (at 0 -1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 11 /5V))
(net 10 /5V))
(model Pin_Headers/Pin_Header_Straight_1x02.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
851,9 → 859,9
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.15))
(pad 2 thru_hole rect (at 0 1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 7 "Net-(C13-Pad2)"))
(net 6 "Net-(C13-Pad2)"))
(pad 1 thru_hole rect (at 0 -1.27 180) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 10 /12V))
(net 9 /12V))
(model Pin_Headers/Pin_Header_Straight_1x02.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
891,7 → 899,7
)
 
(module Mlab_Pin_Headers:Straight_1x02 (layer F.Cu) (tedit 5535DB0D) (tstamp 57AAF799)
(at 15.24 -3.556)
(at 17.272 -4.064)
(descr "pin header straight 1x02")
(tags "pin header straight 1x02")
(path /57AB1209)
909,9 → 917,9
(fp_line (start 1.27 2.54) (end -1.27 2.54) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.15))
(pad 2 thru_hole rect (at 0 1.27) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 9 /EN))
(net 8 /EN))
(pad 1 thru_hole rect (at 0 -1.27) (size 1.524 1.524) (drill 0.889) (layers *.Cu *.Mask F.SilkS)
(net 9 /EN))
(net 8 /EN))
(model Pin_Headers/Pin_Header_Straight_1x02.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
920,7 → 928,7
)
 
(module Mlab_Pin_Headers:Straight_1x02 (layer F.Cu) (tedit 5535DB0D) (tstamp 57AAF793)
(at 29.972 -5.588 180)
(at 29.972 -4.064 180)
(descr "pin header straight 1x02")
(tags "pin header straight 1x02")
(path /57AE17DB)
948,13 → 956,13
)
)
 
(module Mlab_D:Diode-SMB_Standard (layer B.Cu) (tedit 57AB3066) (tstamp 57AAF695)
(module Mlab_D:Diode-SMB_Standard (layer B.Cu) (tedit 57AC1E40) (tstamp 57AAF695)
(at 33.02 -27.94)
(descr "Diode SMB Standard")
(tags "Diode SMB Standard")
(path /57AB6FDC)
(attr smd)
(fp_text reference D3 (at 0 3.81) (layer B.SilkS)
(fp_text reference D3 (at 0 0) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_text value STPS340U (at 0 -3.81) (layer B.SilkS) hide
983,9 → 991,9
(fp_line (start -2.30124 1.99898) (end 2.30124 1.99898) (layer B.SilkS) (width 0.15))
(fp_line (start 2.30124 1.99898) (end 2.30124 1.80086) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at -2.14884 0) (size 2.49936 2.30124) (layers B.Cu B.Paste B.Mask)
(net 8 "Net-(D2-Pad2)"))
(net 7 "Net-(D2-Pad2)"))
(pad 1 smd rect (at 2.14884 0) (size 2.49936 2.30124) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(model MLAB_3D/Diodes/SMB.wrl
(at (xyz 0 0 0))
(scale (xyz 0.3937 0.3937 0.3937))
993,13 → 1001,13
)
)
 
(module Mlab_D:Diode-SMB_Standard (layer B.Cu) (tedit 57AB3066) (tstamp 57AAF68F)
(module Mlab_D:Diode-SMB_Standard (layer B.Cu) (tedit 57AC1E3E) (tstamp 57AAF68F)
(at 33.02 -34.544)
(descr "Diode SMB Standard")
(tags "Diode SMB Standard")
(path /57A9E080)
(attr smd)
(fp_text reference D2 (at 0 3.81) (layer B.SilkS)
(fp_text reference D2 (at 0 0) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_text value STPS340U (at 0 -3.81) (layer B.SilkS) hide
1028,9 → 1036,9
(fp_line (start -2.30124 1.99898) (end 2.30124 1.99898) (layer B.SilkS) (width 0.15))
(fp_line (start 2.30124 1.99898) (end 2.30124 1.80086) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at -2.14884 0) (size 2.49936 2.30124) (layers B.Cu B.Paste B.Mask)
(net 8 "Net-(D2-Pad2)"))
(net 7 "Net-(D2-Pad2)"))
(pad 1 smd rect (at 2.14884 0) (size 2.49936 2.30124) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(model MLAB_3D/Diodes/SMB.wrl
(at (xyz 0 0 0))
(scale (xyz 0.3937 0.3937 0.3937))
1038,13 → 1046,13
)
)
 
(module Mlab_D:Diode-SMA_Standard (layer B.Cu) (tedit 56BDB339) (tstamp 57AAF689)
(module Mlab_D:Diode-SMA_Standard (layer B.Cu) (tedit 57AC1E5D) (tstamp 57AAF689)
(at 11.176 -26.924 270)
(descr "Diode SMA")
(tags "Diode SMA")
(path /55622FB7)
(attr smd)
(fp_text reference D1 (at 0 3.81 270) (layer B.SilkS)
(fp_text reference D1 (at 0 0 270) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_text value M4 (at 0 -3.81 270) (layer B.SilkS) hide
1076,12 → 1084,12
)
)
 
(module Mlab_C:C_Radial_D10_L13_P5 (layer F.Cu) (tedit 57AAE85F) (tstamp 57AAF683)
(module Mlab_C:C_Radial_D10_L13_P5 (layer F.Cu) (tedit 57AC1A06) (tstamp 57AAF683)
(at 39.624 -26.416)
(descr "Radial Electrolytic Capacitor Diameter 10mm x Length 13mm, Pitch 5mm")
(tags "Electrolytic Capacitor")
(path /57AD05E7)
(fp_text reference C21 (at 2.5 -6.3) (layer F.SilkS)
(fp_text reference C21 (at 0.508 -3.048) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470uF/35V (at 2.5 6.3) (layer F.Fab)
1144,7 → 1152,7
(fp_circle (center 2.5 0) (end 2.5 -5.0375) (layer F.SilkS) (width 0.15))
(fp_circle (center 2.5 0) (end 2.5 -5.3) (layer F.CrtYd) (width 0.05))
(pad 1 thru_hole rect (at 0 0) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(pad 2 thru_hole circle (at 5 0) (size 1.3 1.3) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
(net 1 GND))
(model Capacitors_ThroughHole.3dshapes/C_Radial_D10_L13_P5.wrl
1155,13 → 1163,13
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF65F)
(at 25.908 -14.224 270)
(at 19.304 -24.384 90)
(path /57AB999F)
(attr smd)
(fp_text reference C15 (at 0 0.3175 270) (layer B.SilkS)
(fp_text reference C15 (at 0 0.3175 90) (layer B.SilkS)
(effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror))
)
(fp_text value 470pF (at 0.127 -0.381 270) (layer B.SilkS)
(fp_text value 470pF (at 0.127 -0.381 90) (layer B.SilkS)
(effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror))
)
(fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.15))
1171,9 → 1179,9
(fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 7 "Net-(C13-Pad2)"))
(pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(C13-Pad2)"))
(pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model MLAB_3D/Resistors/chip_cms.wrl
(at (xyz 0 0 0))
1183,13 → 1191,13
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF659)
(at 37.592 -21.844)
(at 37.1475 -21.844 180)
(path /57ACD8E9)
(attr smd)
(fp_text reference C14 (at 0 0.3175) (layer B.SilkS)
(fp_text reference C14 (at 0 0.3175 180) (layer B.SilkS)
(effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror))
)
(fp_text value 10uF/16V (at 0.127 -0.381) (layer B.SilkS)
(fp_text value 10uF/16V (at 0.127 -0.381 180) (layer B.SilkS)
(effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror))
)
(fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.15))
1199,9 → 1207,9
(fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(C13-Pad1)"))
(pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 12 /Vout))
(pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model MLAB_3D/Resistors/chip_cms.wrl
(at (xyz 0 0 0))
1211,7 → 1219,7
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF653)
(at 20.828 -24.384 270)
(at 21.844 -24.384 270)
(path /57AB9D7B)
(attr smd)
(fp_text reference C13 (at 0 0.3175 270) (layer B.SilkS)
1228,9 → 1236,9
(fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(C13-Pad1)"))
(net 12 /Vout))
(pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 7 "Net-(C13-Pad2)"))
(net 6 "Net-(C13-Pad2)"))
(model MLAB_3D/Resistors/chip_cms.wrl
(at (xyz 0 0 0))
(scale (xyz 0.1 0.1 0.1))
1239,7 → 1247,7
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF64D)
(at 28.448 -24.384 180)
(at 27.94 -24.384 180)
(path /57AB88F4)
(attr smd)
(fp_text reference C12 (at 0 0.3175 180) (layer B.SilkS)
1267,7 → 1275,7
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF647)
(at 18.796 -5.588 270)
(at 25.908 -7.112 270)
(path /57AB4CFF)
(attr smd)
(fp_text reference C11 (at 0 0.3175 270) (layer B.SilkS)
1295,7 → 1303,7
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF641)
(at 16.256 -5.588 270)
(at 23.368 -7.112 270)
(path /57AB3BCB)
(attr smd)
(fp_text reference C10 (at 0 0.3175 270) (layer B.SilkS)
1323,7 → 1331,7
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AAF63B)
(at 22.352 -7.62)
(at 33.02 -11.176)
(path /57AD7B4E)
(attr smd)
(fp_text reference C9 (at 0 0.3175) (layer B.SilkS)
1406,13 → 1414,13
)
)
 
(module Mlab_C:TantalC_SizeD_Reflow (layer B.Cu) (tedit 54BBE3ED) (tstamp 57AAF60B)
(module Mlab_C:TantalC_SizeD_Reflow (layer B.Cu) (tedit 57AC1E7A) (tstamp 57AAF60B)
(at 15.748 -18.796 270)
(descr "Tantal Cap. , Size D, EIA-7343, Reflow,")
(tags "Tantal Cap. , Size D, EIA-7343, Reflow,")
(path /55623093)
(attr smd)
(fp_text reference C1 (at -0.20066 3.29946 270) (layer B.SilkS)
(fp_text reference C1 (at 0 0 270) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_text value 470uF (at -0.09906 -3.59918 270) (layer B.SilkS) hide
1438,13 → 1446,13
)
 
(module Mlab_R:SMD-0805 (layer B.Cu) (tedit 54799E0C) (tstamp 57AB38F3)
(at 30.988 -9.652 180)
(at 37.1475 -8.636)
(path /57ABFFB2)
(attr smd)
(fp_text reference C4 (at 0 0.3175 180) (layer B.SilkS)
(fp_text reference C4 (at 0 0.3175) (layer B.SilkS)
(effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror))
)
(fp_text value 10uF/16V (at 0.127 -0.381 180) (layer B.SilkS)
(fp_text value 10uF/16V (at 0.127 -0.381) (layer B.SilkS)
(effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror))
)
(fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.15))
1454,9 → 1462,9
(fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.15))
(fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(C13-Pad1)"))
(pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 12 /Vout))
(pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model MLAB_3D/Resistors/chip_cms.wrl
(at (xyz 0 0 0))
1465,9 → 1473,864
)
)
 
(module Mlab_C:TantalC_SizeD_Reflow (layer B.Cu) (tedit 57AC1E4D) (tstamp 57AC0E6D)
(at 45.212 -28.956)
(descr "Tantal Cap. , Size D, EIA-7343, Reflow,")
(tags "Tantal Cap. , Size D, EIA-7343, Reflow,")
(path /57AC2016)
(attr smd)
(fp_text reference C5 (at 0 0) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_text value 220uF (at -0.09906 -3.59918) (layer B.SilkS) hide
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_line (start -5.00126 2.19964) (end -5.00126 -2.19964) (layer B.SilkS) (width 0.15))
(fp_line (start -4.50088 -2.19964) (end 4.50088 -2.19964) (layer B.SilkS) (width 0.15))
(fp_line (start 4.50088 2.19964) (end -4.50088 2.19964) (layer B.SilkS) (width 0.15))
(fp_text user + (at -5.6515 2.79908) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_line (start -5.65404 3.302) (end -5.65404 2.20218) (layer B.SilkS) (width 0.15))
(fp_line (start -6.25348 2.80162) (end -5.0546 2.80162) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 3.175 0) (size 2.55016 2.70002) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -3.175 0) (size 2.55016 2.70002) (layers B.Cu B.Paste B.Mask)
(net 12 /Vout))
(model MLAB_3D/Capacitors/c_tant_D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
 
(module Mlab_C:TantalC_SizeD_Reflow (layer B.Cu) (tedit 57AC1E52) (tstamp 57AC0E85)
(at 45.212 -23.368)
(descr "Tantal Cap. , Size D, EIA-7343, Reflow,")
(tags "Tantal Cap. , Size D, EIA-7343, Reflow,")
(path /57AC309B)
(attr smd)
(fp_text reference C7 (at 0 0) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_text value 220uF (at -0.09906 -3.59918) (layer B.SilkS) hide
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_line (start -5.00126 2.19964) (end -5.00126 -2.19964) (layer B.SilkS) (width 0.15))
(fp_line (start -4.50088 -2.19964) (end 4.50088 -2.19964) (layer B.SilkS) (width 0.15))
(fp_line (start 4.50088 2.19964) (end -4.50088 2.19964) (layer B.SilkS) (width 0.15))
(fp_text user + (at -5.6515 2.79908) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(fp_line (start -5.65404 3.302) (end -5.65404 2.20218) (layer B.SilkS) (width 0.15))
(fp_line (start -6.25348 2.80162) (end -5.0546 2.80162) (layer B.SilkS) (width 0.15))
(pad 2 smd rect (at 3.175 0) (size 2.55016 2.70002) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -3.175 0) (size 2.55016 2.70002) (layers B.Cu B.Paste B.Mask)
(net 12 /Vout))
(model MLAB_3D/Capacitors/c_tant_D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
 
(gr_text MLAB (at 18.796 -8.636) (layer B.Cu)
(effects (font (size 1.2 1.2) (thickness 0.3)) (justify mirror))
)
(gr_text "MAX 5.5V" (at 9.144 -26.416 270) (layer F.SilkS)
(effects (font (size 1.2 1.2) (thickness 0.3)))
)
(gr_text "POWER IN" (at 11.176 -26.416 270) (layer F.SilkS)
(effects (font (size 1.2 1.2) (thickness 0.3)))
)
(gr_text GND (at 12.192 -4.064 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text EN (at 19.812 -4.064 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text - (at 15.748 -12.192) (layer F.SilkS)
(effects (font (size 2 2) (thickness 0.3)))
)
(gr_text - (at 31.496 -12.7) (layer F.SilkS)
(effects (font (size 2 2) (thickness 0.3)))
)
(gr_text + (at 15.748 -17.78) (layer F.SilkS)
(effects (font (size 2 2) (thickness 0.3)))
)
(gr_text + (at 31.496 -17.78) (layer F.SilkS)
(effects (font (size 2 2) (thickness 0.3)))
)
(gr_text "POWER OUT" (at 34.036 -8.128) (layer F.SilkS)
(effects (font (size 1.2 1.2) (thickness 0.3)))
)
(gr_text ADJ (at 25.4 -16.256 270) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
)
(gr_text 12V (at 22.86 -16.256 270) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
)
(gr_text 5V (at 20.32 -16.256 270) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
)
(gr_text "SET OUTPUT" (at 22.86 -23.368) (layer F.SilkS)
(effects (font (size 1.2 1.2) (thickness 0.3)))
)
(gr_text JACHO (at 40.64 -5.08 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text 2016 (at 40.132 -36.068 90) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text MLAB.CZ (at 24.892 -35.052) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_text UPCONV01A (at 24.892 -32.512) (layer F.SilkS)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(gr_line (start 0.254 -0.254) (end 0.254 -40.386) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 50.546 -0.254) (end 0.254 -0.254) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 50.546 -40.386) (end 50.546 -0.254) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 0.254 -40.386) (end 50.546 -40.386) (angle 90) (layer Edge.Cuts) (width 0.15))
 
(segment (start 8.636 -8.128) (end 10.16 -8.128) (width 0.6) (layer B.Cu) (net 1))
(via (at 10.16 -8.128) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 1))
(segment (start 9.652 -6.096) (end 9.652 -7.112) (width 0.6) (layer F.Cu) (net 1))
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(segment (start 9.144 -3.048) (end 9.652 -3.556) (width 0.6) (layer F.Cu) (net 1))
(segment (start 11.684 -8.128) (end 11.684 -4.064) (width 0.6) (layer B.Cu) (net 1))
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(segment (start 14.732 -7.112) (end 12.7 -7.112) (width 0.6) (layer F.Cu) (net 1))
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(via (at 23.368 -27.94) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 1))
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/Modules/PowerSupply/UPCONV01A/SCH_PCB/UPCONV01A.net
1,7 → 1,7
(export (version D)
(design
(source C:/Chroust/Zaloha/stare/MLAB/Modules/PowerSupply/UPCONV01A/SCH_PCB/UPCONV01A.sch)
(date "10. 8. 2016 16:09:13")
(date "11. 8. 2016 8:06:43")
(tool "Eeschema 4.0.3-stable")
(sheet (number 1) (name /) (tstamps /)
(title_block
272,7 → 272,19
(footprint Mlab_R:SMD-0805)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 57ABFFB2)))
(tstamp 57ABFFB2))
(comp (ref C5)
(value 220uF)
(footprint Mlab_C:TantalC_SizeD_Reflow)
(libsource (lib device) (part CP_Small))
(sheetpath (names /) (tstamps /))
(tstamp 57AC2016))
(comp (ref C7)
(value 220uF)
(footprint Mlab_C:TantalC_SizeD_Reflow)
(libsource (lib device) (part CP_Small))
(sheetpath (names /) (tstamps /))
(tstamp 57AC309B)))
(libparts
(libpart (lib device) (part CP_Small)
(description "Polarised capacitor")
398,111 → 410,119
(pins
(pin (num 1) (name P1) (type passive)))))
(libraries
(library (logical MLAB_Jumpers)
(uri C:\Chroust\Zaloha\stare\kicad-mlab\symbols\MLAB_Jumpers.lib))
(library (logical MLAB_D)
(uri C:\Chroust\Zaloha\stare\kicad-mlab\symbols\MLAB_D.lib))
(library (logical MLAB_IO)
(uri C:\Chroust\Zaloha\stare\kicad-mlab\symbols\MLAB_IO.lib))
(library (logical MLAB_Jumpers)
(uri C:\Chroust\Zaloha\stare\kicad-mlab\symbols\MLAB_Jumpers.lib))
(library (logical device)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\device.lib"))
(library (logical mlab_mechanical)
(uri C:\Chroust\Zaloha\stare\kicad-mlab\symbols\mlab_mechanical.lib)))
(nets
(net (code 1) (name VCC)
(node (ref J11) (pin 1))
(node (ref D1) (pin 1))
(node (ref U1) (pin 2))
(node (ref L1) (pin 1))
(node (ref C2) (pin 1))
(node (ref C9) (pin 1))
(node (ref C1) (pin 1))
(node (ref P1) (pin 1))
(node (ref C3) (pin 1))
(node (ref R2) (pin 1))
(node (ref J11) (pin 2)))
(net (code 2) (name GND)
(node (ref C21) (pin 2))
(net (code 1) (name GND)
(node (ref C2) (pin 2))
(node (ref C1) (pin 2))
(node (ref P4) (pin 1))
(node (ref C14) (pin 2))
(node (ref M3) (pin 1))
(node (ref C7) (pin 2))
(node (ref C5) (pin 2))
(node (ref J12) (pin 1))
(node (ref C10) (pin 2))
(node (ref C4) (pin 2))
(node (ref J12) (pin 2))
(node (ref C3) (pin 2))
(node (ref C9) (pin 2))
(node (ref U1) (pin 1))
(node (ref U1) (pin 5))
(node (ref U1) (pin 9))
(node (ref M1) (pin 1))
(node (ref M2) (pin 1))
(node (ref M4) (pin 1))
(node (ref J1) (pin 2))
(node (ref J1) (pin 1))
(node (ref J3) (pin 1))
(node (ref J3) (pin 2))
(node (ref P2) (pin 1))
(node (ref C2) (pin 2))
(node (ref U1) (pin 1))
(node (ref C21) (pin 2))
(node (ref D1) (pin 2))
(node (ref U1) (pin 5))
(node (ref J3) (pin 2))
(node (ref R5) (pin 2))
(node (ref R6) (pin 2))
(node (ref C15) (pin 2))
(node (ref C11) (pin 2))
(node (ref C10) (pin 2))
(node (ref P4) (pin 1))
(node (ref C14) (pin 2))
(node (ref J10) (pin 2))
(node (ref J3) (pin 1))
(node (ref C15) (pin 2))
(node (ref R6) (pin 2))
(node (ref R5) (pin 2))
(node (ref J10) (pin 1))
(node (ref J7) (pin 2))
(node (ref J7) (pin 1))
(node (ref R4) (pin 2))
(node (ref C3) (pin 2))
(node (ref J7) (pin 1))
(node (ref J7) (pin 2))
(node (ref J10) (pin 1))
(node (ref C9) (pin 2))
(node (ref J1) (pin 1))
(node (ref J1) (pin 2))
(node (ref J12) (pin 1))
(node (ref C12) (pin 2))
(node (ref C4) (pin 2))
(node (ref J12) (pin 2)))
(net (code 3) (name /12V)
(node (ref J4) (pin 1))
(node (ref R4) (pin 1)))
(net (code 4) (name /ADJ)
(node (ref R6) (pin 1))
(node (ref J6) (pin 1)))
(net (code 5) (name /5V)
(node (ref R5) (pin 1))
(node (ref J5) (pin 1)))
(net (code 6) (name "Net-(C13-Pad2)")
(node (ref C15) (pin 1))
(node (ref C13) (pin 2))
(node (ref R3) (pin 2))
(node (ref J6) (pin 2))
(node (ref J5) (pin 2))
(node (ref J4) (pin 2))
(node (ref U1) (pin 6)))
(net (code 8) (name "Net-(C13-Pad1)")
(node (ref J8) (pin 1))
(node (ref P3) (pin 1))
(node (ref C12) (pin 2)))
(net (code 2) (name VCC)
(node (ref R2) (pin 1))
(node (ref D1) (pin 1))
(node (ref C2) (pin 1))
(node (ref C1) (pin 1))
(node (ref J11) (pin 1))
(node (ref C9) (pin 1))
(node (ref P1) (pin 1))
(node (ref C3) (pin 1))
(node (ref J11) (pin 2))
(node (ref L1) (pin 1))
(node (ref U1) (pin 2)))
(net (code 3) (name /Vout)
(node (ref C5) (pin 1))
(node (ref C7) (pin 1))
(node (ref R3) (pin 1))
(node (ref C4) (pin 1))
(node (ref C14) (pin 1))
(node (ref C13) (pin 1))
(node (ref J8) (pin 2))
(node (ref C13) (pin 1))
(node (ref J9) (pin 1))
(node (ref J8) (pin 1))
(node (ref D2) (pin 1))
(node (ref J9) (pin 2))
(node (ref C4) (pin 1))
(node (ref P3) (pin 1))
(node (ref D3) (pin 1))
(node (ref C14) (pin 1))
(node (ref D2) (pin 1))
(node (ref R3) (pin 1))
(node (ref C21) (pin 1)))
(net (code 4) (name /12V)
(node (ref R4) (pin 1))
(node (ref J4) (pin 1)))
(net (code 5) (name /5V)
(node (ref R5) (pin 1))
(node (ref J5) (pin 1)))
(net (code 6) (name /ADJ)
(node (ref R6) (pin 1))
(node (ref J6) (pin 1)))
(net (code 8) (name "Net-(C12-Pad1)")
(node (ref C12) (pin 1))
(node (ref U1) (pin 7)))
(net (code 9) (name /EN)
(node (ref U1) (pin 3))
(node (ref R2) (pin 2))
(node (ref J2) (pin 1))
(node (ref J2) (pin 2)))
(net (code 10) (name "Net-(D2-Pad2)")
(net (code 10) (name "Net-(M1-Pad1)")
(node (ref M1) (pin 1)))
(net (code 11) (name "Net-(M2-Pad1)")
(node (ref M2) (pin 1)))
(net (code 12) (name "Net-(M3-Pad1)")
(node (ref M3) (pin 1)))
(net (code 13) (name "Net-(M4-Pad1)")
(node (ref M4) (pin 1)))
(net (code 14) (name "Net-(C13-Pad2)")
(node (ref J5) (pin 2))
(node (ref U1) (pin 6))
(node (ref C15) (pin 1))
(node (ref R3) (pin 2))
(node (ref C13) (pin 2))
(node (ref J4) (pin 2))
(node (ref J6) (pin 2)))
(net (code 15) (name "Net-(C10-Pad1)")
(node (ref R1) (pin 2))
(node (ref C10) (pin 1)))
(net (code 16) (name "Net-(C11-Pad1)")
(node (ref C11) (pin 1))
(node (ref R1) (pin 1))
(node (ref U1) (pin 4)))
(net (code 17) (name "Net-(D2-Pad2)")
(node (ref U1) (pin 8))
(node (ref D2) (pin 2))
(node (ref L1) (pin 2))
(node (ref D3) (pin 2))
(node (ref U1) (pin 8)))
(net (code 11) (name "Net-(C12-Pad1)")
(node (ref U1) (pin 7))
(node (ref C12) (pin 1)))
(net (code 12) (name "Net-(C11-Pad1)")
(node (ref R1) (pin 1))
(node (ref U1) (pin 4))
(node (ref C11) (pin 1)))
(net (code 13) (name "Net-(C10-Pad1)")
(node (ref R1) (pin 2))
(node (ref C10) (pin 1)))))
(node (ref D3) (pin 2)))))
/Modules/PowerSupply/UPCONV01A/SCH_PCB/UPCONV01A.sch
170,32 → 170,6
1 10400 5950
0 -1 -1 0
$EndComp
$Comp
L GND #PWR03
U 1 1 549D770F
P 10600 5900
F 0 "#PWR03" H 10600 5650 60 0001 C CNN
F 1 "GND" H 10600 5750 60 0000 C CNN
F 2 "" H 10600 5900 60 0000 C CNN
F 3 "" H 10600 5900 60 0000 C CNN
1 10600 5900
1 0 0 -1
$EndComp
Wire Wire Line
10600 5900 10600 5850
Wire Wire Line
10600 5850 9800 5850
Wire Wire Line
9800 5850 9800 5900
Wire Wire Line
10000 5900 10000 5850
Connection ~ 10000 5850
Wire Wire Line
10200 5900 10200 5850
Connection ~ 10200 5850
Wire Wire Line
10400 5900 10400 5850
Connection ~ 10400 5850
Wire Notes Line
9700 5800 10700 5800
Wire Notes Line
1029,4 → 1003,62
Wire Wire Line
6350 3100 6350 2950
Connection ~ 6350 2950
Text Label 6600 2950 0 60 ~ 0
Vout
$Comp
L CP_Small C5
U 1 1 57AC2016
P 7150 4100
F 0 "C5" H 7150 4200 50 0000 L CNN
F 1 "220uF" H 7150 4000 50 0000 L CNN
F 2 "Mlab_C:TantalC_SizeD_Reflow" H 7150 4100 60 0001 C CNN
F 3 "" H 7150 4100 60 0000 C CNN
1 7150 4100
1 0 0 -1
$EndComp
$Comp
L CP_Small C7
U 1 1 57AC309B
P 7700 4100
F 0 "C7" H 7700 4200 50 0000 L CNN
F 1 "220uF" H 7700 4000 50 0000 L CNN
F 2 "Mlab_C:TantalC_SizeD_Reflow" H 7700 4100 60 0001 C CNN
F 3 "" H 7700 4100 60 0000 C CNN
1 7700 4100
1 0 0 -1
$EndComp
$Comp
L GND #PWR022
U 1 1 57AC349F
P 7150 4250
F 0 "#PWR022" H 7150 4000 60 0001 C CNN
F 1 "GND" H 7150 4100 60 0000 C CNN
F 2 "" H 7150 4250 60 0000 C CNN
F 3 "" H 7150 4250 60 0000 C CNN
1 7150 4250
1 0 0 -1
$EndComp
$Comp
L GND #PWR023
U 1 1 57AC35CF
P 7700 4250
F 0 "#PWR023" H 7700 4000 60 0001 C CNN
F 1 "GND" H 7700 4100 60 0000 C CNN
F 2 "" H 7700 4250 60 0000 C CNN
F 3 "" H 7700 4250 60 0000 C CNN
1 7700 4250
1 0 0 -1
$EndComp
Text Label 7150 3900 0 60 ~ 0
Vout
Text Label 7700 3900 0 60 ~ 0
Vout
Wire Wire Line
7150 4250 7150 4200
Wire Wire Line
7700 4250 7700 4200
Wire Wire Line
7150 4000 7150 3900
Wire Wire Line
7700 4000 7700 3900
$EndSCHEMATC