{HEADER END}
{COMPARE START}

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Toto porovnání ukazuje změny pro převedení /Designs/HOPEwireless (Revize 1095) na /Designs/HOPEwireless (Revize 1096)

Reverzní porovnání

SW_RX_RFM01/atmel/RX_RFM01.c
Nový soubor

@@ -0,0 +1,245 @@

/* mija 2008
demo for RFM01 - RX 868MHz
CPU ATMEGA8
fcpu = 1MHz
!! define PIN,PORT,DDR for IOpin !!
tested with module RFM12B - TX,9600,Fdev 15kHz
*/
#include <avr/io.h>
#include <util/delay.h>
#include "RFM01.h"
//************************************************************************
#define SDI PB3
#define SDI_PORT PORTB
#define SDI_DDR DDRB
#define FSK PC1
#define FSK_PORT PORTC
#define FSK_DDR DDRC
#define SDO PB4 // input for mega
#define SDO_PORT PORTB
#define SDO_DDR DDRB
#define SDO_PIN PINB
#define SCK PB5
#define SCK_PORT PORTB
#define SCK_DDR DDRB
#define nIRQ PD2 // input for mega
#define nIRQ_PORT PORTD
#define nIRQ_DDR DDRD
#define nIRQ_PIN PIND
#define nSEL PB2
#define nSEL_PORT PORTB
#define nSEL_DDR DDRB
#define LED PD3
#define LED_PORT PORTD
#define LED_DDR DDRD
// interni
#define SDI_H SDI_PORT |= _BV(SDI)
#define SDI_L SDI_PORT &= (~(_BV(SDI)))
#define SDI_INIT SDI_DDR |= _BV(SDI)
#define FSK_H FSK_PORT |= _BV(FSK)
#define FSK_L FSK_PORT &= (~(_BV(FSK)))
#define FSK_INIT FSK_DDR |= _BV(FSK)
#define SDO_INPUT (SDO_PIN & _BV(SDO))
#define SDO_INIT SDO_DDR &= (~(_BV(SDO)))
#define SCK_H SCK_PORT |= _BV(SCK)
#define SCK_L SCK_PORT &= (~(_BV(SCK)))
#define SCK_INIT SCK_DDR |= _BV(SCK)
#define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ))
#define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ)))
#define nSEL_H nSEL_PORT |= _BV(nSEL)
#define nSEL_L nSEL_PORT &= (~(_BV(nSEL)))
#define nSEL_INIT nSEL_DDR |= _BV(nSEL)
#define LED_H LED_PORT |= _BV(LED)
#define LED_L LED_PORT &= (~(_BV(LED)))
#define LED_INIT LED_DDR |= _BV(LED)
#define START_FIFO RF_WRITE_CMD(CMD_FIFO|FIFO_8|FIFO_VDI_WORD|FIFO_FF|FIFO_FE)
#define STOP_FIFO RF_WRITE_CMD(CMD_FIFO)
//************************************************************************
uint8_t rx_buf[16];
//************************************************************************
void delay_ms(uint16_t time)
{
while(time--) _delay_ms(1);
}
void IO_INIT(void)
{
SDI_INIT;
SDO_INIT;
SCK_INIT;
nIRQ_INIT;
nSEL_INIT;
FSK_INIT;
LED_INIT;
}
void RF_INIT(void)
{
nSEL_H;
SDI_H;
SCK_L;
nIRQ_INPUT;
SDO_INPUT;
FSK_H;
}
uint16_t RF_WRITE_CMD(uint16_t cmd)
{
uint8_t i;
uint16_t temp;
SCK_L;
nSEL_L;
temp=0;
for (i=0;i<16;i++)
{
if (cmd & 0x8000) SDI_H;
else SDI_L;
SCK_H;
cmd <<= 1;
temp <<= 1;
if(SDO_INPUT) temp |= 0x0001;
SCK_L;
}
SCK_L;
nSEL_H;
return (temp);
}
void RF_WRITE_DATA(uint8_t data)
{
while (nIRQ_INPUT);
RF_WRITE_CMD(0xB800 + data);
}
uint8_t RF_READ_DATA(void)
{
uint8_t i,result;
while (nIRQ_INPUT);
SCK_L;
nSEL_L;
SDI_L;
result=0;
for (i=0;i<24;i++)
{
result <<= 1;
if (SDO_INPUT) result |= 0x01;
SCK_H;
SCK_L;
}
nSEL_H;
return (result);
}
void RS232_INIT(void)
{
//set baud rate 9600 8N1 for Fosc 1MHz
UBRRH = 0;
UBRRL = 12;
UCSRB = (1<<RXEN)|(1<<TXEN); //enable RX TX
UCSRC = (1<<URSEL) |(3<<UCSZ0); //8N1
UCSRA |= _BV(U2X);
}
void put_rs232(char data)
{
// Wait for empty transmit buffer
while ( !( UCSRA & (1<<UDRE)) );
// Put data into buffer, sends the data
UDR = data;
}
int main()
{
uint8_t i,ChkSum;
uint8_t LED_TRG;
uint8_t b;
IO_INIT();
RS232_INIT();
RF_INIT();
delay_ms(100);
LED_L;
LED_TRG=0;
RF_WRITE_CMD(CMD_SETTING |BAND_868 | C_12pF | BANDWIDTH_67 | SETTING_DC);
RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868);
RF_WRITE_CMD(CMD_RATE |RATE_9600);
RF_WRITE_CMD(CMD_FILTER |FILTER_AL | FILTER_S0 | DQD_4);
RF_WRITE_CMD(CMD_AFC |AFC_POWER_ON | AFC_RANG_8 | AFC_ST | AFC_OE | AFC_EN);
RF_WRITE_CMD(CMD_RX);
RF_WRITE_CMD(CMD_RX |VDI_CLOCK | LNA_GAIN_0 | DRSSI_103 | RX_EN);
RF_WRITE_CMD(CMD_FIFO);
while (1)
{
START_FIFO;
ChkSum = 0;
for (i=0;i<16;i++)
{
b = RF_READ_DATA();
rx_buf[i] = b;
ChkSum += b;
}
b = RF_READ_DATA();
RF_READ_DATA();
STOP_FIFO;
for (i=0;i<16;i++)
{
put_rs232(rx_buf[i]);
delay_ms(2);
}
if (ChkSum == b)
{
LED_TRG = ~ LED_TRG;
put_rs232(' ');
put_rs232('o');
put_rs232('k');
}
else
{
put_rs232('\n');
delay_ms(2);
put_rs232('\r');
delay_ms(2);
put_rs232('e');
put_rs232('r');
put_rs232('r');
}
if (LED_TRG) LED_H;
else LED_L;
}
return 0;
}


SW_RX_RFM01/atmel/RX_RFM01.hex
Nový soubor

@@ -0,0 +1,34 @@

:1000000012C02CC02BC02AC029C028C027C026C0BF
:1000100025C024C023C022C021C020C01FC01EC0D4
:100020001DC01CC01BC011241FBECFE5D4E0DEBF25
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:10006000892B59F020E030E08AEF90E00197F1F71A
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:100190009EEC83DF8501E301FF24A0DF8993F80E45
:1001A000CC15DD05D1F79ADFE82E98DF80E09EECD4
:1001B00074DFF80181918F01ACDF82E090E04FDFC6
:1001C000C017D107B1F7FE1441F4909480E2A1DF8B
:1001D0008FE69FDF8BE69DDF10C08AE09ADF82E02A
:1001E00090E03DDF8DE095DF82E090E038DF85E64E
:1001F00090DF82E78EDF82E78CDF992011F0939AFF
:08020000C6CF9398C4CFFFCFD5
:00000001FF


SW_RX_RFM01/atmel/RFM01.h
Nový soubor

@@ -0,0 +1,135 @@

/* mija 2008
defines for module RFM01 - RX 868MHz
*/
#define CMD_SETTING 0x8000 // b1, b0, eb, et, ex, x3..x0, i2..i0, dc
#define CMD_FREQUENCY 0xA000 // f11..f0 860+F*0.005 MHz 36..3903
#define CMD_RATE 0xC800 // cs, r6..r0 BR=10M/29/(R+1)/1+cs*7)
#define CMD_RX 0xC000 // d1, d0, g1, g0, r2..r0, en
#define CMD_FILTER 0xC420 // al, ml, s1, s0, f2..f0
#define CMD_FIFO 0xCE00 // f3..f0, s1, s0, ff, fe
#define CMD_AFC 0xC600 // a1, a0, rl1, rl0, st, fi, oe, en
#define CMD_WAKE_UP 0xE000 // r4..r0, m7..m0 T=M*2^R [ms]
#define CMD_DUTY 0xCC00 // d6..d0 D.C.= (D*2+1)/M*100%
#define CMD_BATTERY 0xC200 // d2..d0, t4..t0
#define CMD_STATUS 0x0000 // for read status
// CMD_SETTING
#define BAND_315 0x0000
#define BAND_433 0x800
#define BAND_868 0x1000
#define BADN_915 0x1800
#define SETTING_EB 0x400 // enable low battery detect
#define SETTING_ET 0x200 // enable wake-up timer
#define SETTING_EX 0x100 // enable crystal oscilator
#define C_8_5pF 0x00
#define C_9pF 0x10
#define C_9_5pF 0x20
#define C_10pF 0x30
#define C_10_5pF 0x40
#define C_11pF 0x50
#define C_11_5pF 0x60
#define C_12pF 0x70
#define C_12_5pF 0x80
#define C_13pF 0x90
#define C_13_5pF 0xA0
#define C_14pF 0xB0
#define C_14_5pF 0xC0
#define C_15pF 0xD0
#define C_15_5pF 0xE0
#define C_16pF 0xF0
#define BANDWIDTH_400 0x02 // baseband bandwidth[kHz]
#define BANDWIDTH_340 0x04
#define BANDWIDTH_270 0x06
#define BANDWIDTH_200 0x08
#define BANDWIDTH_134 0x0A
#define BANDWIDTH_67 0x0C
#define SETTING_DC 0x01 // disable siglanl of CLK pin
// CMD_FREQUENCY
#define FREQUENCY_867 0x578
#define FREQUENCY_868 0x640
#define FREQUENCY_869 0x708
// CMD_RATE
#define RATE_1200 0x123
#define RATE_2400 0x8F
#define RATE_4800 0x47
#define RATE_CS_4800 0x108
#define RATE_9600 0x23
#define RATE_19200 0x11
#define RATE_38400 0x8
#define RATE_57600 0x5
#define RATE_115200 0x2
// CMD_RX
#define VDI_RSSI 0x00 // VDI response time
#define VDI_DQD 0x40
#define VDI_CLOCK 0x80
#define VDI_ALWAYS_ON 0xC0
#define LNA_GAIN_0 0x00 // LNA_GAIN
#define LNA_GAIN_6 0x10 // -6dBm
#define LNA_GAIN_14 0x20 // -14dBm
#define LNA_GAIN_20 0x30 // -20dBm
#define DRSSI_103 0x00 // RSSI= DRSSI + LNA_GAIN -103dBm
#define DRSSI_97 0x02 // -97dBm
#define DRSSI_91 0x04 // -91dBm
#define DRSSI_85 0x06 // -85dBm
#define DRSSI_79 0x08 // -79dBm
#define DRSSI_73 0x0A // -73dBm
#define DRSSI_67 0x0C // -67dBm
#define DRSSI_61 0x0E // -61dBm
#define RX_EN 0x01 // enablel receiver
// CMD_FILTER
#define FILTER_AL 0x80 // enable clock recovery atuo-lock
#define FILTER_ML 0x40 // enable clock recovery fast mode
#define FILTER_S0 0x08 // enable digital filter
#define DQD_7 0x7
#define DQD_6 0x6
#define DQD_5 0x5
#define DQD_4 0x4
#define DQD_3 0x3
#define DQD_2 0x2
#define DQD_1 0x1
#define DQD_0 0x0
// CMD_FIFO
#define FIFO_16 0x00 // FIFO level
#define FIFO_15 0xF0
#define FIFO_14 0xE0
#define FIFO_13 0xD0
#define FIFO_12 0xC0
#define FIFO_11 0xB0
#define FIFO_10 0xA0
#define FIFO_9 0x90
#define FIFO_8 0x80
#define FIFO_7 0x70
#define FIFO_6 0x60
#define FIFO_5 0x50
#define FIFO_4 0x40
#define FIFO_3 0x30
#define FIFO_2 0x20
#define FIFO_1 0x10
#define FIFO_VDI 0x00 // FIFO start VDI
#define FIFO_SYNC_WORD 0x04 //
#define FIFO_VDI_WORD 0x08 //
#define FIFO_ALWAYS 0x0C //
#define FIFO_FF 0x02 // enable FIFO fill
#define FIFO_FE 0x01 // enable FIFO function
// CMD_AFC
#define AFC_MCU 0x00 // AFC auto_mode by MCU
#define AFC_POWER_ON 0x40 // AFC at poweron
#define AFC_OFFSET 0x80 // AFC keep offset when VDI hi
#define AFC_VDI 0xC0 // AFC keeps independently from VDI
#define AFC_NORESTR 0x00 // range limit no restriction
#define AFC_RANG_16 0x10 // range limit +15/-16
#define AFC_RANG_8 0x20 // range limit +7/-8
#define AFC_RANG_4 0x30 // range limit +3/-4
#define AFC_ST 0x08 // store offset into outpur register
#define AFC_FI 0x04 // enable AFC hi accuracy mode
#define AFC_OE 0x02 // enable AFC output register
#define AFC_EN 0x01 // enable AFC function


SW_TX_RFM02/atmel/TX_RFM02.hex
Nový soubor

@@ -0,0 +1,39 @@

:100000000C942A000C9447000C9447000C94470071
:100010000C9447000C9447000C9447000C94470044
:100020000C9447000C9447000C9447000C94470034
:100030000C9447000C9447000C9447000C94470024
:100040000C9447000C9447000C9447000C94470014
:100050000C94470011241FBECFE5D4E0DEBFCDBF16
:1000600010E0A0E6B0E0EEE3F2E002C005900D92F1
:10007000A237B107D9F710E0A2E7B0E001C01D92A6
:10008000A237B107E1F70E948C000C941E010C947A
:100090000000AC01892B59F020E030E08AEF90E0BD
:1000A0000197F1F72F5F3F4F24173507B9F70895F0
:1000B000BB9ABC98BD9A8A98BA9AA19AA39A0895B5
:1000C000C29AC39AC59880B386B3A99A0895C59871
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:0E023000961B881F7A95C9F780950895FFCF19
:10023E000A0D41546D65676131360A0D202D2D2D45
:02024E000000AE
:00000001FF


SW_TX_RFM02/atmel/RFM02.h
Nový soubor

@@ -0,0 +1,82 @@

/* mija 2008
defines for module RFM02 - TX 868MHz
*/
#define CMD_SETTING 0x8000 // b1, b0, d2..d0, x3..x0, ms, m2..m0
#define CMD_POWER 0xC000 // a1, a0, ex, es, ea, eb, et, dc
#define CMD_POWER_OUT 0xB000 // p2..p0 -3*Pmax dBm
#define CMD_FREQUENCY 0xA000 // f11..f0 860+F*0.005 MHz 36..3903
#define CMD_RATE 0xC800 // r7..r0 BR=10M/29/(R+1)
#define CMD_WAKE_UP 0xE000 // r4..r0, m7..m0 T=M*2^R [ms]
#define CMD_SLEEP 0xC400 // s7..s0 S stop CLK
#define CMD_BATTERY 0xC200 // dwc, ebs , t4..t0
#define CMD_STATUS 0xCC00 // for read status
// CMD_SETTING
#define BAND_315 0x0000
#define BAND_433 0x800
#define BAND_868 0x1000
#define BADN_915 0x1800
#define C_8_5pF 0x00
#define C_9pF 0x10
#define C_9_5pF 0x20
#define C_10pF 0x30
#define C_10_5pF 0x40
#define C_11pF 0x50
#define C_11_5pF 0x60
#define C_12pF 0x70
#define C_12_5pF 0x80
#define C_13pF 0x90
#define C_13_5pF 0xA0
#define C_14pF 0xB0
#define C_14_5pF 0xC0
#define C_15pF 0xD0
#define C_15_5pF 0xE0
#define C_16pF 0xF0
#define SETTING_MS 0x08 // modulation polarity
#define TX_DEV_30 0x00 // select frequency deviation
#define TX_DEV_60 0x01
#define TX_DEV_90 0x02
#define TX_DEV_120 0x03
#define TX_DEV_150 0x04
#define TX_DEV_180 0x05
#define TX_DEV_210 0x06
// CMD_POWER
#define POWER_A1 0x80 // enable crystal and syntheesizer by sleep
#define POWER_A0 0x40 // enable PA by sleep
#define POWER_EX 0x20 // enable transmitter
#define POWER_ES 0x10 // enable synthesizer
#define POWER_EA 0x08 // enable PA (power amplifier)
#define POWER_EB 0x04 // enable low battery detector
#define POWER_ET 0x02 // enable wake up timer
#define POWER_DC 0x01 // disable clock output of CLK pin
// CMD_POWER_OUT
#define POWER_OUT_0 0xB000 // -0dBm
#define POWER_OUT_3 0xB100 // -3dBm
#define POWER_OUT_6 0xB200 // -6dBm
#define POWER_OUT_9 0xB300 // -9dBm
#define POWER_OUT_12 0xB400 // -12dBm
#define POWER_OUT_15 0xB500 // -15dBm
#define POWER_OUT_18 0xB600 // -18dBm
#define POWER_OUT_21 0xB700 // -21dBm
// CMD_FREQUENCY
#define FREQUENCY_867 0x578
#define FREQUENCY_868 0x640
#define FREQUENCY_869 0x708
// CMD_RATE
#define RATE_2400 0x8F
#define RATE_4800 0x47
#define RATE_9600 0x23
#define RATE_19200 0x11
#define RATE_38400 0x8
#define RATE_57600 0x5
#define RATE_115200 0x2
// CMD_BATTERY
#define WAKE_UP_DWC 0x80 // disable wake-up timer periodical calibration
#define TX_EBS 0x20 // enable TX bit synchronization function


SW_TX_RFM02/atmel/TX_RFM02.c
Nový soubor

@@ -0,0 +1,197 @@

/* mija 2008
demo for RFM02 - TX 868MHz
CPU ATMEGA16
fcpu = 1MHz
!! define PIN,PORT,DDR for IOpin !!
tested with module RFM12B RX 9600 BW 134kHz
*/
#include <avr/io.h>
#include <util/delay.h>
#include "RFM02.h"
//************************************************************************
#define SDI PB3
#define SDI_PORT PORTB
#define SDI_DDR DDRB
#define FSK PC1
#define FSK_PORT PORTC
#define FSK_DDR DDRC
#define SDO PB4 // input for mega
#define SDO_PORT PORTB
#define SDO_DDR DDRB
#define SDO_PIN PINB
#define SCK PB5
#define SCK_PORT PORTB
#define SCK_DDR DDRB
#define nIRQ PD2 // input for mega
#define nIRQ_PORT PORTD
#define nIRQ_DDR DDRD
#define nIRQ_PIN PIND
#define nSEL PB2
#define nSEL_PORT PORTB
#define nSEL_DDR DDRB
#define LED PC3
#define LED_PORT PORTC
#define LED_DDR DDRC
// interni
#define SDI_H SDI_PORT |= _BV(SDI)
#define SDI_L SDI_PORT &= (~(_BV(SDI)))
#define SDI_INIT SDI_DDR |= _BV(SDI)
#define FSK_H FSK_PORT |= _BV(FSK)
#define FSK_L FSK_PORT &= (~(_BV(FSK)))
#define FSK_INIT FSK_DDR |= _BV(FSK)
#define SDO_INPUT (SDO_PIN & _BV(SDO))
#define SDO_INIT SDO_DDR &= (~(_BV(SDO)))
#define SCK_H SCK_PORT |= _BV(SCK)
#define SCK_L SCK_PORT &= (~(_BV(SCK)))
#define SCK_INIT SCK_DDR |= _BV(SCK)
#define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ))
#define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ)))
#define nSEL_H nSEL_PORT |= _BV(nSEL)
#define nSEL_L nSEL_PORT &= (~(_BV(nSEL)))
#define nSEL_INIT nSEL_DDR |= _BV(nSEL)
#define LED_H LED_PORT |= _BV(LED)
#define LED_L LED_PORT &= (~(_BV(LED)))
#define LED_INIT LED_DDR |= _BV(LED)
#define START_TX RF_WRITE_CMD(CMD_POWER|POWER_EX|POWER_ES|POWER_EA|POWER_DC)
#define STOP_TX RF_WRITE_CMD(CMD_POWER|POWER_DC)
//************************************************************************
//uint8_t test[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x03b,0x3c,0x3d,0x3e,0x3f};
uint8_t test[17]="\n\rATmega16\n\r ---";
//uint8_t test[16]="0123456789abcdef";
//************************************************************************
void delay_ms(uint16_t time)
{
while(time--) _delay_ms(1);
}
void IO_INIT(void)
{
SDI_INIT;
SDO_INIT;
SCK_INIT;
nIRQ_INIT;
nSEL_INIT;
FSK_INIT;
LED_INIT;
}
void RF_INIT(void)
{
nSEL_H;
SDI_H;
SCK_L;
nIRQ_INPUT;
SDO_INPUT;
FSK_H;
}
void RF_WRITE_CMD(uint16_t cmd)
{
uint8_t i;
SCK_L;
nSEL_L;
for (i=0;i<16;i++)
{
SCK_L;
SCK_L;
if (cmd & 0x8000) SDI_H;
else SDI_L;
SCK_H;
SCK_H;
cmd <<= 1;
}
SCK_L;
nSEL_H;
}
void RF_WRITE_DATA(uint8_t data)
{
uint8_t i;
for (i=0;i<8;i++)
{
while (nIRQ_INPUT);
while (!nIRQ_INPUT);
if (data & 0x80)FSK_H;
else FSK_L;
data <<= 1;
}
}
int main()
{
uint8_t i,j,ChkSum;
IO_INIT();
RF_INIT();
LED_H;
delay_ms(100);
RF_WRITE_CMD(CMD_STATUS);
RF_WRITE_CMD(CMD_SETTING |BAND_868 |C_12pF |TX_DEV_90);
RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868);
RF_WRITE_CMD(0xD040);
RF_WRITE_CMD(CMD_RATE |RATE_19200);
RF_WRITE_CMD(CMD_BATTERY |TX_EBS);
RF_WRITE_CMD(CMD_POWER |POWER_DC);
RF_WRITE_CMD(POWER_OUT_0);
j= 0;
while (1)
{
LED_H;
START_TX;
ChkSum = 0;
for (i=0;i<3;i++) RF_WRITE_DATA(0xAA);
RF_WRITE_DATA(0x2D);
RF_WRITE_DATA(0xD4);
for (i=0;i<16;i++)
{
RF_WRITE_DATA(test[i]);
ChkSum += test[i];
}
RF_WRITE_DATA(ChkSum);
RF_WRITE_DATA(0xAA);
RF_WRITE_DATA(0xAA);
STOP_TX;
LED_L;
delay_ms(500);
j++;
test[13]=(j/100)+0x30;
test[14]=((j%100)/10)+0x30;
test[15]=((j%100)%10)+0x30;
}
return 0;
}


{COMPARE END}
{FOOTER START}

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