Rev 1652 Rev 1858
1 /* mija 2008 1 /* mija 2008
2 demo for RFM02 - TX 868MHz 2 demo for RFM02 - TX 868MHz
3   3  
4 CPU ATMEGA16 4 CPU ATMEGA16
5 fcpu = 1MHz 5 fcpu = 1MHz
6   6  
7 !! define PIN,PORT,DDR for IOpin !! 7 !! define PIN,PORT,DDR for IOpin !!
8   8  
9 tested with module RFM12B RX 9600 BW 134kHz 9 tested with module RFM12B RX 9600 BW 134kHz
10 */ 10 */
11   11  
12 #define F_CPU 1000000UL 12 #define F_CPU 1000000UL
13   13  
14 #include <avr/io.h> 14 #include <avr/io.h>
15 #include <util/delay.h> 15 #include <util/delay.h>
16 #include "RFM02.h" 16 #include "RFM02.h"
17   17  
18 //************************************************************************ 18 //************************************************************************
19   19  
20 #define SDI PB3 20 #define SDI PB3
21 #define SDI_PORT PORTB 21 #define SDI_PORT PORTB
22 #define SDI_DDR DDRB 22 #define SDI_DDR DDRB
23   23  
24 #define FSK PC1 24 #define FSK PC1
25 #define FSK_PORT PORTC 25 #define FSK_PORT PORTC
26 #define FSK_DDR DDRC 26 #define FSK_DDR DDRC
27 #define SCK PB5 27 #define SCK PB5
28 #define SCK_PORT PORTB 28 #define SCK_PORT PORTB
29 #define SCK_DDR DDRB 29 #define SCK_DDR DDRB
30   30  
31 #define nIRQ PD2 // input for mega 31 #define nIRQ PD2 // input for mega
32 #define nIRQ_PORT PORTD 32 #define nIRQ_PORT PORTD
33 #define nIRQ_DDR DDRD 33 #define nIRQ_DDR DDRD
34 #define nIRQ_PIN PIND 34 #define nIRQ_PIN PIND
35   35  
36 #define nSEL PB2 36 #define nSEL PB2
37 #define nSEL_PORT PORTB 37 #define nSEL_PORT PORTB
38 #define nSEL_DDR DDRB 38 #define nSEL_DDR DDRB
39   39  
40 #define LED PC3 40 #define LED PC3
41 #define LED_PORT PORTC 41 #define LED_PORT PORTC
42 #define LED_DDR DDRC 42 #define LED_DDR DDRC
43   43  
44 // interni 44 // interni
45 #define SDI_H SDI_PORT |= _BV(SDI) 45 #define SDI_H SDI_PORT |= _BV(SDI)
46 #define SDI_L SDI_PORT &= (~(_BV(SDI))) 46 #define SDI_L SDI_PORT &= (~(_BV(SDI)))
47 #define SDI_INIT SDI_DDR |= _BV(SDI) 47 #define SDI_INIT SDI_DDR |= _BV(SDI)
48   48  
49 #define FSK_H FSK_PORT |= _BV(FSK) 49 #define FSK_H FSK_PORT |= _BV(FSK)
50 #define FSK_L FSK_PORT &= (~(_BV(FSK))) 50 #define FSK_L FSK_PORT &= (~(_BV(FSK)))
51 #define FSK_INIT FSK_DDR |= _BV(FSK) 51 #define FSK_INIT FSK_DDR |= _BV(FSK)
52   52  
53 #define SDO_INPUT (SDO_PIN & _BV(SDO)) 53 #define SDO_INPUT (SDO_PIN & _BV(SDO))
54 #define SDO_INIT SDO_DDR &= (~(_BV(SDO))) 54 #define SDO_INIT SDO_DDR &= (~(_BV(SDO)))
55   55  
56 #define SCK_H SCK_PORT |= _BV(SCK) 56 #define SCK_H SCK_PORT |= _BV(SCK)
57 #define SCK_L SCK_PORT &= (~(_BV(SCK))) 57 #define SCK_L SCK_PORT &= (~(_BV(SCK)))
58 #define SCK_INIT SCK_DDR |= _BV(SCK) 58 #define SCK_INIT SCK_DDR |= _BV(SCK)
59   59  
60 #define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ)) 60 #define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ))
61 #define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ))) 61 #define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ)))
62   62  
63 #define nSEL_H nSEL_PORT |= _BV(nSEL) 63 #define nSEL_H nSEL_PORT |= _BV(nSEL)
64 #define nSEL_L nSEL_PORT &= (~(_BV(nSEL))) 64 #define nSEL_L nSEL_PORT &= (~(_BV(nSEL)))
65 #define nSEL_INIT nSEL_DDR |= _BV(nSEL) 65 #define nSEL_INIT nSEL_DDR |= _BV(nSEL)
66   66  
67 #define LED_H LED_PORT |= _BV(LED) 67 #define LED_H LED_PORT |= _BV(LED)
68 #define LED_L LED_PORT &= (~(_BV(LED))) 68 #define LED_L LED_PORT &= (~(_BV(LED)))
69 #define LED_INIT LED_DDR |= _BV(LED) 69 #define LED_INIT LED_DDR |= _BV(LED)
70   70  
71 #define START_TX RF_WRITE_CMD(CMD_POWER|POWER_EX|POWER_ES|POWER_EA|POWER_DC) 71 #define START_TX RF_WRITE_CMD(CMD_POWER|POWER_EX|POWER_ES|POWER_EA|POWER_DC)
72 #define STOP_TX RF_WRITE_CMD(CMD_POWER|POWER_DC) 72 #define STOP_TX RF_WRITE_CMD(CMD_POWER|POWER_DC)
73   73  
74 //************************************************************************ 74 //************************************************************************
75   75  
76 //uint8_t test[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x03b,0x3c,0x3d,0x3e,0x3f}; 76 //uint8_t test[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x03b,0x3c,0x3d,0x3e,0x3f};
77 uint8_t test[17]="\n\rATmega16\n\r ---"; 77 uint8_t test[17]="\n\rATmega16\n\r ---";
78 //uint8_t test[16]="0123456789abcdef"; 78 //uint8_t test[16]="0123456789abcdef";
79   79  
80   80  
81 //************************************************************************ 81 //************************************************************************
82   82  
83 void delay_ms(uint16_t time) 83 void delay_ms(uint16_t time)
84 { 84 {
85 while(time--) _delay_ms(1); 85 while(time--) _delay_ms(1);
86 } 86 }
87   87  
88 void IO_INIT(void) 88 void IO_INIT(void)
89 { 89 {
90 SDI_INIT; 90 SDI_INIT;
91 SCK_INIT; 91 SCK_INIT;
92 nIRQ_INIT; 92 nIRQ_INIT;
93 nSEL_INIT; 93 nSEL_INIT;
94 FSK_INIT; 94 FSK_INIT;
95 LED_INIT; 95 LED_INIT;
96 } 96 }
97   97  
98 void RF_INIT(void) 98 void RF_INIT(void)
99 { 99 {
100 nSEL_H; 100 nSEL_H;
101 SDI_H; 101 SDI_H;
102 SCK_L; 102 SCK_L;
103 nIRQ_INPUT; 103 nIRQ_INPUT;
104 FSK_H; 104 FSK_H;
105 } 105 }
106   106  
107 void RF_WRITE_CMD(uint16_t cmd) 107 void RF_WRITE_CMD(uint16_t cmd)
108 { 108 {
109 uint8_t i; 109 uint8_t i;
110   110  
111 SCK_L; 111 SCK_L;
112 nSEL_L; 112 nSEL_L;
113 for (i=0;i<16;i++) 113 for (i=0;i<16;i++)
114 { 114 {
115 SCK_L; 115 SCK_L;
116 SCK_L; 116 SCK_L;
117 if (cmd & 0x8000) SDI_H; 117 if (cmd & 0x8000) SDI_H;
118 else SDI_L; 118 else SDI_L;
119 SCK_H; 119 SCK_H;
120 SCK_H; 120 SCK_H;
121 cmd <<= 1; 121 cmd <<= 1;
122 } 122 }
123 SCK_L; 123 SCK_L;
124 nSEL_H; 124 nSEL_H;
125 } 125 }
126   126  
127 void RF_WRITE_DATA(uint8_t data) 127 void RF_WRITE_DATA(uint8_t data)
128 { 128 {
129 uint8_t i; 129 uint8_t i;
130 130
131 for (i=0;i<8;i++) 131 for (i=0;i<8;i++)
132 { 132 {
133 while (nIRQ_INPUT); 133 while (nIRQ_INPUT);
134 while (!nIRQ_INPUT); 134 while (!nIRQ_INPUT);
135 if (data & 0x80)FSK_H; 135 if (data & 0x80)FSK_H;
136 else FSK_L; 136 else FSK_L;
137 data <<= 1; 137 data <<= 1;
138 } 138 }
139 } 139 }
140   140  
141 int main() 141 int main()
142 { 142 {
143 uint8_t i,j,ChkSum; 143 uint8_t i,j,ChkSum;
144   144  
145 IO_INIT(); 145 IO_INIT();
146 RF_INIT(); 146 RF_INIT();
147 LED_H; 147 LED_H;
148 delay_ms(100); 148 delay_ms(100);
149   149  
150 RF_WRITE_CMD(CMD_STATUS); 150 RF_WRITE_CMD(CMD_STATUS);
151 RF_WRITE_CMD(CMD_SETTING |BAND_868 |C_12pF |TX_DEV_90); 151 RF_WRITE_CMD(CMD_SETTING |BAND_868 |C_12pF |TX_DEV_90);
152 RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868); 152 RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868);
153 RF_WRITE_CMD(0xD040); 153 RF_WRITE_CMD(0xD040);
154 RF_WRITE_CMD(CMD_RATE |RATE_4800); 154 RF_WRITE_CMD(CMD_RATE |RATE_4800);
155 RF_WRITE_CMD(CMD_BATTERY |TX_EBS); 155 RF_WRITE_CMD(CMD_BATTERY |TX_EBS);
156 RF_WRITE_CMD(CMD_POWER |POWER_DC); 156 RF_WRITE_CMD(CMD_POWER |POWER_DC);
157 RF_WRITE_CMD(POWER_OUT_0); 157 RF_WRITE_CMD(POWER_OUT_0);
158   158  
159 j= 0; 159 j= 0;
160 while (1) 160 while (1)
161 { 161 {
162 LED_H; 162 LED_H;
163   163  
164 START_TX; 164 START_TX;
165 ChkSum = 0; 165 ChkSum = 0;
166 for (i=0;i<3;i++) RF_WRITE_DATA(0xAA); 166 for (i=0;i<3;i++) RF_WRITE_DATA(0xAA);
167 RF_WRITE_DATA(0x2D); 167 RF_WRITE_DATA(0x2D);
168 RF_WRITE_DATA(0xD4); 168 RF_WRITE_DATA(0xD4);
169 169
170 for (i=0;i<16;i++) 170 for (i=0;i<16;i++)
171 { 171 {
172 RF_WRITE_DATA(test[i]); 172 RF_WRITE_DATA(test[i]);
173 ChkSum += test[i]; 173 ChkSum += test[i];
174 } 174 }
175 RF_WRITE_DATA(ChkSum); 175 RF_WRITE_DATA(ChkSum);
176 RF_WRITE_DATA(0xAA); 176 RF_WRITE_DATA(0xAA);
177 RF_WRITE_DATA(0xAA); 177 RF_WRITE_DATA(0xAA);
178 STOP_TX; 178 STOP_TX;
179   179  
180 LED_L; 180 LED_L;
181 delay_ms(500); 181 delay_ms(500);
182 j++; 182 j++;
183 test[13]=(j/100)+0x30; 183 test[13]=(j/100)+0x30;
184 test[14]=((j%100)/10)+0x30; 184 test[14]=((j%100)/10)+0x30;
185 test[15]=((j%100)%10)+0x30; 185 test[15]=((j%100)%10)+0x30;
186 } 186 }
187 return 0; 187 return 0;
188 } 188 }
189   189  
190   190  
191   191