Rev 1096 Rev 1295
1 /* mija 2008 1 /* mija 2008
2 demo for RFM01 - RX 868MHz 2 demo for RFM01 - RX 868MHz
3 3
4 CPU ATMEGA8 4 CPU ATMEGA8
5 fcpu = 1MHz 5 fcpu = 1MHz
6   6  
7 !! define PIN,PORT,DDR for IOpin !! 7 !! define PIN,PORT,DDR for IOpin !!
8   8  
9 tested with module RFM12B - TX,9600,Fdev 15kHz 9 tested with module RFM12B - TX,9600,Fdev 15kHz
10 */ 10 */
11   11  
12 #include <avr/io.h> 12 #include <avr/io.h>
13 #include <util/delay.h> 13 #include <util/delay.h>
14 #include "RFM01.h" 14 #include "RFM01.h"
15   15  
16 //************************************************************************ 16 //************************************************************************
17   17  
18 #define SDI PB3 18 #define SDI PB3
19 #define SDI_PORT PORTB 19 #define SDI_PORT PORTB
20 #define SDI_DDR DDRB 20 #define SDI_DDR DDRB
21   21  
22 #define FSK PC1 -  
23 #define FSK_PORT PORTC -  
24 #define FSK_DDR DDRC -  
25   -  
26 #define SDO PB4 // input for mega 22 #define SDO PB4 // input for mega
27 #define SDO_PORT PORTB 23 #define SDO_PORT PORTB
28 #define SDO_DDR DDRB 24 #define SDO_DDR DDRB
29 #define SDO_PIN PINB 25 #define SDO_PIN PINB
30   26  
31 #define SCK PB5 27 #define SCK PB5
32 #define SCK_PORT PORTB 28 #define SCK_PORT PORTB
33 #define SCK_DDR DDRB 29 #define SCK_DDR DDRB
34   30  
35 #define nIRQ PD2 // input for mega 31 #define nIRQ PD2 // input for mega
36 #define nIRQ_PORT PORTD 32 #define nIRQ_PORT PORTD
37 #define nIRQ_DDR DDRD 33 #define nIRQ_DDR DDRD
38 #define nIRQ_PIN PIND 34 #define nIRQ_PIN PIND
39   35  
40 #define nSEL PB2 36 #define nSEL PB2
41 #define nSEL_PORT PORTB 37 #define nSEL_PORT PORTB
42 #define nSEL_DDR DDRB 38 #define nSEL_DDR DDRB
43   39  
44 #define LED PD3 40 #define LED PD3
45 #define LED_PORT PORTD 41 #define LED_PORT PORTD
46 #define LED_DDR DDRD 42 #define LED_DDR DDRD
47   43  
48 // interni 44 // interni
49 #define SDI_H SDI_PORT |= _BV(SDI) 45 #define SDI_H SDI_PORT |= _BV(SDI)
50 #define SDI_L SDI_PORT &= (~(_BV(SDI))) 46 #define SDI_L SDI_PORT &= (~(_BV(SDI)))
51 #define SDI_INIT SDI_DDR |= _BV(SDI) 47 #define SDI_INIT SDI_DDR |= _BV(SDI)
52   48  
53 #define FSK_H FSK_PORT |= _BV(FSK) 49 #define FSK_H FSK_PORT |= _BV(FSK)
54 #define FSK_L FSK_PORT &= (~(_BV(FSK))) 50 #define FSK_L FSK_PORT &= (~(_BV(FSK)))
55 #define FSK_INIT FSK_DDR |= _BV(FSK) 51 #define FSK_INIT FSK_DDR |= _BV(FSK)
56   52  
57 #define SDO_INPUT (SDO_PIN & _BV(SDO)) 53 #define SDO_INPUT (SDO_PIN & _BV(SDO))
58 #define SDO_INIT SDO_DDR &= (~(_BV(SDO))) 54 #define SDO_INIT SDO_DDR &= (~(_BV(SDO)))
59   55  
60 #define SCK_H SCK_PORT |= _BV(SCK) 56 #define SCK_H SCK_PORT |= _BV(SCK)
61 #define SCK_L SCK_PORT &= (~(_BV(SCK))) 57 #define SCK_L SCK_PORT &= (~(_BV(SCK)))
62 #define SCK_INIT SCK_DDR |= _BV(SCK) 58 #define SCK_INIT SCK_DDR |= _BV(SCK)
63   59  
64 #define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ)) 60 #define nIRQ_INPUT (nIRQ_PIN & _BV(nIRQ))
65 #define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ))) 61 #define nIRQ_INIT nIRQ_DDR &= (~(_BV(nIRQ)))
66   62  
67 #define nSEL_H nSEL_PORT |= _BV(nSEL) 63 #define nSEL_H nSEL_PORT |= _BV(nSEL)
68 #define nSEL_L nSEL_PORT &= (~(_BV(nSEL))) 64 #define nSEL_L nSEL_PORT &= (~(_BV(nSEL)))
69 #define nSEL_INIT nSEL_DDR |= _BV(nSEL) 65 #define nSEL_INIT nSEL_DDR |= _BV(nSEL)
70   66  
71 #define LED_H LED_PORT |= _BV(LED) 67 #define LED_H LED_PORT |= _BV(LED)
72 #define LED_L LED_PORT &= (~(_BV(LED))) 68 #define LED_L LED_PORT &= (~(_BV(LED)))
73 #define LED_INIT LED_DDR |= _BV(LED) 69 #define LED_INIT LED_DDR |= _BV(LED)
74   70  
75 #define START_FIFO RF_WRITE_CMD(CMD_FIFO|FIFO_8|FIFO_VDI_WORD|FIFO_FF|FIFO_FE) 71 #define START_FIFO RF_WRITE_CMD(CMD_FIFO|FIFO_8|FIFO_VDI_WORD|FIFO_FF|FIFO_FE)
76 #define STOP_FIFO RF_WRITE_CMD(CMD_FIFO) 72 #define STOP_FIFO RF_WRITE_CMD(CMD_FIFO)
77   73  
78 //************************************************************************ 74 //************************************************************************
79   75  
80 uint8_t rx_buf[16]; 76 uint8_t rx_buf[16];
81   77  
82 //************************************************************************ 78 //************************************************************************
83   79  
84 void delay_ms(uint16_t time) 80 void delay_ms(uint16_t time)
85 { 81 {
86 while(time--) _delay_ms(1); 82 while(time--) _delay_ms(1);
87 } 83 }
88   84  
89 void IO_INIT(void) 85 void IO_INIT(void)
90 { 86 {
91 SDI_INIT; 87 SDI_INIT;
92 SDO_INIT; 88 SDO_INIT;
93 SCK_INIT; 89 SCK_INIT;
94 nIRQ_INIT; 90 nIRQ_INIT;
95 nSEL_INIT; 91 nSEL_INIT;
96 FSK_INIT; 92 FSK_INIT;
97 LED_INIT; 93 LED_INIT;
98 } 94 }
99   95  
100 void RF_INIT(void) 96 void RF_INIT(void)
101 { 97 {
102 nSEL_H; 98 nSEL_H;
103 SDI_H; 99 SDI_H;
104 SCK_L; 100 SCK_L;
105 nIRQ_INPUT; 101 nIRQ_INPUT;
106 SDO_INPUT; 102 SDO_INPUT;
107 FSK_H; 103 FSK_H;
108 } 104 }
109   105  
110 uint16_t RF_WRITE_CMD(uint16_t cmd) 106 uint16_t RF_WRITE_CMD(uint16_t cmd)
111 { 107 {
112 uint8_t i; 108 uint8_t i;
113 uint16_t temp; 109 uint16_t temp;
114   110  
115 SCK_L; 111 SCK_L;
116 nSEL_L; 112 nSEL_L;
117 temp=0; 113 temp=0;
118 for (i=0;i<16;i++) 114 for (i=0;i<16;i++)
119 { 115 {
120 if (cmd & 0x8000) SDI_H; 116 if (cmd & 0x8000) SDI_H;
121 else SDI_L; 117 else SDI_L;
122 SCK_H; 118 SCK_H;
123 cmd <<= 1; 119 cmd <<= 1;
124 temp <<= 1; 120 temp <<= 1;
125 if(SDO_INPUT) temp |= 0x0001; 121 if(SDO_INPUT) temp |= 0x0001;
126 SCK_L; 122 SCK_L;
127 } 123 }
128 SCK_L; 124 SCK_L;
129 nSEL_H; 125 nSEL_H;
130 return (temp); 126 return (temp);
131 } 127 }
132   128  
133 void RF_WRITE_DATA(uint8_t data) 129 void RF_WRITE_DATA(uint8_t data)
134 { 130 {
135 while (nIRQ_INPUT); 131 while (nIRQ_INPUT);
136 RF_WRITE_CMD(0xB800 + data); 132 RF_WRITE_CMD(0xB800 + data);
137 } 133 }
138   134  
139 uint8_t RF_READ_DATA(void) 135 uint8_t RF_READ_DATA(void)
140 { 136 {
141 uint8_t i,result; 137 uint8_t i,result;
142   138  
143 while (nIRQ_INPUT); 139 while (nIRQ_INPUT);
144 SCK_L; 140 SCK_L;
145 nSEL_L; 141 nSEL_L;
146 SDI_L; 142 SDI_L;
147 result=0; 143 result=0;
148 for (i=0;i<24;i++) 144 for (i=0;i<24;i++)
149 { 145 {
150 result <<= 1; 146 result <<= 1;
151 if (SDO_INPUT) result |= 0x01; 147 if (SDO_INPUT) result |= 0x01;
152 SCK_H; 148 SCK_H;
153 SCK_L; 149 SCK_L;
154 } 150 }
155 nSEL_H; 151 nSEL_H;
156 return (result); 152 return (result);
157 } 153 }
158   154  
159 void RS232_INIT(void) 155 void RS232_INIT(void)
160 { 156 {
161 //set baud rate 9600 8N1 for Fosc 1MHz 157 //set baud rate 9600 8N1 for Fosc 1MHz
162 UBRRH = 0; 158 UBRRH = 0;
163 UBRRL = 12; 159 UBRRL = 12;
164 UCSRB = (1<<RXEN)|(1<<TXEN); //enable RX TX 160 UCSRB = (1<<RXEN)|(1<<TXEN); //enable RX TX
165 UCSRC = (1<<URSEL) |(3<<UCSZ0); //8N1 161 UCSRC = (1<<URSEL) |(3<<UCSZ0); //8N1
166 UCSRA |= _BV(U2X); 162 UCSRA |= _BV(U2X);
167 } 163 }
168   164  
169 void put_rs232(char data) 165 void put_rs232(char data)
170 { 166 {
171 // Wait for empty transmit buffer 167 // Wait for empty transmit buffer
172 while ( !( UCSRA & (1<<UDRE)) ); 168 while ( !( UCSRA & (1<<UDRE)) );
173 // Put data into buffer, sends the data 169 // Put data into buffer, sends the data
174 UDR = data; 170 UDR = data;
175 } 171 }
176   172  
177 int main() 173 int main()
178 { 174 {
179 uint8_t i,ChkSum; 175 uint8_t i,ChkSum;
180 uint8_t LED_TRG; 176 uint8_t LED_TRG;
181 uint8_t b; 177 uint8_t b;
182   178  
183 IO_INIT(); 179 IO_INIT();
184 RS232_INIT(); 180 RS232_INIT();
185 RF_INIT(); 181 RF_INIT();
186 delay_ms(100); 182 delay_ms(100);
187 LED_L; 183 LED_L;
188 LED_TRG=0; 184 LED_TRG=0;
189   185  
190 186
191 187
192 RF_WRITE_CMD(CMD_SETTING |BAND_868 | C_12pF | BANDWIDTH_67 | SETTING_DC); 188 RF_WRITE_CMD(CMD_SETTING |BAND_868 | C_12pF | BANDWIDTH_67 | SETTING_DC);
193 RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868); 189 RF_WRITE_CMD(CMD_FREQUENCY |FREQUENCY_868);
194 RF_WRITE_CMD(CMD_RATE |RATE_9600); 190 RF_WRITE_CMD(CMD_RATE |RATE_9600);
195 RF_WRITE_CMD(CMD_FILTER |FILTER_AL | FILTER_S0 | DQD_4); 191 RF_WRITE_CMD(CMD_FILTER |FILTER_AL | FILTER_S0 | DQD_4);
196 RF_WRITE_CMD(CMD_AFC |AFC_POWER_ON | AFC_RANG_8 | AFC_ST | AFC_OE | AFC_EN); 192 RF_WRITE_CMD(CMD_AFC |AFC_POWER_ON | AFC_RANG_8 | AFC_ST | AFC_OE | AFC_EN);
197 RF_WRITE_CMD(CMD_RX); 193 RF_WRITE_CMD(CMD_RX);
198 RF_WRITE_CMD(CMD_RX |VDI_CLOCK | LNA_GAIN_0 | DRSSI_103 | RX_EN); 194 RF_WRITE_CMD(CMD_RX |VDI_CLOCK | LNA_GAIN_0 | DRSSI_103 | RX_EN);
199 RF_WRITE_CMD(CMD_FIFO); 195 RF_WRITE_CMD(CMD_FIFO);
200   196  
201 while (1) 197 while (1)
202 { 198 {
203 199
204 START_FIFO; 200 START_FIFO;
205 ChkSum = 0; 201 ChkSum = 0;
206 for (i=0;i<16;i++) 202 for (i=0;i<16;i++)
207 { 203 {
208 b = RF_READ_DATA(); 204 b = RF_READ_DATA();
209 rx_buf[i] = b; 205 rx_buf[i] = b;
210 ChkSum += b; 206 ChkSum += b;
211 } 207 }
212 b = RF_READ_DATA(); 208 b = RF_READ_DATA();
213 RF_READ_DATA(); 209 RF_READ_DATA();
214 STOP_FIFO; 210 STOP_FIFO;
215 211
216 for (i=0;i<16;i++) 212 for (i=0;i<16;i++)
217 { 213 {
218 put_rs232(rx_buf[i]); 214 put_rs232(rx_buf[i]);
219 delay_ms(2); 215 delay_ms(2);
220 } 216 }
221 if (ChkSum == b) 217 if (ChkSum == b)
222 { 218 {
223 LED_TRG = ~ LED_TRG; 219 LED_TRG = ~ LED_TRG;
224 put_rs232(' '); 220 put_rs232(' ');
225 put_rs232('o'); 221 put_rs232('o');
226 put_rs232('k'); 222 put_rs232('k');
227 } 223 }
228 else 224 else
229 { 225 {
230 put_rs232('\n'); 226 put_rs232('\n');
231 delay_ms(2); 227 delay_ms(2);
232 put_rs232('\r'); 228 put_rs232('\r');
233 delay_ms(2); 229 delay_ms(2);
234 put_rs232('e'); 230 put_rs232('e');
235 put_rs232('r'); 231 put_rs232('r');
236 put_rs232('r'); 232 put_rs232('r');
237 } 233 }
238 if (LED_TRG) LED_H; 234 if (LED_TRG) LED_H;
239 else LED_L; 235 else LED_L;
240 } 236 }
241 return 0; 237 return 0;
242 } 238 }
243   239  
244   240  
245   241