Rev 2943 Rev 2950
1 /* 1 /*
2 ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio 2 ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3   3  
4 Licensed under the Apache License, Version 2.0 (the "License"); 4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License. 5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at 6 You may obtain a copy of the License at
7   7  
8 http://www.apache.org/licenses/LICENSE-2.0 8 http://www.apache.org/licenses/LICENSE-2.0
9   9  
10 Unless required by applicable law or agreed to in writing, software 10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS, 11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and 13 See the License for the specific language governing permissions and
14 limitations under the License. 14 limitations under the License.
15 */ 15 */
16   16  
17 /* 17 /*
18 * STM32L1xx drivers configuration. 18 * STM32L1xx drivers configuration.
19 * The following settings override the default settings present in 19 * The following settings override the default settings present in
20 * the various device driver implementation headers. 20 * the various device driver implementation headers.
21 * Note that the settings for each driver only have effect if the whole 21 * Note that the settings for each driver only have effect if the whole
22 * driver is enabled in halconf.h. 22 * driver is enabled in halconf.h.
23 * 23 *
24 * IRQ priorities: 24 * IRQ priorities:
25 * 15...0 Lowest...Highest. 25 * 15...0 Lowest...Highest.
26 * 26 *
27 * DMA priorities: 27 * DMA priorities:
28 * 0...3 Lowest...Highest. 28 * 0...3 Lowest...Highest.
29 */ 29 */
30   30  
31 #define STM32L1xx_MCUCONF 31 #define STM32L1xx_MCUCONF
32   32  
33 /* 33 /*
34 * HAL driver system settings. 34 * HAL driver system settings.
35 */ 35 */
36 #define STM32_NO_INIT FALSE 36 #define STM32_NO_INIT FALSE
37 #define STM32_HSI_ENABLED TRUE 37 #define STM32_HSI_ENABLED TRUE
38 #define STM32_LSI_ENABLED TRUE 38 #define STM32_LSI_ENABLED TRUE
39 #define STM32_HSE_ENABLED FALSE 39 #define STM32_HSE_ENABLED FALSE
40 #define STM32_LSE_ENABLED TRUE 40 #define STM32_LSE_ENABLED TRUE
41 #define STM32_ADC_CLOCK_ENABLED TRUE 41 #define STM32_ADC_CLOCK_ENABLED FALSE
42 #define STM32_USB_CLOCK_ENABLED TRUE 42 #define STM32_USB_CLOCK_ENABLED FALSE
43 #define STM32_MSIRANGE STM32_MSIRANGE_2M 43 #define STM32_MSIRANGE STM32_MSIRANGE_2M
44 #define STM32_SW STM32_SW_PLL 44 #define STM32_SW STM32_SW_PLL
45 #define STM32_PLLSRC STM32_PLLSRC_HSI 45 #define STM32_PLLSRC STM32_PLLSRC_HSI
46 #define STM32_PLLMUL_VALUE 6 46 #define STM32_PLLMUL_VALUE 6
47 #define STM32_PLLDIV_VALUE 3 47 #define STM32_PLLDIV_VALUE 3
48 #define STM32_HPRE STM32_HPRE_DIV1 48 #define STM32_HPRE STM32_HPRE_DIV1
49 #define STM32_PPRE1 STM32_PPRE1_DIV1 49 #define STM32_PPRE1 STM32_PPRE1_DIV1
50 #define STM32_PPRE2 STM32_PPRE2_DIV1 50 #define STM32_PPRE2 STM32_PPRE2_DIV1
51 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK 51 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
52 #define STM32_MCOPRE STM32_MCOPRE_DIV1 52 #define STM32_MCOPRE STM32_MCOPRE_DIV1
53 #define STM32_RTCSEL STM32_RTCSEL_LSE 53 #define STM32_RTCSEL STM32_RTCSEL_LSE
54 #define STM32_RTCPRE STM32_RTCPRE_DIV2 54 #define STM32_RTCPRE STM32_RTCPRE_DIV2
55 #define STM32_VOS STM32_VOS_1P8 55 #define STM32_VOS STM32_VOS_1P8
56 #define STM32_PVD_ENABLE FALSE 56 #define STM32_PVD_ENABLE FALSE
57 #define STM32_PLS STM32_PLS_LEV0 57 #define STM32_PLS STM32_PLS_LEV0
58   58  
59 /* 59 /*
60 * ADC driver system settings. 60 * ADC driver system settings.
61 */ 61 */
62 #define STM32_ADC_USE_ADC1 TRUE 62 #define STM32_ADC_USE_ADC1 FALSE
63 #define STM32_ADC_ADC1_DMA_PRIORITY 2 63 #define STM32_ADC_ADC1_DMA_PRIORITY 2
64 #define STM32_ADC_IRQ_PRIORITY 6 64 #define STM32_ADC_IRQ_PRIORITY 6
65 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 65 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
66   66  
67 /* 67 /*
68 * EXT driver system settings. 68 * EXT driver system settings.
69 */ 69 */
70 #define STM32_EXT_EXTI0_IRQ_PRIORITY 6 70 #define STM32_EXT_EXTI0_IRQ_PRIORITY 6
71 #define STM32_EXT_EXTI1_IRQ_PRIORITY 6 71 #define STM32_EXT_EXTI1_IRQ_PRIORITY 6
72 #define STM32_EXT_EXTI2_IRQ_PRIORITY 6 72 #define STM32_EXT_EXTI2_IRQ_PRIORITY 6
73 #define STM32_EXT_EXTI3_IRQ_PRIORITY 6 73 #define STM32_EXT_EXTI3_IRQ_PRIORITY 6
74 #define STM32_EXT_EXTI4_IRQ_PRIORITY 6 74 #define STM32_EXT_EXTI4_IRQ_PRIORITY 6
75 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 75 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
76 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 76 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
77 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 77 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6
78 #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 78 #define STM32_EXT_EXTI17_IRQ_PRIORITY 6
79 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 79 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6
80 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 80 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6
81 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 81 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6
82 #define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 82 #define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6
83   83  
84 /* 84 /*
85 * GPT driver system settings. 85 * GPT driver system settings.
86 */ 86 */
87 #define STM32_GPT_USE_TIM2 TRUE 87 #define STM32_GPT_USE_TIM2 TRUE
88 #define STM32_GPT_USE_TIM3 FALSE 88 #define STM32_GPT_USE_TIM3 FALSE
89 #define STM32_GPT_USE_TIM4 FALSE 89 #define STM32_GPT_USE_TIM4 FALSE
90 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 90 #define STM32_GPT_TIM2_IRQ_PRIORITY 7
91 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 91 #define STM32_GPT_TIM3_IRQ_PRIORITY 7
92 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 92 #define STM32_GPT_TIM4_IRQ_PRIORITY 7
93   93  
94 /* 94 /*
95 * I2C driver system settings. 95 * I2C driver system settings.
96 */ 96 */
97 #define STM32_I2C_USE_I2C1 FALSE 97 #define STM32_I2C_USE_I2C1 FALSE
98 #define STM32_I2C_USE_I2C2 FALSE 98 #define STM32_I2C_USE_I2C2 FALSE
99 #define STM32_I2C_I2C1_IRQ_PRIORITY 5 99 #define STM32_I2C_I2C1_IRQ_PRIORITY 5
100 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 100 #define STM32_I2C_I2C2_IRQ_PRIORITY 5
101 #define STM32_I2C_I2C1_DMA_PRIORITY 3 101 #define STM32_I2C_I2C1_DMA_PRIORITY 3
102 #define STM32_I2C_I2C2_DMA_PRIORITY 3 102 #define STM32_I2C_I2C2_DMA_PRIORITY 3
103 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() 103 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
104 #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() 104 #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
105   105  
106 /* 106 /*
107 * ICU driver system settings. 107 * ICU driver system settings.
108 */ 108 */
109 #define STM32_ICU_USE_TIM2 FALSE 109 #define STM32_ICU_USE_TIM2 FALSE
110 #define STM32_ICU_USE_TIM3 FALSE 110 #define STM32_ICU_USE_TIM3 FALSE
111 #define STM32_ICU_USE_TIM4 FALSE 111 #define STM32_ICU_USE_TIM4 FALSE
112 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 112 #define STM32_ICU_TIM2_IRQ_PRIORITY 7
113 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 113 #define STM32_ICU_TIM3_IRQ_PRIORITY 7
114 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 114 #define STM32_ICU_TIM4_IRQ_PRIORITY 7
115   115  
116 /* 116 /*
117 * PWM driver system settings. 117 * PWM driver system settings.
118 */ 118 */
119 #define STM32_PWM_USE_TIM2 FALSE 119 #define STM32_PWM_USE_TIM2 FALSE
120 #define STM32_PWM_USE_TIM3 FALSE 120 #define STM32_PWM_USE_TIM3 FALSE
121 #define STM32_PWM_USE_TIM4 TRUE 121 #define STM32_PWM_USE_TIM4 FALSE
122 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 122 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
123 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 123 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
124 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 124 #define STM32_PWM_TIM4_IRQ_PRIORITY 7
125   125  
126 /* 126 /*
127 * SERIAL driver system settings. 127 * SERIAL driver system settings.
128 */ 128 */
129 #define STM32_SERIAL_USE_USART1 TRUE 129 #define STM32_SERIAL_USE_USART1 TRUE
130 #define STM32_SERIAL_USE_USART2 TRUE 130 #define STM32_SERIAL_USE_USART2 TRUE
131 #define STM32_SERIAL_USE_USART3 FALSE 131 #define STM32_SERIAL_USE_USART3 FALSE
132 #define STM32_SERIAL_USART1_PRIORITY 12 132 #define STM32_SERIAL_USART1_PRIORITY 12
133 #define STM32_SERIAL_USART2_PRIORITY 12 133 #define STM32_SERIAL_USART2_PRIORITY 12
134 #define STM32_SERIAL_USART3_PRIORITY 12 134 #define STM32_SERIAL_USART3_PRIORITY 12
135   135  
136 /* 136 /*
137 * SPI driver system settings. 137 * SPI driver system settings.
138 */ 138 */
139 #define STM32_SPI_USE_SPI1 FALSE 139 #define STM32_SPI_USE_SPI1 FALSE
140 #define STM32_SPI_USE_SPI2 TRUE 140 #define STM32_SPI_USE_SPI2 FALSE
141 #define STM32_SPI_SPI1_DMA_PRIORITY 1 141 #define STM32_SPI_SPI1_DMA_PRIORITY 1
142 #define STM32_SPI_SPI2_DMA_PRIORITY 1 142 #define STM32_SPI_SPI2_DMA_PRIORITY 1
143 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 143 #define STM32_SPI_SPI1_IRQ_PRIORITY 10
144 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 144 #define STM32_SPI_SPI2_IRQ_PRIORITY 10
145 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() 145 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
146   146  
147 /* 147 /*
148 * UART driver system settings. 148 * UART driver system settings.
149 */ 149 */
150 #define STM32_UART_USE_USART1 FALSE 150 #define STM32_UART_USE_USART1 FALSE
151 #define STM32_UART_USE_USART2 FALSE 151 #define STM32_UART_USE_USART2 FALSE
152 #define STM32_UART_USE_USART3 FALSE 152 #define STM32_UART_USE_USART3 FALSE
153 #define STM32_UART_USART1_IRQ_PRIORITY 12 153 #define STM32_UART_USART1_IRQ_PRIORITY 12
154 #define STM32_UART_USART2_IRQ_PRIORITY 12 154 #define STM32_UART_USART2_IRQ_PRIORITY 12
155 #define STM32_UART_USART3_IRQ_PRIORITY 12 155 #define STM32_UART_USART3_IRQ_PRIORITY 12
156 #define STM32_UART_USART1_DMA_PRIORITY 0 156 #define STM32_UART_USART1_DMA_PRIORITY 0
157 #define STM32_UART_USART2_DMA_PRIORITY 0 157 #define STM32_UART_USART2_DMA_PRIORITY 0
158 #define STM32_UART_USART3_DMA_PRIORITY 0 158 #define STM32_UART_USART3_DMA_PRIORITY 0
159 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() 159 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
160   160  
161 /* 161 /*
162 * USB driver system settings. 162 * USB driver system settings.
163 */ 163 */
164 #define STM32_USB_USE_USB1 TRUE 164 #define STM32_USB_USE_USB1 FALSE
165 #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE 165 #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
166 #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 166 #define STM32_USB_USB1_HP_IRQ_PRIORITY 13
167 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 167 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14