Rev 3326 Rev 3331
1 #include "main.h" 1 #include "main.h"
2   2  
3 #define USB_CON_SENSE_PIN PIN_D4 3 #define USB_CON_SENSE_PIN PIN_D4
4   4  
5 #include <pic18_usb.h> 5 #include <pic18_usb.h>
6 #include "usbconfig.h" 6 #include "usbconfig.h"
7 #include <usb.h> 7 #include <usb.h>
8   8  
9 #include <usb.c> 9 #include <usb.c>
10   10  
11   11  
12 /* commands from USB, must e.g. match command ids in kernel driver */ 12 /* commands from USB, must e.g. match command ids in kernel driver */
13 #define CMD_ECHO 0 13 #define CMD_ECHO 0
14 #define CMD_GET_FUNC 1 14 #define CMD_GET_FUNC 1
15 #define CMD_SET_DELAY 2 15 #define CMD_SET_DELAY 2
16 #define CMD_GET_STATUS 3 16 #define CMD_GET_STATUS 3
17   17  
18 #define CMD_I2C_IO 4 18 #define CMD_I2C_IO 4
19 #define CMD_I2C_BEGIN 1 // flag fo I2C_IO 19 #define CMD_I2C_BEGIN 1 // flag fo I2C_IO
20 #define CMD_I2C_END 2 // flag fo I2C_IO 20 #define CMD_I2C_END 2 // flag fo I2C_IO
21   21  
22 /* linux kernel flags */ 22 /* linux kernel flags */
23 #define I2C_M_TEN 0x10 /* we have a ten bit chip address */ 23 #define I2C_M_TEN 0x10 /* we have a ten bit chip address */
24 #define I2C_M_RD 0x01 24 #define I2C_M_RD 0x01
25 #define I2C_M_NOSTART 0x4000 25 #define I2C_M_NOSTART 0x4000
26 #define I2C_M_REV_DIR_ADDR 0x2000 26 #define I2C_M_REV_DIR_ADDR 0x2000
27 #define I2C_M_IGNORE_NAK 0x1000 27 #define I2C_M_IGNORE_NAK 0x1000
28 #define I2C_M_NO_RD_ACK 0x0800 28 #define I2C_M_NO_RD_ACK 0x0800
29   29  
30 /* To determine what functionality is present */ 30 /* To determine what functionality is present */
31 #define I2C_FUNC_I2C 0x00000001 31 #define I2C_FUNC_I2C 0x00000001
32 #define I2C_FUNC_10BIT_ADDR 0x00000002 32 #define I2C_FUNC_10BIT_ADDR 0x00000002
33 #define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */ 33 #define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */
34 #define I2C_FUNC_SMBUS_HWPEC_CALC 0x00000008 /* SMBus 2.0 */ 34 #define I2C_FUNC_SMBUS_HWPEC_CALC 0x00000008 /* SMBus 2.0 */
35 #define I2C_FUNC_SMBUS_READ_WORD_DATA_PEC 0x00000800 /* SMBus 2.0 */ 35 #define I2C_FUNC_SMBUS_READ_WORD_DATA_PEC 0x00000800 /* SMBus 2.0 */
36 #define I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC 0x00001000 /* SMBus 2.0 */ 36 #define I2C_FUNC_SMBUS_WRITE_WORD_DATA_PEC 0x00001000 /* SMBus 2.0 */
37 #define I2C_FUNC_SMBUS_PROC_CALL_PEC 0x00002000 /* SMBus 2.0 */ 37 #define I2C_FUNC_SMBUS_PROC_CALL_PEC 0x00002000 /* SMBus 2.0 */
38 #define I2C_FUNC_SMBUS_BLOCK_PROC_CALL_PEC 0x00004000 /* SMBus 2.0 */ 38 #define I2C_FUNC_SMBUS_BLOCK_PROC_CALL_PEC 0x00004000 /* SMBus 2.0 */
39 #define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ 39 #define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
40 #define I2C_FUNC_SMBUS_QUICK 0x00010000 40 #define I2C_FUNC_SMBUS_QUICK 0x00010000
41 #define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 41 #define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
42 #define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000 42 #define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
43 #define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000 43 #define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
44 #define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000 44 #define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
45 #define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000 45 #define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
46 #define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000 46 #define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
47 #define I2C_FUNC_SMBUS_PROC_CALL 0x00800000 47 #define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
48 #define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 48 #define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
49 #define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 49 #define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
50 #define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ 50 #define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
51 #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ 51 #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
52 #define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */ 52 #define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */
53 #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2 0x20000000 /* w/ 2-byte reg. addr. */ 53 #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2 0x20000000 /* w/ 2-byte reg. addr. */
54 #define I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC 0x40000000 /* SMBus 2.0 */ 54 #define I2C_FUNC_SMBUS_READ_BLOCK_DATA_PEC 0x40000000 /* SMBus 2.0 */
55 #define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC 0x80000000 /* SMBus 2.0 */ 55 #define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC 0x80000000 /* SMBus 2.0 */
56   56  
57 #define I2C_FUNC_SMBUS_BYTE I2C_FUNC_SMBUS_READ_BYTE | \ 57 #define I2C_FUNC_SMBUS_BYTE I2C_FUNC_SMBUS_READ_BYTE | \
58 I2C_FUNC_SMBUS_WRITE_BYTE 58 I2C_FUNC_SMBUS_WRITE_BYTE
59 #define I2C_FUNC_SMBUS_BYTE_DATA I2C_FUNC_SMBUS_READ_BYTE_DATA | \ 59 #define I2C_FUNC_SMBUS_BYTE_DATA I2C_FUNC_SMBUS_READ_BYTE_DATA | \
60 I2C_FUNC_SMBUS_WRITE_BYTE_DATA 60 I2C_FUNC_SMBUS_WRITE_BYTE_DATA
61 #define I2C_FUNC_SMBUS_WORD_DATA I2C_FUNC_SMBUS_READ_WORD_DATA | \ 61 #define I2C_FUNC_SMBUS_WORD_DATA I2C_FUNC_SMBUS_READ_WORD_DATA | \
62 I2C_FUNC_SMBUS_WRITE_WORD_DATA 62 I2C_FUNC_SMBUS_WRITE_WORD_DATA
63 #define I2C_FUNC_SMBUS_BLOCK_DATA I2C_FUNC_SMBUS_READ_BLOCK_DATA | \ 63 #define I2C_FUNC_SMBUS_BLOCK_DATA I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
64 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 64 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
65 #define I2C_FUNC_SMBUS_I2C_BLOCK I2C_FUNC_SMBUS_READ_I2C_BLOCK | \ 65 #define I2C_FUNC_SMBUS_I2C_BLOCK I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
66 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 66 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
67   67  
68 #define I2C_FUNC_SMBUS_EMUL I2C_FUNC_SMBUS_QUICK | \ 68 #define I2C_FUNC_SMBUS_EMUL I2C_FUNC_SMBUS_QUICK | \
69 I2C_FUNC_SMBUS_BYTE | \ 69 I2C_FUNC_SMBUS_BYTE | \
70 I2C_FUNC_SMBUS_BYTE_DATA | \ 70 I2C_FUNC_SMBUS_BYTE_DATA | \
71 I2C_FUNC_SMBUS_WORD_DATA | \ 71 I2C_FUNC_SMBUS_WORD_DATA | \
72 I2C_FUNC_SMBUS_PROC_CALL | \ 72 I2C_FUNC_SMBUS_PROC_CALL | \
73 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \ 73 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
74 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC | \ 74 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA_PEC | \
75 I2C_FUNC_SMBUS_I2C_BLOCK 75 I2C_FUNC_SMBUS_I2C_BLOCK
76   76  
77 /* ------------------------------------------------------------------------- */ 77 /* ------------------------------------------------------------------------- */
78 #define DEFAULT_DELAY 10 // default 10us (100khz) 78 #define DEFAULT_DELAY 10 // default 10us (100khz)
79 static unsigned clock_delay = DEFAULT_DELAY; 79 static unsigned clock_delay = DEFAULT_DELAY;
80 static unsigned clock_delay2 = DEFAULT_DELAY/2; 80 static unsigned clock_delay2 = DEFAULT_DELAY/2;
81   81  
82 static unsigned short expected; 82 static unsigned short expected;
83 static unsigned char saved_cmd; 83 static unsigned char saved_cmd;
84   84  
85 unsigned int8 control_data[8]; 85 unsigned int8 control_data[8];
86   86  
87 struct i2c_cmd { 87 struct i2c_cmd {
88 unsigned char type; 88 unsigned char type;
89 unsigned char cmd; 89 unsigned char cmd;
90 unsigned short flags; 90 unsigned short flags;
91 unsigned short addr; 91 unsigned short addr;
92 unsigned short len; 92 unsigned short len;
93 }; 93 };
94   94  
95 #define STATUS_IDLE 0 95 #define STATUS_IDLE 0
96 #define STATUS_ADDRESS_ACK 1 96 #define STATUS_ADDRESS_ACK 1
97 #define STATUS_ADDRESS_NAK 2 97 #define STATUS_ADDRESS_NAK 2
98   98  
99 unsigned int8 status = STATUS_IDLE; 99 unsigned int8 status = STATUS_IDLE;
100   100  
101 void main() 101 void main()
102 { 102 {
103   -  
-   103 unsigned int8 data[64];
104 unsigned int8 replyBuf[4]; 104 unsigned int8 replyBuf[4];
105 unsigned int8 i=0; 105 unsigned int8 i=0;
106   106  
107 setup_adc_ports(NO_ANALOGS|VSS_VDD); 107 setup_adc_ports(NO_ANALOGS|VSS_VDD);
108 setup_adc(ADC_CLOCK_DIV_2); 108 setup_adc(ADC_CLOCK_DIV_2);
109 setup_psp(PSP_DISABLED); 109 setup_psp(PSP_DISABLED);
110 setup_wdt(WDT_OFF); 110 setup_wdt(WDT_OFF);
111 setup_timer_0(RTCC_INTERNAL); 111 setup_timer_0(RTCC_INTERNAL);
112 setup_timer_1(T1_DISABLED); 112 setup_timer_1(T1_DISABLED);
113 setup_timer_2(T2_DISABLED,0,1); 113 setup_timer_2(T2_DISABLED,0,1);
114 setup_timer_3(T3_DISABLED|T3_DIV_BY_1); 114 setup_timer_3(T3_DISABLED|T3_DIV_BY_1);
115 setup_ccp1(CCP_OFF); 115 setup_ccp1(CCP_OFF);
116 setup_comparator(NC_NC_NC_NC); 116 setup_comparator(NC_NC_NC_NC);
117 setup_vref(FALSE); 117 setup_vref(FALSE);
118   118  
119 printf("MLAB I2C to USB adapter started \n\r "); 119 printf("MLAB I2C to USB adapter started \n\r ");
120   120  
121 output_high(PIN_B4); 121 output_high(PIN_B4);
122   122  
123 usb_init(); 123 usb_init();
-   124 usb_wait_for_enumeration();
-   125  
-   126  
-   127 printf("device enumerated \n\r ");
-   128  
-   129 if(usb_tbe(0)) printf(" endpoint 0 ready \n\r ");
-   130 else printf(" endpoint 0 disabled \n\r ");
-   131 if(usb_tbe(1)) printf(" endpoint 1 ready \n\r ");
-   132 else printf(" endpoint 1 disabled \n\r ");
-   133 if(usb_tbe(2)) printf(" endpoint 2 ready \n\r ");
-   134 else printf(" endpoint 2 disabled \n\r ");
-   135  
-   136 if(usb_puts(0,data,64,1000)) printf(" endpoint 0 inicialized \n\r ");
-   137 else printf("cannot write to endpoint 0 \n\r ");
124   138  
125 while (TRUE) { 139 while (TRUE) {
126 if (usb_enumerated()) 140 if (usb_enumerated())
127 { 141 {
128   142  
129 output_low(PIN_B4); 143 output_low(PIN_B4);
130   144  
131 /* if(usb_kbhit(0)) 145 /* if(usb_kbhit(0))
132 { 146 {
133 printf("control data received... \n\r"); 147 printf("control data received... \n\r");
134 148
135 usb_gets(0,control_data,8,100); 149 usb_gets(0,control_data,8,100);
136 150
137 switch(control_data[1]) 151 switch(control_data[1])
138 { 152 {
139 case CMD_ECHO: // echo (for transfer reliability testing) 153 case CMD_ECHO: // echo (for transfer reliability testing)
140 replyBuf[0] = control_data[2]; 154 replyBuf[0] = control_data[2];
141 replyBuf[1] = control_data[3]; 155 replyBuf[1] = control_data[3];
142 usb_puts(0,replyBuf,2,50); 156 usb_puts(0,replyBuf,2,50);
143 break; 157 break;
144 158
145 case CMD_GET_FUNC: 159 case CMD_GET_FUNC:
146 usb_puts(0,(I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL),32,50); 160 usb_puts(0,(I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL),32,50);
147 break; 161 break;
148 162
149 case CMD_SET_DELAY: 163 case CMD_SET_DELAY:
150 clock_delay = *(unsigned short*)(control_data+2); 164 clock_delay = *(unsigned short*)(control_data+2);
151 if(!clock_delay) clock_delay = 1; 165 if(!clock_delay) clock_delay = 1;
152 clock_delay2 = clock_delay/2; 166 clock_delay2 = clock_delay/2;
153 if(!clock_delay2) clock_delay2 = 1; 167 if(!clock_delay2) clock_delay2 = 1;
154 break; 168 break;
155 169
156 case CMD_I2C_IO: 170 case CMD_I2C_IO:
157 case CMD_I2C_IO + CMD_I2C_BEGIN: 171 case CMD_I2C_IO + CMD_I2C_BEGIN:
158 case CMD_I2C_IO + CMD_I2C_END: 172 case CMD_I2C_IO + CMD_I2C_END:
159 case CMD_I2C_IO + CMD_I2C_BEGIN + CMD_I2C_END: 173 case CMD_I2C_IO + CMD_I2C_BEGIN + CMD_I2C_END:
160 // these are only allowed as class transfers 174 // these are only allowed as class transfers
161 175
162 return i2c_do((struct i2c_cmd*)data); 176 return i2c_do((struct i2c_cmd*)data);
163 break; 177 break;
164 178
165 case CMD_GET_STATUS: 179 case CMD_GET_STATUS:
166 replyBuf[0] = status; 180 replyBuf[0] = status;
167 usb_puts(0,replyBuf,1,50); 181 usb_puts(0,replyBuf,1,50);
168 break; 182 break;
169 183
170 default: 184 default:
171 // must not happen ... 185 // must not happen ...
172 break; 186 break;
173 } 187 }
174 }*/ 188 }*/
175   189  
176 if(usb_kbhit(i)) 190 if(usb_kbhit(i))
177 { 191 {
178 printf(" data received at endpoint %d \n\r ", i); 192 printf(" data received at endpoint %d \n\r ", i);
-   193 usb_gets(i,data,64,1000);
179 } 194 }
180   195  
181 delay_ms(10); 196 delay_ms(10);
182   197  
183 output_high(PIN_B4); 198 output_high(PIN_B4);
-   199 if( i==1 )i=0;
184 i++; 200 else i=1;
185 } 201 }
186 } 202 }
187 } 203 }