Rev 213 Rev 804
1   1  
2 BLIK_ATmega8.elf: file format elf32-avr 2 BLIK_ATmega8.elf: file format elf32-avr
3   3  
4 Sections: 4 Sections:
5 Idx Name Size VMA LMA File off Algn 5 Idx Name Size VMA LMA File off Algn
6 0 .text 0000009c 00000000 00000000 00000094 2**0 6 0 .text 0000009c 00000000 00000000 00000094 2**0
7 CONTENTS, ALLOC, LOAD, READONLY, CODE 7 CONTENTS, ALLOC, LOAD, READONLY, CODE
8 1 .data 00000000 00800060 0000009c 00000130 2**0 8 1 .data 00000000 00800060 0000009c 00000130 2**0
9 CONTENTS, ALLOC, LOAD, DATA 9 CONTENTS, ALLOC, LOAD, DATA
10 2 .bss 00000000 00800060 0000009c 00000130 2**0 10 2 .bss 00000000 00800060 0000009c 00000130 2**0
11 ALLOC 11 ALLOC
12 3 .noinit 00000000 00800060 00800060 00000130 2**0 12 3 .noinit 00000000 00800060 00800060 00000130 2**0
13 CONTENTS 13 CONTENTS
14 4 .eeprom 00000000 00810000 00810000 00000130 2**0 14 4 .eeprom 00000000 00810000 00810000 00000130 2**0
15 CONTENTS 15 CONTENTS
16 5 .debug_aranges 00000014 00000000 00000000 00000130 2**0 16 5 .debug_aranges 00000014 00000000 00000000 00000130 2**0
17 CONTENTS, READONLY, DEBUGGING 17 CONTENTS, READONLY, DEBUGGING
18 6 .debug_pubnames 00000029 00000000 00000000 00000144 2**0 18 6 .debug_pubnames 00000029 00000000 00000000 00000144 2**0
19 CONTENTS, READONLY, DEBUGGING 19 CONTENTS, READONLY, DEBUGGING
20 7 .debug_info 0000012f 00000000 00000000 0000016d 2**0 20 7 .debug_info 0000012f 00000000 00000000 0000016d 2**0
21 CONTENTS, READONLY, DEBUGGING 21 CONTENTS, READONLY, DEBUGGING
22 8 .debug_abbrev 000000c8 00000000 00000000 0000029c 2**0 22 8 .debug_abbrev 000000c8 00000000 00000000 0000029c 2**0
23 CONTENTS, READONLY, DEBUGGING 23 CONTENTS, READONLY, DEBUGGING
24 9 .debug_line 000000f7 00000000 00000000 00000364 2**0 24 9 .debug_line 000000f7 00000000 00000000 00000364 2**0
25 CONTENTS, READONLY, DEBUGGING 25 CONTENTS, READONLY, DEBUGGING
26 10 .debug_str 000000e0 00000000 00000000 0000045b 2**0 26 10 .debug_str 000000e0 00000000 00000000 0000045b 2**0
27 CONTENTS, READONLY, DEBUGGING 27 CONTENTS, READONLY, DEBUGGING
28 Disassembly of section .text: 28 Disassembly of section .text:
29   29  
30 00000000 <__vectors>: 30 00000000 <__vectors>:
31 0: 12 c0 rjmp .+36 ; 0x26 31 0: 12 c0 rjmp .+36 ; 0x26
32 2: 2b c0 rjmp .+86 ; 0x5a 32 2: 2b c0 rjmp .+86 ; 0x5a
33 4: 2a c0 rjmp .+84 ; 0x5a 33 4: 2a c0 rjmp .+84 ; 0x5a
34 6: 29 c0 rjmp .+82 ; 0x5a 34 6: 29 c0 rjmp .+82 ; 0x5a
35 8: 28 c0 rjmp .+80 ; 0x5a 35 8: 28 c0 rjmp .+80 ; 0x5a
36 a: 27 c0 rjmp .+78 ; 0x5a 36 a: 27 c0 rjmp .+78 ; 0x5a
37 c: 26 c0 rjmp .+76 ; 0x5a 37 c: 26 c0 rjmp .+76 ; 0x5a
38 e: 25 c0 rjmp .+74 ; 0x5a 38 e: 25 c0 rjmp .+74 ; 0x5a
39 10: 24 c0 rjmp .+72 ; 0x5a 39 10: 24 c0 rjmp .+72 ; 0x5a
40 12: 23 c0 rjmp .+70 ; 0x5a 40 12: 23 c0 rjmp .+70 ; 0x5a
41 14: 22 c0 rjmp .+68 ; 0x5a 41 14: 22 c0 rjmp .+68 ; 0x5a
42 16: 21 c0 rjmp .+66 ; 0x5a 42 16: 21 c0 rjmp .+66 ; 0x5a
43 18: 20 c0 rjmp .+64 ; 0x5a 43 18: 20 c0 rjmp .+64 ; 0x5a
44 1a: 1f c0 rjmp .+62 ; 0x5a 44 1a: 1f c0 rjmp .+62 ; 0x5a
45 1c: 1e c0 rjmp .+60 ; 0x5a 45 1c: 1e c0 rjmp .+60 ; 0x5a
46 1e: 1d c0 rjmp .+58 ; 0x5a 46 1e: 1d c0 rjmp .+58 ; 0x5a
47 20: 1c c0 rjmp .+56 ; 0x5a 47 20: 1c c0 rjmp .+56 ; 0x5a
48 22: 1b c0 rjmp .+54 ; 0x5a 48 22: 1b c0 rjmp .+54 ; 0x5a
49 24: 1a c0 rjmp .+52 ; 0x5a 49 24: 1a c0 rjmp .+52 ; 0x5a
50   50  
51 00000026 <__ctors_end>: 51 00000026 <__ctors_end>:
52 26: 11 24 eor r1, r1 52 26: 11 24 eor r1, r1
53 28: 1f be out 0x3f, r1 ; 63 53 28: 1f be out 0x3f, r1 ; 63
54 2a: cf e5 ldi r28, 0x5F ; 95 54 2a: cf e5 ldi r28, 0x5F ; 95
55 2c: d4 e0 ldi r29, 0x04 ; 4 55 2c: d4 e0 ldi r29, 0x04 ; 4
56 2e: de bf out 0x3e, r29 ; 62 56 2e: de bf out 0x3e, r29 ; 62
57 30: cd bf out 0x3d, r28 ; 61 57 30: cd bf out 0x3d, r28 ; 61
58   58  
59 00000032 <__do_copy_data>: 59 00000032 <__do_copy_data>:
60 32: 10 e0 ldi r17, 0x00 ; 0 60 32: 10 e0 ldi r17, 0x00 ; 0
61 34: a0 e6 ldi r26, 0x60 ; 96 61 34: a0 e6 ldi r26, 0x60 ; 96
62 36: b0 e0 ldi r27, 0x00 ; 0 62 36: b0 e0 ldi r27, 0x00 ; 0
63 38: ec e9 ldi r30, 0x9C ; 156 63 38: ec e9 ldi r30, 0x9C ; 156
64 3a: f0 e0 ldi r31, 0x00 ; 0 64 3a: f0 e0 ldi r31, 0x00 ; 0
65 3c: 02 c0 rjmp .+4 ; 0x42 65 3c: 02 c0 rjmp .+4 ; 0x42
66   66  
67 0000003e <.do_copy_data_loop>: 67 0000003e <.do_copy_data_loop>:
68 3e: 05 90 lpm r0, Z+ 68 3e: 05 90 lpm r0, Z+
69 40: 0d 92 st X+, r0 69 40: 0d 92 st X+, r0
70   70  
71 00000042 <.do_copy_data_start>: 71 00000042 <.do_copy_data_start>:
72 42: a0 36 cpi r26, 0x60 ; 96 72 42: a0 36 cpi r26, 0x60 ; 96
73 44: b1 07 cpc r27, r17 73 44: b1 07 cpc r27, r17
74 46: d9 f7 brne .-10 ; 0x3e 74 46: d9 f7 brne .-10 ; 0x3e
75   75  
76 00000048 <__do_clear_bss>: 76 00000048 <__do_clear_bss>:
77 48: 10 e0 ldi r17, 0x00 ; 0 77 48: 10 e0 ldi r17, 0x00 ; 0
78 4a: a0 e6 ldi r26, 0x60 ; 96 78 4a: a0 e6 ldi r26, 0x60 ; 96
79 4c: b0 e0 ldi r27, 0x00 ; 0 79 4c: b0 e0 ldi r27, 0x00 ; 0
80 4e: 01 c0 rjmp .+2 ; 0x52 80 4e: 01 c0 rjmp .+2 ; 0x52
81   81  
82 00000050 <.do_clear_bss_loop>: 82 00000050 <.do_clear_bss_loop>:
83 50: 1d 92 st X+, r1 83 50: 1d 92 st X+, r1
84   84  
85 00000052 <.do_clear_bss_start>: 85 00000052 <.do_clear_bss_start>:
86 52: a0 36 cpi r26, 0x60 ; 96 86 52: a0 36 cpi r26, 0x60 ; 96
87 54: b1 07 cpc r27, r17 87 54: b1 07 cpc r27, r17
88 56: e1 f7 brne .-8 ; 0x50 88 56: e1 f7 brne .-8 ; 0x50
89 58: 13 c0 rjmp .+38 ; 0x80 89 58: 13 c0 rjmp .+38 ; 0x80
90   90  
91 0000005a <__bad_interrupt>: 91 0000005a <__bad_interrupt>:
92 5a: d2 cf rjmp .-92 ; 0x0 92 5a: d2 cf rjmp .-92 ; 0x0
93   93  
94 0000005c <xDelay_ms>: 94 0000005c <xDelay_ms>:
95 #include <avr/delay.h> 95 #include <avr/delay.h>
96   96  
97 // Spozdeni o libovolny pocet ms 97 // Spozdeni o libovolny pocet ms
98 void xDelay_ms(unsigned int Time) 98 void xDelay_ms(unsigned int Time)
99 { 99 {
100 5c: cf 93 push r28 100 5c: cf 93 push r28
101 5e: df 93 push r29 101 5e: df 93 push r29
102 60: 9c 01 movw r18, r24 102 60: 9c 01 movw r18, r24
103 for(;Time!=0;Time--) 103 for(;Time!=0;Time--)
104 62: 89 2b or r24, r25 104 62: 89 2b or r24, r25
105 64: 51 f0 breq .+20 ; 0x7a 105 64: 51 f0 breq .+20 ; 0x7a
106 66: aa ef ldi r26, 0xFA ; 250 106 66: aa ef ldi r26, 0xFA ; 250
107 68: b0 e0 ldi r27, 0x00 ; 0 107 68: b0 e0 ldi r27, 0x00 ; 0
108 6a: c0 e0 ldi r28, 0x00 ; 0 108 6a: c0 e0 ldi r28, 0x00 ; 0
109 6c: d0 e0 ldi r29, 0x00 ; 0 109 6c: d0 e0 ldi r29, 0x00 ; 0
110 */ 110 */
111 static __inline__ void 111 static __inline__ void
112 _delay_loop_2(uint16_t __count) 112 _delay_loop_2(uint16_t __count)
113 { 113 {
114 __asm__ volatile ( 114 __asm__ volatile (
115 6e: cd 01 movw r24, r26 115 6e: cd 01 movw r24, r26
116 70: 01 97 sbiw r24, 0x01 ; 1 116 70: 01 97 sbiw r24, 0x01 ; 1
117 72: f1 f7 brne .-4 ; 0x70 117 72: f1 f7 brne .-4 ; 0x70
118 74: 21 50 subi r18, 0x01 ; 1 118 74: 21 50 subi r18, 0x01 ; 1
119 76: 30 40 sbci r19, 0x00 ; 0 119 76: 30 40 sbci r19, 0x00 ; 0
120 78: d1 f7 brne .-12 ; 0x6e 120 78: d1 f7 brne .-12 ; 0x6e
121 7a: df 91 pop r29 121 7a: df 91 pop r29
122 7c: cf 91 pop r28 122 7c: cf 91 pop r28
123 7e: 08 95 ret 123 7e: 08 95 ret
124   124  
125 00000080 <main>: 125 00000080 <main>:
126 _delay_ms(1); // Knihovni procedura ma velmi omezen 126 _delay_ms(1); // Knihovni procedura ma velmi omezen
127 } // maximalni cas spozdeni 127 } // maximalni cas spozdeni
128   128  
129   129  
130 // Hlavni program 130 // Hlavni program
131 int main() 131 int main()
132 { 132 {
133 80: cf e5 ldi r28, 0x5F ; 95 133 80: cf e5 ldi r28, 0x5F ; 95
134 82: d4 e0 ldi r29, 0x04 ; 4 134 82: d4 e0 ldi r29, 0x04 ; 4
135 84: de bf out 0x3e, r29 ; 62 135 84: de bf out 0x3e, r29 ; 62
136 86: cd bf out 0x3d, r28 ; 61 136 86: cd bf out 0x3d, r28 ; 61
137   137  
138 DDRC |=1; // Nastav port PCD0 jako vystup 138 DDRC |=1; // Nastav port PCD0 jako vystup
139 88: a0 9a sbi 0x14, 0 ; 20 139 88: a0 9a sbi 0x14, 0 ; 20
140   140  
141 for(;;) // Nekonecna smycka 141 for(;;) // Nekonecna smycka
142 { 142 {
143 PORTC |= 1; // Nastav 1 143 PORTC |= 1; // Nastav 1
144 8a: a8 9a sbi 0x15, 0 ; 21 144 8a: a8 9a sbi 0x15, 0 ; 21
145 xDelay_ms(500); // Pockej 1/2 sekundy 145 xDelay_ms(500); // Pockej 1/2 sekundy
146 8c: 84 ef ldi r24, 0xF4 ; 244 146 8c: 84 ef ldi r24, 0xF4 ; 244
147 8e: 91 e0 ldi r25, 0x01 ; 1 147 8e: 91 e0 ldi r25, 0x01 ; 1
148 90: e5 df rcall .-54 ; 0x5c 148 90: e5 df rcall .-54 ; 0x5c
149 PORTC &= ~1; // Nastav 0 149 PORTC &= ~1; // Nastav 0
150 92: a8 98 cbi 0x15, 0 ; 21 150 92: a8 98 cbi 0x15, 0 ; 21
151 xDelay_ms(500); // Pockej 1/2 sekundy 151 xDelay_ms(500); // Pockej 1/2 sekundy
152 94: 84 ef ldi r24, 0xF4 ; 244 152 94: 84 ef ldi r24, 0xF4 ; 244
153 96: 91 e0 ldi r25, 0x01 ; 1 153 96: 91 e0 ldi r25, 0x01 ; 1
154 98: e1 df rcall .-62 ; 0x5c 154 98: e1 df rcall .-62 ; 0x5c
155 9a: f7 cf rjmp .-18 ; 0x8a 155 9a: f7 cf rjmp .-18 ; 0x8a