Rev 1661 Rev 1711
1   1  
2   2  
3 /** INCLUDES *******************************************************/ 3 /** INCLUDES *******************************************************/
4   4  
5   5  
6 #include "GenericTypeDefs.h" 6 #include "GenericTypeDefs.h"
7 #include "Compiler.h" 7 #include "Compiler.h"
8 #include "HardwareProfile.h" 8 #include "HardwareProfile.h"
9 #include "USB/usb.h" 9 #include "USB/usb.h"
10 #include "usbavrcmd.h" 10 #include "usbavrcmd.h"
11   11  
12 #include "user.h" 12 #include "user.h"
13 #include <math.h> 13 #include <math.h>
14   14  
15 #include <stdlib.h> 15 #include <stdlib.h>
16 #include <string.h> 16 #include <string.h>
17 #include <ctype.h> 17 #include <ctype.h>
18   18  
19 #if defined (UBW) 19 #if defined (UBW)
20 #include <delays.h> 20 #include <delays.h>
21 #include <i2c.h> 21 #include <i2c.h>
22 #include <EEP.h> 22 #include <EEP.h>
23   23  
24 #elif defined (UBW32) 24 #elif defined (UBW32)
25 #include <peripheral/i2c.h> 25 #include <peripheral/i2c.h>
26 #include <dee_emulation/dee_emulation_pic32.h> 26 #include <dee_emulation/dee_emulation_pic32.h>
27   27  
28 #endif 28 #endif
29   29  
30   30  
31 /******************************************************************** 31 /********************************************************************
32 * Section B: EP0 Buffer Space 32 * Section B: EP0 Buffer Space
33 *******************************************************************/ 33 *******************************************************************/
34 extern volatile CTRL_TRF_SETUP SetupPkt; // 8-byte only 34 extern volatile CTRL_TRF_SETUP SetupPkt; // 8-byte only
35 extern volatile BYTE CtrlTrfData[USB_EP0_BUFF_SIZE]; 35 extern volatile BYTE CtrlTrfData[USB_EP0_BUFF_SIZE];
36   36  
37 #pragma udata 37 #pragma udata
38   38  
39 WORD_VAL FilterCrossOver[8]; 39 WORD_VAL FilterCrossOver[8];
40 float FilterSwitchOver[7]; 40 float FilterSwitchOver[7];
41   41  
42 WORD_VAL LPFCrossOver[8]; 42 WORD_VAL LPFCrossOver[8];
43 float LPFSwitchOver[7]; 43 float LPFSwitchOver[7];
44   44  
45 #pragma code 45 #pragma code
46   46  
47 void USBCheckUBWRequest(void) 47 void USBCheckUBWRequest(void)
48 { 48 {
49 unsigned char paddle_byte; 49 unsigned char paddle_byte;
50 unsigned int eep_adr; 50 unsigned int eep_adr;
51 WORD_VAL w; 51 WORD_VAL w;
52 unsigned int i, j; 52 unsigned int i, j;
53 unsigned char IO_data; 53 unsigned char IO_data;
54   54  
55 #if defined (UBW32) 55 #if defined (UBW32)
56 unsigned int value; 56 unsigned int value;
57 unsigned int number_of_filter_bytes; 57 unsigned int number_of_filter_bytes;
58 #else 58 #else
59 unsigned char number_of_filter_bytes; 59 unsigned char number_of_filter_bytes;
60 #endif 60 #endif
61   61  
62   62  
63   63  
64 if(SetupPkt.RequestType == USB_SETUP_TYPE_STANDARD_BITFIELD) return; // only deals with non-standard, ie user requests 64 if(SetupPkt.RequestType == USB_SETUP_TYPE_STANDARD_BITFIELD) return; // only deals with non-standard, ie user requests
65 65
66 command = SetupPkt.bRequest; // save the command of the user request from the setuppacket 66 command = SetupPkt.bRequest; // save the command of the user request from the setuppacket
67 // it will be used for subsequent data transfer 67 // it will be used for subsequent data transfer
68   68  
69 switch(command) 69 switch(command)
70 { 70 {
71   71  
72 case CMD_GET_CW_KEY: 72 case CMD_GET_CW_KEY:
73   73  
74 paddle_byte = 0x22; // 00100010 74 paddle_byte = 0x22; // 00100010
75 if (!PADDLE_DIT) paddle_byte &= 0xdf; // 11011111 75 if (!PADDLE_DIT) paddle_byte &= 0xdf; // 11011111
76 if (!PADDLE_DAH) paddle_byte &= 0xfd; // 11111101 76 if (!PADDLE_DAH) paddle_byte &= 0xfd; // 11111101
77 if (RXTX) paddle_byte |= 0x10; // PB4 is the ATTINY PTT_OUT pin 00010000 77 if (RXTX) paddle_byte |= 0x10; // PB4 is the ATTINY PTT_OUT pin 00010000
78 else paddle_byte &= 0xef; // 11101111 78 else paddle_byte &= 0xef; // 11101111
79 79
80 replybuf[0] = paddle_byte; 80 replybuf[0] = paddle_byte;
81 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 81 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
82 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 82 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
83 inPipes[0].wCount.v[0] = 1; // Set data count 83 inPipes[0].wCount.v[0] = 1; // Set data count
84 inPipes[0].info.bits.busy = 1; 84 inPipes[0].info.bits.busy = 1;
85 break; 85 break;
86   86  
87 case CMD_SET_USRP1: // Set RxTx and get Paddle status 87 case CMD_SET_USRP1: // Set RxTx and get Paddle status
88 paddle_byte = 0x22; // 00100010 88 paddle_byte = 0x22; // 00100010
89 if ( SetupPkt.W_Value.v[0] ){ 89 if ( SetupPkt.W_Value.v[0] ){
90 RXTX = 1; // Set PTT 90 RXTX = 1; // Set PTT
91 paddle_byte |= 0x10; // 00010000 91 paddle_byte |= 0x10; // 00010000
92 } 92 }
93 else{ 93 else{
94 RXTX = 0; 94 RXTX = 0;
95 paddle_byte &= 0xef; // 11101111 95 paddle_byte &= 0xef; // 11101111
96 }; 96 };
97   97  
98   98  
99 if (!PADDLE_DIT) paddle_byte &= 0xdf; // 11011111 99 if (!PADDLE_DIT) paddle_byte &= 0xdf; // 11011111
100 if (!PADDLE_DAH) paddle_byte &= 0xfd; // 11111101 100 if (!PADDLE_DAH) paddle_byte &= 0xfd; // 11111101
101 101
102 replybuf[0] = paddle_byte; 102 replybuf[0] = paddle_byte;
103 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 103 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
104 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 104 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
105 inPipes[0].wCount.v[0] = 1; // Set data count 105 inPipes[0].wCount.v[0] = 1; // Set data count
106 inPipes[0].info.bits.busy = 1; 106 inPipes[0].info.bits.busy = 1;
107 break; 107 break;
108   108  
109 case CMD_SET_FREQ_REG: // Control Transfer Rx of data from HOST->UBW 109 case CMD_SET_FREQ_REG: // Control Transfer Rx of data from HOST->UBW
110 case CMD_SET_LO_SM: 110 case CMD_SET_LO_SM:
111 case CMD_SET_FREQ: 111 case CMD_SET_FREQ:
112 case CMD_SET_XTAL: 112 case CMD_SET_XTAL:
113 case CMD_SET_STARTUP: 113 case CMD_SET_STARTUP:
114 case CMD_SET_PPM: 114 case CMD_SET_PPM:
115   115  
116 wCount = SetupPkt.wLength; 116 wCount = SetupPkt.wLength;
117 outPipes[0].wCount.Val = SetupPkt.wLength; 117 outPipes[0].wCount.Val = SetupPkt.wLength;
118 outPipes[0].pFunc = &Read_Command_Into_Buffer; 118 outPipes[0].pFunc = &Read_Command_Into_Buffer;
119 outPipes[0].pDst.bRam = (BYTE*) &command_buffer[current_command_in].data[0]; 119 outPipes[0].pDst.bRam = (BYTE*) &command_buffer[current_command_in].data[0];
120 outPipes[0].info.bits.busy = 1; 120 outPipes[0].info.bits.busy = 1;
121 break; 121 break;
122   122  
123 case CMD_GET_PIN: // read ports 123 case CMD_GET_PIN: // read ports
124 IO_data = 0x0d; // 00001101 124 IO_data = 0x0d; // 00001101
125 if (PADDLE_DAH) IO_data |= 0x02; // PB1 125 if (PADDLE_DAH) IO_data |= 0x02; // PB1
126 if (BPF_S0_STATE) IO_data |= 0x10; // PB4 126 if (BPF_S0_STATE) IO_data |= 0x10; // PB4
127 if (BPF_S1_STATE) IO_data |= 0x20; // PB5 127 if (BPF_S1_STATE) IO_data |= 0x20; // PB5
128   128  
129 replybuf[0] = IO_data; 129 replybuf[0] = IO_data;
130 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 130 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
131 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 131 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
132 inPipes[0].wCount.v[0] = 1; // Set data count 132 inPipes[0].wCount.v[0] = 1; // Set data count
133 inPipes[0].info.bits.busy = 1; 133 inPipes[0].info.bits.busy = 1;
134 break; 134 break;
135 135
136 case CMD_SET_PORT: // set ports 136 case CMD_SET_PORT: // set ports
137 IO_data = SetupPkt.W_Value.v[0]; 137 IO_data = SetupPkt.W_Value.v[0];
138 if (!abpf_flag){ 138 if (!abpf_flag){
139 if (IO_data & 0x10) BPF_S0 = 1; 139 if (IO_data & 0x10) BPF_S0 = 1;
140 else BPF_S0 = 0; 140 else BPF_S0 = 0;
141 if (IO_data & 0x20) BPF_S1 = 1; 141 if (IO_data & 0x20) BPF_S1 = 1;
142 else BPF_S1 = 0; 142 else BPF_S1 = 0;
143 }; 143 };
144 break; 144 break;
145   145  
146 case CMD_SET_IO: // set i/o bits 146 case CMD_SET_IO: // set i/o bits
147 IO_data = SetupPkt.W_Index.v[0] & 0x03; // only 2 bits active 00000011 147 IO_data = SetupPkt.W_Index.v[0] & 0x03; // only 2 bits active 00000011
148   148  
149 if (!abpf_flag) { // abpf inactive 149 if (!abpf_flag) { // abpf inactive
150 if (IO_data & 0x01) BPF_S0 = 1; // Simulate IO_PIN1 in ATTINY 150 if (IO_data & 0x01) BPF_S0 = 1; // Simulate IO_PIN1 in ATTINY
151 else BPF_S0 = 0; 151 else BPF_S0 = 0;
152 if (IO_data & 0x02) BPF_S1 = 1; // Simulate IO_PIN2 in ATTINY 152 if (IO_data & 0x02) BPF_S1 = 1; // Simulate IO_PIN2 in ATTINY
153 else BPF_S1 = 0; 153 else BPF_S1 = 0;
154 } 154 }
155   155  
156 IO_data = BPF_S0_STATE; // read back status of BPF select pins 156 IO_data = BPF_S0_STATE; // read back status of BPF select pins
157 if (BPF_S1_STATE) IO_data |= 0x02; 157 if (BPF_S1_STATE) IO_data |= 0x02;
158 else IO_data &= 0x01; 158 else IO_data &= 0x01;
159   159  
160 replybuf[0] = IO_data; 160 replybuf[0] = IO_data;
161 replybuf[1] = 0x00; 161 replybuf[1] = 0x00;
162 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 162 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
163 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 163 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
164 inPipes[0].wCount.v[0] = 2; // Set data count 164 inPipes[0].wCount.v[0] = 2; // Set data count
165 inPipes[0].info.bits.busy = 1; 165 inPipes[0].info.bits.busy = 1;
166 break; 166 break;
167   167  
168 case CMD_GET_IO: 168 case CMD_GET_IO:
169   169  
170 IO_data = BPF_S0_STATE; // status of BPF select pins 170 IO_data = BPF_S0_STATE; // status of BPF select pins
171 if (BPF_S1_STATE) IO_data |= 0x02; 171 if (BPF_S1_STATE) IO_data |= 0x02;
172 else IO_data &= 0x01; 172 else IO_data &= 0x01;
173 173
174 replybuf[0] = IO_data; 174 replybuf[0] = IO_data;
175 replybuf[1] = 0x00; 175 replybuf[1] = 0x00;
176 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 176 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
177 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 177 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
178 inPipes[0].wCount.v[0] = 2; // Set data count 178 inPipes[0].wCount.v[0] = 2; // Set data count
179 inPipes[0].info.bits.busy = 1; 179 inPipes[0].info.bits.busy = 1;
180 break; 180 break;
181   181  
182 case CMD_SET_FILTER: // Set and Read filter crossover points 182 case CMD_SET_FILTER: // Set and Read filter crossover points
183 i = SetupPkt.W_Index.Val; 183 i = SetupPkt.W_Index.Val;
184 if (i < 256){ // Rx Filter 184 if (i < 256){ // Rx Filter
185 number_of_filter_bytes = NUM_BPF * 2; 185 number_of_filter_bytes = NUM_BPF * 2;
186 inPipes[0].pSrc.bRam = (BYTE*)&FilterCrossOver[0]; // Set source 186 inPipes[0].pSrc.bRam = (BYTE*)&FilterCrossOver[0]; // Set source
187   187  
188 if (i < NUM_BPF) { 188 if (i < NUM_BPF) {
189 FilterCrossOver[i].Val = SetupPkt.W_Value.Val; 189 FilterCrossOver[i].Val = SetupPkt.W_Value.Val;
190 if (i != (NUM_BPF-1)) FilterSwitchOver[i] = Cross2Switch(FilterCrossOver[i]); 190 if (i != (NUM_BPF-1)) FilterSwitchOver[i] = Cross2Switch(FilterCrossOver[i]);
191 else abpf_flag = SetupPkt.W_Value.Val; 191 else abpf_flag = SetupPkt.W_Value.Val;
192 } 192 }
193 } 193 }
194 else{ // Tx filter 194 else{ // Tx filter
195 number_of_filter_bytes = 16; 195 number_of_filter_bytes = 16;
196 inPipes[0].pSrc.bRam = (BYTE*)&LPFCrossOver[0]; // Set source 196 inPipes[0].pSrc.bRam = (BYTE*)&LPFCrossOver[0]; // Set source
197   197  
198 j = i - 256; 198 j = i - 256;
199 if ( j < 8){ 199 if ( j < 8){
200 LPFCrossOver[j].Val = SetupPkt.W_Value.Val; 200 LPFCrossOver[j].Val = SetupPkt.W_Value.Val;
201 if (j != 7) LPFSwitchOver[j] = Cross2Switch(LPFCrossOver[j]); 201 if (j != 7) LPFSwitchOver[j] = Cross2Switch(LPFCrossOver[j]);
202 }; 202 };
203 }; 203 };
204   204  
205 // now that a filter value of filter enable/disable value is set, update the EEPROM 205 // now that a filter value of filter enable/disable value is set, update the EEPROM
206 #if defined (UBW) 206 #if defined (UBW)
207 for (i = 0; i < NUM_BPF; i++){ 207 for (i = 0; i < NUM_BPF; i++){
208 Write_b_eep((i * 2 + F_CROSS_OVER +1), FilterCrossOver[i].v[0]); 208 Write_b_eep((i * 2 + F_CROSS_OVER +1), FilterCrossOver[i].v[0]);
209 Busy_eep(); 209 Busy_eep();
210 Write_b_eep((i * 2 + F_CROSS_OVER + 1 + 1), FilterCrossOver[i].v[1]); 210 Write_b_eep((i * 2 + F_CROSS_OVER + 1 + 1), FilterCrossOver[i].v[1]);
211 Busy_eep(); 211 Busy_eep();
212 } 212 }
213 #elif defined (UBW32) 213 #elif defined (UBW32)
214 for (i =0; i < NUM_BPF; i++) DataEEWrite( FilterCrossOver[i].Val , (i + F_CROSS_OVER +1)); 214 for (i =0; i < NUM_BPF; i++) DataEEWrite( FilterCrossOver[i].Val , (i + F_CROSS_OVER +1));
215 #endif 215 #endif
216   216  
217 #if defined (UBW) 217 #if defined (UBW)
218 for (j = 0; j < 8; j++){ 218 for (j = 0; j < 8; j++){
219 Write_b_eep(( j * 2 + F_CROSS_OVER +17), LPFCrossOver[j].v[0]); 219 Write_b_eep(( j * 2 + F_CROSS_OVER +17), LPFCrossOver[j].v[0]);
220 Busy_eep(); 220 Busy_eep();
221 Write_b_eep(( j * 2 + F_CROSS_OVER +17 + 1), LPFCrossOver[j].v[1]); 221 Write_b_eep(( j * 2 + F_CROSS_OVER +17 + 1), LPFCrossOver[j].v[1]);
222 Busy_eep(); 222 Busy_eep();
223 } 223 }
224 Write_b_eep(F_CROSS_OVER, F_CROSS_OVER_VALUE); 224 Write_b_eep(F_CROSS_OVER, F_CROSS_OVER_VALUE);
225 Busy_eep(); 225 Busy_eep();
226 #elif defined (UBW32) 226 #elif defined (UBW32)
227 for (j = 0; j < 8; j++){ 227 for (j = 0; j < 8; j++){
228 DataEEWrite( (unsigned int)LPFCrossOver[j].Val , (j + F_CROSS_OVER +9)); 228 DataEEWrite( (unsigned int)LPFCrossOver[j].Val , (j + F_CROSS_OVER +9));
229 }; 229 };
230 DataEEWrite(F_CROSS_OVER_VALUE, F_CROSS_OVER); 230 DataEEWrite(F_CROSS_OVER_VALUE, F_CROSS_OVER);
231 #endif 231 #endif
232   232  
233   233  
234 inPipes[0].wCount.v[0] = number_of_filter_bytes; // Set data count 234 inPipes[0].wCount.v[0] = number_of_filter_bytes; // Set data count
235 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 235 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
236 inPipes[0].info.bits.busy = 1; 236 inPipes[0].info.bits.busy = 1;
237 break; 237 break;
238   238  
239 case CMD_SET_SI570: // SI570: write byte from register index 239 case CMD_SET_SI570: // SI570: write byte from register index
240 i2c_adr = SetupPkt.W_Value.v[0]; 240 i2c_adr = SetupPkt.W_Value.v[0];
241 #if defined (UBW) 241 #if defined (UBW)
242 IdleI2C(); 242 IdleI2C();
243 StartI2C(); 243 StartI2C();
244 IdleI2C(); 244 IdleI2C();
245 WriteI2C( i2c_adr <<1); 245 WriteI2C( i2c_adr <<1);
246 WriteI2C( SetupPkt.W_Value.v[1]); // register = byte 3 246 WriteI2C( SetupPkt.W_Value.v[1]); // register = byte 3
247 WriteI2C( SetupPkt.W_Index.v[0]); // value to write to register 247 WriteI2C( SetupPkt.W_Index.v[0]); // value to write to register
248 StopI2C(); 248 StopI2C();
249 IdleI2C(); 249 IdleI2C();
250 #elif defined (UBW32) 250 #elif defined (UBW32)
251 IdleI2C1(); 251 IdleI2C1();
252 StartI2C1(); 252 StartI2C1();
253 IdleI2C1(); 253 IdleI2C1();
254 MasterWriteI2C1( i2c_adr <<1); 254 MasterWriteI2C1( i2c_adr <<1);
255 MasterWriteI2C1( SetupPkt.W_Value.v[1]); // register = byte 3 255 MasterWriteI2C1( SetupPkt.W_Value.v[1]); // register = byte 3
256 MasterWriteI2C1( SetupPkt.W_Index.v[0]); // value to write to register 256 MasterWriteI2C1( SetupPkt.W_Index.v[0]); // value to write to register
257 StopI2C1(); 257 StopI2C1();
258 IdleI2C1(); 258 IdleI2C1();
259 #endif 259 #endif
260   260  
261 replybuf[0] = 0; // just say no errors 261 replybuf[0] = 0; // just say no errors
262 262
263 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 263 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
264 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 264 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
265 inPipes[0].wCount.v[0] = 1; // Set data count 265 inPipes[0].wCount.v[0] = 1; // Set data count
266 inPipes[0].info.bits.busy = 1; 266 inPipes[0].info.bits.busy = 1;
267 break; 267 break;
268   268  
269 269
270 case CMD_GET_LO_SM: // return sub mul 270 case CMD_GET_LO_SM: // return sub mul
271 for (i=0; i<4; i++) replybuf[i] = f_sub.bytes[i]; 271 for (i=0; i<4; i++) replybuf[i] = f_sub.bytes[i];
272 for (i=0; i<4; i++) replybuf[i+4] = f_mul.bytes[i]; 272 for (i=0; i<4; i++) replybuf[i+4] = f_mul.bytes[i];
273 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 273 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
274 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 274 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
275 inPipes[0].wCount.v[0] = 8; // Set data count 275 inPipes[0].wCount.v[0] = 8; // Set data count
276 inPipes[0].info.bits.busy = 1; 276 inPipes[0].info.bits.busy = 1;
277 break; 277 break;
278   278  
279   279  
280 case CMD_GET_FREQ: // return set freq, ie no offset/mul 280 case CMD_GET_FREQ: // return set freq, ie no offset/mul
281 avr_freq.qw = set_frequency * (double)(1L << 21); 281 avr_freq.qw = set_frequency * (double)(1L << 21);
282 inPipes[0].pSrc.bRam = (BYTE*)&avr_freq.bytes[0]; // Set Source 282 inPipes[0].pSrc.bRam = (BYTE*)&avr_freq.bytes[0]; // Set Source
283 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 283 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
284 inPipes[0].wCount.v[0] = 4; // Set data count 284 inPipes[0].wCount.v[0] = 4; // Set data count
285 inPipes[0].info.bits.busy = 1; 285 inPipes[0].info.bits.busy = 1;
286 break; 286 break;
287   287  
288 case CMD_GET_PPM: // return smooth tune in ppm 288 case CMD_GET_PPM: // return smooth tune in ppm
289 w.Val = Smooth_double * 1000000L; 289 w.Val = Smooth_double * 1000000L;
290 inPipes[0].pSrc.bRam = (BYTE*)&w.v[0]; // Set Source 290 inPipes[0].pSrc.bRam = (BYTE*)&w.v[0]; // Set Source
291 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 291 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
292 inPipes[0].wCount.v[0] = 2; // Set data count 292 inPipes[0].wCount.v[0] = 2; // Set data count
293 inPipes[0].info.bits.busy = 1; 293 inPipes[0].info.bits.busy = 1;
294 break; 294 break;
295   295  
296 case CMD_GET_STARTUP: // return init startup freq 296 case CMD_GET_STARTUP: // return init startup freq
297   297  
298 #if defined(UBW) 298 #if defined(UBW)
299 for (i=0; i<4; i++) avr_freq.bytes[i] = Read_b_eep(i + F_INIT_FREQ +1); 299 for (i=0; i<4; i++) avr_freq.bytes[i] = Read_b_eep(i + F_INIT_FREQ +1);
300 #elif defined(UBW32) 300 #elif defined(UBW32)
301 for (i=0; i<4; i++) { 301 for (i=0; i<4; i++) {
302 DataEERead(&value, (i + F_INIT_FREQ +1)); 302 DataEERead(&value, (i + F_INIT_FREQ +1));
303 avr_freq.bytes[i] = value; 303 avr_freq.bytes[i] = value;
304 }; 304 };
305 #endif 305 #endif
306   306  
307 inPipes[0].pSrc.bRam = (BYTE*)&avr_freq.bytes[0]; // Set Source 307 inPipes[0].pSrc.bRam = (BYTE*)&avr_freq.bytes[0]; // Set Source
308 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 308 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
309 inPipes[0].wCount.v[0] = 4; // Set data count 309 inPipes[0].wCount.v[0] = 4; // Set data count
310 inPipes[0].info.bits.busy = 1; 310 inPipes[0].info.bits.busy = 1;
311 break; 311 break;
312   312  
313 case CMD_GET_XTAL: // return fcryst 313 case CMD_GET_XTAL: // return fcryst
314 inPipes[0].pSrc.bRam = (BYTE*)&fcryst_freq.bytes[0]; // Set Source 314 inPipes[0].pSrc.bRam = (BYTE*)&fcryst_freq.bytes[0]; // Set Source
315 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 315 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
316 inPipes[0].wCount.v[0] = 4; // Set data count 316 inPipes[0].wCount.v[0] = 4; // Set data count
317 inPipes[0].info.bits.busy = 1; 317 inPipes[0].info.bits.busy = 1;
318 break; 318 break;
319   319  
320 case CMD_GET_SI570: // SI570: read out frequency control registers 320 case CMD_GET_SI570: // SI570: read out frequency control registers
321 i2c_adr = SetupPkt.W_Value.v[0]; 321 i2c_adr = SetupPkt.W_Value.v[0];
322 ReadRegs(); 322 ReadRegs();
323 inPipes[0].pSrc.bRam = (BYTE*)&registers[0]; // Set Source 323 inPipes[0].pSrc.bRam = (BYTE*)&registers[0]; // Set Source
324 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 324 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
325 inPipes[0].wCount.v[0] = 6; // Set data count 325 inPipes[0].wCount.v[0] = 6; // Set data count
326 inPipes[0].info.bits.busy = 1; 326 inPipes[0].info.bits.busy = 1;
327 break; 327 break;
328   328  
329 case CMD_GET_I2C_ERR: // return # of i2c errors, set to zero always 329 case CMD_GET_I2C_ERR: // return # of i2c errors, set to zero always
330 replybuf[0] = 0; // No errors :) 330 replybuf[0] = 0; // No errors :)
331 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 331 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
332 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 332 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
333 inPipes[0].wCount.v[0] = 1; // Set data count 333 inPipes[0].wCount.v[0] = 1; // Set data count
334 inPipes[0].info.bits.busy = 1; 334 inPipes[0].info.bits.busy = 1;
335 break; 335 break;
336   336  
337   337  
338 case CMD_SET_I2C_ADDR: // Reset EEPROM to default values if 255 338 case CMD_SET_I2C_ADDR: // Reset EEPROM to default values if 255
339 // Otherwise just set i2c address 339 // Otherwise just set i2c address
340   340  
341 if (SetupPkt.W_Value.v[0] == 0xff){ 341 if (SetupPkt.W_Value.v[0] == 0xff){
342 #if defined (UBW) 342 #if defined (UBW)
343 Write_b_eep(F_CAL_DONE, 0xff); 343 Write_b_eep(F_CAL_DONE, 0xff);
344 Busy_eep(); 344 Busy_eep();
345 Write_b_eep(F_INIT_FREQ, 0xff); 345 Write_b_eep(F_INIT_FREQ, 0xff);
346 Busy_eep(); 346 Busy_eep();
347 Write_b_eep(F_SMOOTH, 0xff); 347 Write_b_eep(F_SMOOTH, 0xff);
348 Busy_eep(); 348 Busy_eep();
349 Write_b_eep(F_SUB_MUL, 0xff); 349 Write_b_eep(F_SUB_MUL, 0xff);
350 Busy_eep(); 350 Busy_eep();
351 Write_b_eep(F_CROSS_OVER, 0xff); 351 Write_b_eep(F_CROSS_OVER, 0xff);
352 Busy_eep(); 352 Busy_eep();
353 #elif defined (UBW32) 353 #elif defined (UBW32)
354 DataEEWrite( (unsigned int) 0xff, F_CAL_DONE); 354 DataEEWrite( (unsigned int) 0xff, F_CAL_DONE);
355 DataEEWrite( (unsigned int) 0xff, F_INIT_FREQ); 355 DataEEWrite( (unsigned int) 0xff, F_INIT_FREQ);
356 DataEEWrite( (unsigned int) 0xff, F_SMOOTH); 356 DataEEWrite( (unsigned int) 0xff, F_SMOOTH);
357 DataEEWrite( (unsigned int) 0xff, F_SUB_MUL); 357 DataEEWrite( (unsigned int) 0xff, F_SUB_MUL);
358 DataEEWrite( (unsigned int) 0xff, F_CROSS_OVER); 358 DataEEWrite( (unsigned int) 0xff, F_CROSS_OVER);
359 #endif 359 #endif
360   360  
361 i2c_adr = 0x55; 361 i2c_adr = 0x55;
362 } 362 }
363 else { 363 else {
364 i2c_adr = SetupPkt.W_Value.v[0]; 364 i2c_adr = SetupPkt.W_Value.v[0];
365 }; 365 };
366   366  
367 replybuf[0] = 0x00; 367 replybuf[0] = 0x00;
368 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 368 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
369 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 369 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
370 inPipes[0].wCount.v[0] = 1; // Set data count 370 inPipes[0].wCount.v[0] = 1; // Set data count
371 inPipes[0].info.bits.busy = 1; 371 inPipes[0].info.bits.busy = 1;
372 break; 372 break;
373   373  
374   374  
375   375  
376 case CMD_GET_VERSION: // return version 15.10 376 case CMD_GET_VERSION: // return version 15.10
377 replybuf[0] = VERSION_MINOR; 377 replybuf[0] = VERSION_MINOR;
378 replybuf[1] = VERSION_MAJOR; 378 replybuf[1] = VERSION_MAJOR;
379 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source 379 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0]; // Set Source
380 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 380 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
381 inPipes[0].wCount.v[0] = 2; // Set data count 381 inPipes[0].wCount.v[0] = 2; // Set data count
382 inPipes[0].info.bits.busy = 1; 382 inPipes[0].info.bits.busy = 1;
383 break; 383 break;
384   384  
385 default: // Command not supported 385 default: // Command not supported
386 386
387 replybuf[0] = 0xff; 387 replybuf[0] = 0xff;
388 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0] ; // Set Source 388 inPipes[0].pSrc.bRam = (BYTE*)&replybuf[0] ; // Set Source
389 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type 389 inPipes[0].info.bits.ctrl_trf_mem = USB_EP0_RAM; // Set memory type
390 inPipes[0].wCount.v[0] = 1; // Set data count 390 inPipes[0].wCount.v[0] = 1; // Set data count
391 inPipes[0].info.bits.busy = 1; 391 inPipes[0].info.bits.busy = 1;
392 break; 392 break;
393 }//end switch 393 }//end switch
394   394  
395 395
396 } 396 }
397   397  
398   398  
399 void Read_Command_Into_Buffer(void) 399 void Read_Command_Into_Buffer(void)
400 { 400 {
401   401  
402 if (command_count >= COMMAND_BUFFER_SIZE){ // buffer full 402 if (command_count >= COMMAND_BUFFER_SIZE){ // buffer full
403 current_command_out++; // discards oldest command 403 current_command_out++; // discards oldest command
404 if (current_command_out >= COMMAND_BUFFER_SIZE) current_command_out = 0; 404 if (current_command_out >= COMMAND_BUFFER_SIZE) current_command_out = 0;
405 command_count--; // now one command less (discarded) 405 command_count--; // now one command less (discarded)
406 }; 406 };
407 command_buffer[current_command_in].command = command; 407 command_buffer[current_command_in].command = command;
408 command_buffer[current_command_in].wCount = wCount; 408 command_buffer[current_command_in].wCount = wCount;
409 // data already copied to command_buffer before this outpipe pFunc is called 409 // data already copied to command_buffer before this outpipe pFunc is called
410 current_command_in++; 410 current_command_in++;
411 if (current_command_in >= COMMAND_BUFFER_SIZE) current_command_in = 0; 411 if (current_command_in >= COMMAND_BUFFER_SIZE) current_command_in = 0;
412 command_count++; 412 command_count++;
413 } 413 }