Rev 1964 Rev 1965
1 #include "main.h" 1 #include "main.h"
2   2  
3 #define VERSION 0.2 3 #define VERSION 0.2
4   4  
5 #define START PIN_D4 5 #define START PIN_D4
6 #define STOP1 PIN_D5 6 #define STOP1 PIN_D5
7 #define STOP2 PIN_D6 7 #define STOP2 PIN_D6
8   8  
9 #include "GP2.h" 9 #include "GP2.h"
10   10  
11 #define ONE_WIRE_PIN PIN_E2 11 #define ONE_WIRE_PIN PIN_E2
12 #include "ds1820.c" 12 #include "ds1820.c"
13   13  
14 void main() 14 void main()
15 { 15 {
16 setup_adc_ports(NO_ANALOGS|VSS_VDD); 16 setup_adc_ports(NO_ANALOGS|VSS_VDD);
17 setup_adc(ADC_CLOCK_DIV_2); 17 setup_adc(ADC_CLOCK_DIV_2);
18 setup_psp(PSP_DISABLED); 18 setup_psp(PSP_DISABLED);
19 setup_spi(SPI_SS_DISABLED); 19 setup_spi(SPI_SS_DISABLED);
20 setup_wdt(WDT_OFF); 20 setup_wdt(WDT_OFF);
21 setup_timer_0(RTCC_INTERNAL); 21 setup_timer_0(RTCC_INTERNAL);
22 setup_timer_1(T1_DISABLED); 22 setup_timer_1(T1_DISABLED);
23 setup_timer_2(T2_DISABLED,0,1); 23 setup_timer_2(T2_DISABLED,0,1);
24 setup_ccp1(CCP_OFF); 24 setup_ccp1(CCP_OFF);
25 setup_comparator(NC_NC_NC_NC); 25 setup_comparator(NC_NC_NC_NC);
26 setup_vref(FALSE); 26 setup_vref(FALSE);
27   27  
28 TDC_reset(); 28 TDC_reset();
29   29  
30 output_low(START); 30 output_low(START);
31 output_low(STOP1); 31 output_low(STOP1);
32 output_low(STOP2); 32 output_low(STOP2);
33   33  
34 delay_ms(50); 34 delay_ms(50);
35   35  
36 /* 36 /*
37 1 0 0 0 0 ADR2 ADR1 ADR0 Write into address ADR 37 1 0 0 0 0 ADR2 ADR1 ADR0 Write into address ADR
38 1 0 1 1 0 ADR2 ADR1 ADR0 Read from address ADR 38 1 0 1 1 0 ADR2 ADR1 ADR0 Read from address ADR
39 0 1 1 1 0 0 0 0 Init 39 0 1 1 1 0 0 0 0 Init
40 0 1 0 1 0 0 0 0 Power On Reset 40 0 1 0 1 0 0 0 0 Power On Reset
41 0 0 0 0 0 0 0 1 Start_Cycle 41 0 0 0 0 0 0 0 1 Start_Cycle
42 0 0 0 0 0 0 1 0 Start_Temp 42 0 0 0 0 0 0 1 0 Start_Temp
43 0 0 0 0 0 0 1 1 Start_Cal_Resonator 43 0 0 0 0 0 0 1 1 Start_Cal_Resonator
44 0 0 0 0 0 1 0 0 Start_Cal_TDC 44 0 0 0 0 0 1 0 0 Start_Cal_TDC
45 */ 45 */
46   46  
47 int32 ble; 47 int32 ble;
48 int16 ret16; 48 int16 ret16;
49 int8 ret8; 49 int8 ret8;
50   50  
51   51  
52 while(TRUE) 52 while(TRUE)
53 { 53 {
54 delay_ms(100); 54 delay_ms(100);
55   55  
56   56  
57 TDC_reset(); 57 TDC_reset();
58 delay_ms(100); 58 delay_ms(100);
59 59
60 //----------------------------------------------- Nastaveni registru 60 //----------------------------------------------- Nastaveni registru
61 output_low(TDC_ENABLE); 61 /* output_low(TDC_ENABLE);
62 ble=0; 62 ble=0;
63 ble=(8<<28)|(0<<24); // write addres 63 ble=(8<<28)|(0<<24); // write addres
64 ble|=(0<<20)|(0<<16)|(0<<14)|(3<<12)|(1<<10)|(0<<9)|(0<<8)|(0<<7)|(1<<6)|(1<<5)|(0<<4)|(1<<3)|(0<<2)|(0<<1)|0; 64 ble|=(0<<20)|(0<<16)|(0<<14)|(3<<12)|(1<<10)|(0<<9)|(0<<8)|(0<<7)|(1<<6)|(1<<5)|(0<<4)|(1<<3)|(0<<2)|(0<<1)|0;
65 spi_xfer(TDC_stream,ble,32); 65 spi_xfer(TDC_stream,ble,32);
66 output_high(TDC_ENABLE); 66 output_high(TDC_ENABLE);
67 67
68 output_low(TDC_ENABLE); 68 output_low(TDC_ENABLE);
69 ble=0; 69 ble=0;
70 ble=(8<<28)|(1<<24); 70 ble=(8<<28)|(1<<24);
71 ble|=(2<<20)|(1<<16)|(0<<15)|(1<<14)|(0<<11)|(4<<8)|0; 71 ble|=(2<<20)|(1<<16)|(0<<15)|(1<<14)|(0<<11)|(4<<8)|0;
72 spi_xfer(TDC_stream,ble,32); 72 spi_xfer(TDC_stream,ble,32);
73 output_high(TDC_ENABLE); 73 output_high(TDC_ENABLE);
74 74
75 output_low(TDC_ENABLE); 75 output_low(TDC_ENABLE);
76 ble=0; 76 ble=0;
77 ble=(8<<28)|(2<<24); 77 ble=(8<<28)|(2<<24);
78 ble|=(1<<21)|(1<<20)|(1<<19)|0; 78 ble|=(1<<21)|(1<<20)|(1<<19)|0;
79 spi_xfer(TDC_stream,ble,32); 79 spi_xfer(TDC_stream,ble,32);
80 output_high(TDC_ENABLE); 80 output_high(TDC_ENABLE);
81 81
82 output_low(TDC_ENABLE); 82 output_low(TDC_ENABLE);
83 ble=0; 83 ble=0;
84 ble=(8<<28)|(3<<24); 84 ble=(8<<28)|(3<<24);
85 ble|=(0<<22)|(1<<21)|(1<<20)|(1<<19)|0; 85 ble|=(0<<22)|(1<<21)|(1<<20)|(1<<19)|0;
86 spi_xfer(TDC_stream,ble,32); 86 spi_xfer(TDC_stream,ble,32);
87 output_high(TDC_ENABLE); 87 output_high(TDC_ENABLE);
88 88
89 output_low(TDC_ENABLE); 89 output_low(TDC_ENABLE);
90 ble=0; 90 ble=0;
91 ble=(8<<28)|(4<<24); 91 ble=(8<<28)|(4<<24);
92 ble|=(4<<19)|0; 92 ble|=(4<<19)|0;
93 spi_xfer(TDC_stream,ble,32); 93 spi_xfer(TDC_stream,ble,32);
94 output_high(TDC_ENABLE); 94 output_high(TDC_ENABLE);
95 95
96 output_low(TDC_ENABLE); 96 output_low(TDC_ENABLE);
97 ble=0; 97 ble=0;
98 ble=(8<<28)|(5<<24); 98 ble=(8<<28)|(5<<24);
99 ble|=(0<<21)|(0<<20)|(0<<19)|(0<<16)|0; 99 ble|=(0<<21)|(0<<20)|(0<<19)|(0<<16)|0;
100 spi_xfer(TDC_stream,ble,32); 100 spi_xfer(TDC_stream,ble,32);
101 output_high(TDC_ENABLE); 101 output_high(TDC_ENABLE);
-   102 */
102   103  
-   104 hit1=TDC_MRANGE2_HIT1_START;
-   105 // hit2=TDC_MRANGE2_HIT2_2CH1;
-   106 hitin1=TDC_HITIN1_4;
-   107 hitin2=TDC_HITIN2_0;
-   108 en_int= TDC_INT_ALU | TDC_INT_ENDHIT | TDC_INT_TIMEOUT;
-   109 en_err_val=TDC_ERRVAL_EN;
-   110 delval1=0x0;
-   111 delval2=0x0;
-   112 delval3=0x0;
-   113
-   114 TDC_update_registers();
103   115  
104 //----------------------------------------------- Vypis registru 116 //----------------------------------------------- Vypis registru
105 117
106 printf("- %LX %LX %LX %LX ", TDC_get_measurement(1), TDC_get_measurement(2), TDC_get_measurement(3), TDC_get_measurement(4)); 118 printf("- %LX %LX %LX %LX ", TDC_get_measurement(1), TDC_get_measurement(2), TDC_get_measurement(3), TDC_get_measurement(4));
107 119
108 output_low(TDC_ENABLE); 120 output_low(TDC_ENABLE);
109 ret8=0; 121 ret8=0;
110 ret8=(0b1011<<4)|4; 122 ret8=(0b1011<<4)|4;
111 spi_xfer(TDC_stream,ret8,8); 123 spi_xfer(TDC_stream,ret8,8);
112 ret16=spi_xfer(TDC_stream,0,16); 124 ret16=spi_xfer(TDC_stream,0,16);
113 output_high(TDC_ENABLE); 125 output_high(TDC_ENABLE);
114 printf("[%Lu %Lu %Lu %Lu %Lu %Lu %Lu] ", (1&(ret16)>>12), (1&(ret16)>>11), (1&(ret16)>>10), 1&(ret16)>>9, 7&(ret16)>>6, 7&(ret16)>>3, 7&ret16); 126 printf("[%Lu %Lu %Lu %Lu %Lu %Lu %Lu] ", (1&(ret16)>>12), (1&(ret16)>>11), (1&(ret16)>>10), 1&(ret16)>>9, 7&(ret16)>>6, 7&(ret16)>>3, 7&ret16);
115 127
116 printf("%X\r\n",TDC_get_reg1()); 128 printf("%X\r\n",TDC_get_reg1());
117 129
118 //----------------------------------------------- Mereni 130 //----------------------------------------------- Mereni
119 131
120 TDC_init(); 132 TDC_init();
121 133
122 delay_ms(50); 134 delay_ms(50);
123 135
124 TDC_start_cycle(); 136 TDC_start_cycle();
125 137
126 delay_ms(200); 138 delay_ms(200);
127 139
128 output_high(STOP2); // Merime jenom jednim kanalem (druhy zrejme musi byt v H) 140 output_high(STOP2); // Merime jenom jednim kanalem (druhy zrejme musi byt v H)
129 141
130 output_high(START); 142 output_high(START);
131 output_low(START); 143 output_low(START);
132 delay_us(1); 144 delay_us(1);
133 145
134 output_high(STOP1); 146 output_high(STOP1);
135 output_low(STOP1); 147 output_low(STOP1);
136 delay_us(1); 148 delay_us(1);
137 149
138 150
139 output_high(STOP1); 151 output_high(STOP1);
140 output_low(STOP1); 152 output_low(STOP1);
141 delay_us(1); 153 delay_us(1);
142 154
143 output_high(STOP1); 155 output_high(STOP1);
144 output_low(STOP1); 156 output_low(STOP1);
145 delay_us(1); 157 delay_us(1);
146 158
147 159
148 160
149 //----------------------------------------------- Pocitani 161 //----------------------------------------------- Pocitani
150 int32 nn; 162 int32 nn;
151 for(nn=3;nn<=5;nn++) 163 for(nn=1;nn<=3;nn++)
152 { 164 {
153 delay_ms(500); 165 delay_ms(500);
154   166  
155 printf("* %LX %LX %LX %LX ", TDC_get_measurement(1), TDC_get_measurement(2), TDC_get_measurement(3), TDC_get_measurement(4)); 167 printf("* %LX %LX %LX %LX ", TDC_get_measurement(1), TDC_get_measurement(2), TDC_get_measurement(3), TDC_get_measurement(4));
156 168
157 output_low(TDC_ENABLE); //status register 169 output_low(TDC_ENABLE); //status register
158 ret8=0; 170 ret8=0;
159 ret8=(0b1011<<4)|4; 171 ret8=(0b1011<<4)|4;
160 spi_xfer(TDC_stream,ret8,8); 172 spi_xfer(TDC_stream,ret8,8);
161 ret16=spi_xfer(TDC_stream,0,16); 173 ret16=spi_xfer(TDC_stream,0,16);
162 output_high(TDC_ENABLE); 174 output_high(TDC_ENABLE);
163 printf("[%Lu %Lu %Lu %Lu %Lu %Lu %Lu] ", (1&(ret16)>>12), (1&(ret16)>>11), (1&(ret16)>>10), 1&(ret16)>>9, 7&(ret16)>>6, 7&(ret16)>>3, 7&ret16); 175 printf("[%Lu %Lu %Lu %Lu %Lu %Lu %Lu] ", (1&(ret16)>>12), (1&(ret16)>>11), (1&(ret16)>>10), 1&(ret16)>>9, 7&(ret16)>>6, 7&(ret16)>>3, 7&ret16);
164 176
165 printf("%X\r\n",TDC_get_reg1()); 177 printf("%X\r\n",TDC_get_reg1());
166 178
167 // Next calculation 179 switch (nn)
168 output_low(TDC_ENABLE); 180 {
169 ble=0; 181 case 1:
170 ble=(8<<28)|(1<<24); // write to reg1 182 hit2=TDC_MRANGE2_HIT2_1CH1;
171 ble|=(nn<<20)|(1<<16)|(0<<15)|(1<<14)|(0<<11)|(4<<8)|0x00; 183 break;
-   184  
172 spi_xfer(TDC_stream,ble,32); 185 case 2:
173 output_high(TDC_ENABLE); 186 hit2=TDC_MRANGE2_HIT2_2CH1;
174 187 break;
175 } -  
176 -  
177 } -  
178   188  
-   189 case 3:
-   190 hit2=TDC_MRANGE2_HIT2_3CH1;
-   191 break;
-   192 }
-   193 TDC_update_reg1();
-   194 }
-   195 }
179 } 196 }